From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Linux pin control <linux-gpio@vger.kernel.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [GIT PULL] intel-pinctrl for 5.5-2
Date: Mon, 9 Dec 2019 14:22:47 +0200 [thread overview]
Message-ID: <20191209122247.GA85209@black.fi.intel.com> (raw)
Hi Linus,
This is material for v5.5-rc2.
There are two fixes for BayTrail and the rest of conversion to pass IRQ chip
along with GPIO one. The latter is a part 2 of the merge which has been delayed
to -rc1 for dependency reasons. It has been hanging for few weeks in Linux next.
Thanks,
With Best Regards,
Andy Shevchenko
The following changes since commit e42617b825f8073569da76dc4510bfa019b1c35a:
Linux 5.5-rc1 (2019-12-08 14:57:55 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git tags/intel-pinctrl-v5.5-2
for you to fetch changes up to b9a19bdbc843abd659e8ec6b1b3c32ae3a2455eb:
pinctrl: cherryview: Pass irqchip when adding gpiochip (2019-12-09 12:55:53 +0200)
----------------------------------------------------------------
intel-pinctrl for v5.5-2
* Fix Baytrail silicon issue by using a global lock
* Fix North community pin names that user will assume their functions
* Convert Cherryview and Baytrail to pass IRQ chip along with GPIO one
The following is an automated git shortlog grouped by driver:
baytrail:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
- Update North Community pin list
- Really serialize all register accesses
cherryview:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
- Split out irq hw-init into a separate helper function
----------------------------------------------------------------
Andy Shevchenko (3):
pinctrl: baytrail: Update North Community pin list
pinctrl: baytrail: Add GPIO <-> pin mapping ranges via callback
pinctrl: baytrail: Pass irqchip when adding gpiochip
Hans de Goede (4):
pinctrl: baytrail: Really serialize all register accesses
pinctrl: cherryview: Split out irq hw-init into a separate helper function
pinctrl: cherryview: Add GPIO <-> pin mapping ranges via callback
pinctrl: cherryview: Pass irqchip when adding gpiochip
drivers/pinctrl/intel/pinctrl-baytrail.c | 200 ++++++++++++++++-------------
drivers/pinctrl/intel/pinctrl-cherryview.c | 107 ++++++++-------
2 files changed, 173 insertions(+), 134 deletions(-)
--
With Best Regards,
Andy Shevchenko
next reply other threads:[~2019-12-09 12:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-09 12:22 Andy Shevchenko [this message]
2019-12-13 10:01 ` [GIT PULL] intel-pinctrl for 5.5-2 Linus Walleij
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