From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC044C43603 for ; Tue, 17 Dec 2019 12:58:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9FE262146E for ; Tue, 17 Dec 2019 12:58:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1576587519; bh=qyUt/davjLvtK3mavReoj0jtmhbwGyLG7WloreATmv0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=H7LJrFZ+7t4+hM4ZRXNRFgDzRZg23Fn5N/1tIXKEFF8cahsK11S+G3SyL+buTBJf0 g6BdN+ejbtohQY8b6tuVmvZ3dukF1w2MGicMifaM0wWFRfcMJqO00EbiMN0tsfJqah PQGSLQRhHYj0+kCY6XkIcJEfJRlQZrP5DCKN3/JI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726402AbfLQM6f (ORCPT ); Tue, 17 Dec 2019 07:58:35 -0500 Received: from foss.arm.com ([217.140.110.172]:36344 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726141AbfLQM6f (ORCPT ); Tue, 17 Dec 2019 07:58:35 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B54A331B; Tue, 17 Dec 2019 04:58:34 -0800 (PST) Received: from localhost (unknown [10.37.6.21]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 34EF33F719; Tue, 17 Dec 2019 04:58:33 -0800 (PST) Date: Tue, 17 Dec 2019 12:58:32 +0000 From: Mark Brown To: Marco Felsch Cc: "devicetree@vger.kernel.org" , Support Opensource , "linux-aspeed@lists.ozlabs.org" , "bgolaszewski@baylibre.com" , "andrew@aj.id.au" , "linus.walleij@linaro.org" , "lgirdwood@gmail.com" , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "robh+dt@kernel.org" , "joel@jms.id.au" , "kernel@pengutronix.de" , Adam Thomson , "lee.jones@linaro.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v3 3/6] dt-bindings: mfd: da9062: add regulator voltage selection documentation Message-ID: <20191217125832.GF4755@sirena.org.uk> References: <20191204134631.GT1998@sirena.org.uk> <20191210094144.mxximpuouchy3fqu@pengutronix.de> <20191211170918.q7kqkd4lrwwp7jl3@pengutronix.de> <20191212161019.GF4310@sirena.org.uk> <20191212162152.5uu3feacduetysq7@pengutronix.de> <20191212165124.GJ4310@sirena.org.uk> <20191216085525.csr2aglm5md4vtsw@pengutronix.de> <20191216114454.GB4161@sirena.org.uk> <20191217073533.GC31182@pengutronix.de> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="0hHDr/TIsw4o3iPK" Content-Disposition: inline In-Reply-To: <20191217073533.GC31182@pengutronix.de> X-Cookie: Thufir's a Harkonnen now. User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org --0hHDr/TIsw4o3iPK Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Dec 17, 2019 at 08:35:33AM +0100, Marco Felsch wrote: > On 19-12-16 11:44, Mark Brown wrote: > > What I'm saying is that I think the binding needs to explicitly talk > > about that since at the minute it's really confusing reading it as it > > is, it sounds very much like it's trying to override that in a chip > > specific fashion as using gpiolib and the GPIO bindings for pinmuxing is > > really quite unusual. > Hm.. I still think that we don't mux the pin to some special function. > It is still a gpio input pin and if we don't request the pin we could > read the input from user-space too and get a 'valid' value. Muxing would > happen if we change the pad to so called _alternate_ function. Anyway, > lets find a binding description: I don't think any of this makes much difference from a user point of view. > IMHO this is very descriptive and needs no update. > description: > - A GPIO reference to a local general purpose input, [1] calls it GPI. > The DA9062 regulators can select between voltage-a/-b settings. > Each regulator has a VBUCK*_GPI or VLDO*_GPI input to determine the > active setting. In front of the VBUCK*_GPI/VLDO*_GPI input is a mux > to select between different signal sources, valid sources are: the > internal sequencer, GPI1, GPI2 and GPI3. See [1] table 63 for more > information. Most the time the internal sequencer is fine but > sometimes it is necessary to use the signal from the DA9062 GPI > pads. This binding covers the second use case. > Attention: Sharing the same GPI for other purposes or across multiple > regulators is possible but the polarity setting must equal. This doesn't say anything about how the GPIO input is expected to be controlled, for voltage setting any runtime control would need to be done by the driver and it sounds like that's all that can be controlled. The way this reads I'd expect one use of this to be for fast voltage setting for example (you could even combine that with suspend sequencing using the internal sequencer if you mux back to the sequencer during suspend). --0hHDr/TIsw4o3iPK Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl340PcACgkQJNaLcl1U h9BQJwf/ZRW2Sc0sN6zR4aGO1ekytPGFqpZCQbZG5T5CX9CTgmD+QldwXmP9gB0A fAa98/pWCJQHoEVQQxbrVMEpfoFKUTONO5xv+/jA8lq5MTxo9/s9U4mZcVulaCEk uiWXoDvSF6LrgQvsJpkFooRbdrUDHxwF73qd+qfxGkDknsayb7XPPt1O2AWzLFCN dezSJXFa8Xw+qa+y3H6r1W9+siNEIGYp2qjNlUWFtltrZav2ys2TxITxYXlQundv 9iX5+AIzFWeAMsMdoMp17Q49QWW5bYCQ4p3d3M8jtRvGN7LpZflN79S4sWYEuhQe XYgXLKaDfjer7VeQkopSdft+oAo3Pg== =iy8V -----END PGP SIGNATURE----- --0hHDr/TIsw4o3iPK--