linux-gpio.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Jianqun Xu <jay.xu@rock-chips.com>
To: heiko@sntech.de, linus.walleij@linaro.org
Cc: linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org,
	linux-kernel@vger.kernel.org, kever.yang@rock-chips.com,
	david.wu@rock-chips.com, Jianqun Xu <jay.xu@rock-chips.com>
Subject: [PATCH 08/13] pinctrl: rockchip: do codingstyle
Date: Fri, 17 Jul 2020 09:53:15 +0800	[thread overview]
Message-ID: <20200717015315.14255-1-jay.xu@rock-chips.com> (raw)
In-Reply-To: <20200717014908.13914-1-jay.xu@rock-chips.com>

Add RK3308 definitions to separate from other SoCs.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 8e3fa9011165..44f051af97c6 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1952,6 +1952,9 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 }
 
 #define RK3308_PULL_OFFSET		0xa0
+#define RK3308_PULL_BITS_PER_PIN	2
+#define RK3308_PULL_PINS_PER_REG	8
+#define RK3308_PULL_BANK_STRIDE		16
 
 static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 				    int pin_num, struct regmap **regmap,
@@ -1961,14 +1964,17 @@ static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 
 	*regmap = info->regmap_base;
 	*reg = RK3308_PULL_OFFSET;
-	*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
-	*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+	*reg += bank->bank_num * RK3308_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_PULL_PINS_PER_REG) * 4);
 
-	*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
-	*bit *= RK3188_PULL_BITS_PER_PIN;
+	*bit = (pin_num % RK3308_PULL_PINS_PER_REG);
+	*bit *= RK3308_PULL_BITS_PER_PIN;
 }
 
 #define RK3308_DRV_GRF_OFFSET		0x100
+#define RK3308_DRV_BITS_PER_PIN		2
+#define RK3308_DRV_PINS_PER_REG		8
+#define RK3308_DRV_BANK_STRIDE		16
 
 static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 				    int pin_num, struct regmap **regmap,
@@ -1978,11 +1984,11 @@ static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 
 	*regmap = info->regmap_base;
 	*reg = RK3308_DRV_GRF_OFFSET;
-	*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
-	*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+	*reg += bank->bank_num * RK3308_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_DRV_PINS_PER_REG) * 4);
 
-	*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
-	*bit *= RK3288_DRV_BITS_PER_PIN;
+	*bit = (pin_num % RK3308_DRV_PINS_PER_REG);
+	*bit *= RK3308_DRV_BITS_PER_PIN;
 }
 
 #define RK3368_PULL_GRF_OFFSET		0x100
-- 
2.17.1




  parent reply	other threads:[~2020-07-17  1:56 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-17  1:48 [PATCH 00/13] pinctrl: rockchip: prepare work for split driver Jianqun Xu
2020-07-17  1:48 ` [PATCH 01/13] pinctrl: rockchip: add nr_pins to rockchip_pin_ctrl Jianqun Xu
2020-07-20 13:46   ` Linus Walleij
2020-07-17  1:48 ` [PATCH 02/13] pinctrl: rockchip: modify rockchip_pin_ctrl to const struct Jianqun Xu
2020-07-17  1:48 ` [PATCH 03/13] pinctrl: rockchip: make driver be tristate module Jianqun Xu
2020-07-17  1:48 ` [PATCH 04/13] pinctrl: rockchip: enable gpio pclk for rockchip_gpio_to_irq Jianqun Xu
2020-07-17  1:52 ` [PATCH 05/13] pinctrl: rockchip: create irq mapping in gpio_to_irq Jianqun Xu
2020-07-17  1:52 ` [PATCH 06/13] pinctrl: rockchip: do codingstyle Jianqun Xu
2020-07-17  1:52 ` Jianqun Xu
2020-07-17  1:53 ` [PATCH 07/13] " Jianqun Xu
2020-07-17  1:53 ` Jianqun Xu [this message]
2020-07-17  1:53 ` [PATCH 09/13] " Jianqun Xu
2020-07-17  1:53 ` [PATCH 10/13] " Jianqun Xu
2020-07-17  1:53 ` [PATCH 11/13] " Jianqun Xu
2020-07-17  1:53 ` [PATCH 12/13] pinctrl: rockchip: define common codes without special chip name Jianqun Xu
2020-07-17  1:53 ` [PATCH 13/13] pinctrl: rockchip: do codingstyle by adding mux route definitions Jianqun Xu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200717015315.14255-1-jay.xu@rock-chips.com \
    --to=jay.xu@rock-chips.com \
    --cc=david.wu@rock-chips.com \
    --cc=heiko@sntech.de \
    --cc=kever.yang@rock-chips.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).