From: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp,
linux-gpio@vger.kernel.org, yuji2.ishikawa@toshiba.co.jp,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 6/8] arm64: dts: visconti: Add device tree for TMPV7708 RM main board
Date: Wed, 19 Aug 2020 13:58:51 +0900 [thread overview]
Message-ID: <20200819045851.GA1256849@toshiba.co.jp> (raw)
In-Reply-To: <20200817082325.GA7057@bogus>
Hi,
Thanks for your review.
On Mon, Aug 17, 2020 at 09:23:25AM +0100, Sudeep Holla wrote:
> On Mon, Aug 17, 2020 at 10:46:30AM +0900, Nobuhiro Iwamatsu wrote:
> > Add basic support for the Visconti TMPV7708 SoC peripherals -
> > - CPU
> > - CA53 x 4 and 2 cluster.
> > - not support PSCI, currently only spin-table is supported.
>
> Do you have plans to support PSCI in future ?
> It is now almost more than 5 year old specification. So they should be
> strong reason for not supporting that.
I understand that the problem exists and I am considering with our firmware
development team. Currently spin-table is set, but if the firmware supports it,
I plan to switch to PSCI.
If the firmware doesn't support PSCI now, would it be difficult to apply the patch?
>
>
> [..]
>
> > diff --git a/arch/arm64/boot/dts/toshiba/Makefile b/arch/arm64/boot/dts/toshiba/Makefile
> > new file mode 100644
> > index 000000000000..8cd460d5b68e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/toshiba/Makefile
> > @@ -0,0 +1,2 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb
> > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
> > new file mode 100644
> > index 000000000000..a883d3ab1858
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
> > @@ -0,0 +1,44 @@
>
> [..]
>
> > +
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupt-parent = <&gic>;
> > + always-on;
>
> Will this be true when CPU is in low power modes ?
>
Although it is related to the above PSCI, Visconti5 does not have a low
power mode etc., so it is set like this.
> --
> Regards,
> Sudeep
>
Best regards,
Nobuhiro
next prev parent reply other threads:[~2020-08-19 4:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 1:46 [PATCH 0/8] Add Toshiba Visconti ARM64 Platform support Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 1/8] dt-bindings: pinctrl: Add bindings for Toshiba Visconti TMPV7700 SoC Nobuhiro Iwamatsu
2020-08-17 19:46 ` Rob Herring
2020-08-19 5:33 ` Nobuhiro Iwamatsu
2020-08-17 19:48 ` Rob Herring
2020-08-19 5:35 ` Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 2/8] pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 3/8] dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 4/8] dt-bindings: arm: toshiba: Add the TMPV7708 RM main board Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 5/8] arm64: visconti: Add initial support for Toshiba Visconti platform Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 6/8] arm64: dts: visconti: Add device tree for TMPV7708 RM main board Nobuhiro Iwamatsu
2020-08-17 8:23 ` Sudeep Holla
2020-08-19 4:58 ` Nobuhiro Iwamatsu [this message]
2020-08-17 9:00 ` Marc Zyngier
2020-08-19 5:32 ` Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 7/8] MAINTAINERS: Add information for Toshiba Visconti ARM SoCs Nobuhiro Iwamatsu
2020-08-17 1:46 ` [PATCH 8/8] arm64: defconfig: Enable configs for Toshiba Visconti Nobuhiro Iwamatsu
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