[PATCH v3 0/2] Add pinctrl support for Intel Thunder Bay SoC

[lakshmi.sowjanya.d@intel.com]

From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>

Hi,

This patch set enables the support for the integrated pin controller in
the Intel Thunder Bay SoC.

Patch 1 holds the relevant Device Tree bindings documentation and an
entry in MAINTAINERS file.
Patch 2 holds the implementation of pinctrl driver.

Keem Bay and Thunder Bay platforms doesn't provide identical feature set
and register interfaces. There is no successor platform after Keem Bay
and Thunder Bay. So, having a uniform framework for different IP will
not give much advantage in this case and we prefer to have this
implementation for Thunder Bay platform as a separate driver.

Added reference to pincfg-node.yaml in the patternProperties.

Please help to review this patch set.

Thanks,
Sowjanya

Changes from v1:
 - Removed hw specific configurations.
 - Add set_config.
 - Removed gpiochip_add_pin_range and added the same in device tree.
 - Add gpio-ranges property in yaml file.

Changes from v2:
 - Add ref to pincfg-node.yaml in thunderbay.yaml file.

Lakshmi Sowjanya D (2):
  dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver
  pinctrl: Add Intel Thunder Bay pinctrl driver

 .../pinctrl/intel,pinctrl-thunderbay.yaml     |  122 ++
 MAINTAINERS                                   |    5 +
 drivers/pinctrl/Kconfig                       |   19 +
 drivers/pinctrl/Makefile                      |    1 +
 drivers/pinctrl/pinctrl-thunderbay.c          | 1322 +++++++++++++++++
 5 files changed, 1469 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml
 create mode 100644 drivers/pinctrl/pinctrl-thunderbay.c

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2.17.1