From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AB84C433FF for ; Fri, 9 Aug 2019 14:54:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5E65B208C4 for ; Fri, 9 Aug 2019 14:54:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Tq1CWY6f" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726261AbfHIOyD (ORCPT ); Fri, 9 Aug 2019 10:54:03 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:57978 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726168AbfHIOyC (ORCPT ); Fri, 9 Aug 2019 10:54:02 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x79EruZH021377; Fri, 9 Aug 2019 09:53:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565362436; bh=+6Rfl9oSqGGXjVeD367cB0oSgYNVzKo1d3JOerv49IQ=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=Tq1CWY6fFhyndTpbYoM6/COWt0VPzTtw9PUfRq/HvYkrkLAb9CMqZotG2ZfE+pqQ1 QPwoMSe41sMDWwIOxxi6pqTRmhioRC5WYbya2fCoZP67Ct8sM6D8P8uBVCgkX/zOW4 nfTK3aXrb21tpi/SWahZYl33EqAXy8U1feE8KQpg= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x79EruDf048582 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 9 Aug 2019 09:53:56 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 9 Aug 2019 09:53:55 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 9 Aug 2019 09:53:55 -0500 Received: from [172.24.191.45] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x79ErqMV098542; Fri, 9 Aug 2019 09:53:53 -0500 Subject: Re: [PATCH 3/6] arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain To: Lokesh Vutla , Tero Kristo , Nishanth Menon , CC: Rob Herring , , Device Tree Mailing List , Linux ARM Mailing List References: <20190809082947.30590-1-lokeshvutla@ti.com> <20190809082947.30590-4-lokeshvutla@ti.com> From: Keerthy Message-ID: <48fca046-d683-bb6c-d848-24ffada6ed85@ti.com> Date: Fri, 9 Aug 2019 20:24:29 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190809082947.30590-4-lokeshvutla@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 09/08/19 1:59 PM, Lokesh Vutla wrote: > Similar to the gpio groups in main domain, there is one gpio group > in wakup domain with 2 module instances in it. This gpio group pins > out 84 lines(6 banks). Add DT node for these 2 gpio module instances. Reviewed-by: Keerthy > > Signed-off-by: Lokesh Vutla > --- > .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > index e616c2481f51..555dc7b7aedc 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > @@ -87,4 +87,38 @@ > ti,sci-dst-id = <14>; > ti,sci-rm-range-girq = <0x5>; > }; > + > + wkup_gpio0: gpio@42110000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x42110000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&wkup_gpio_intr>; > + interrupts = <113 0>, <113 1>, <113 2>, > + <113 3>, <113 4>, <113 5>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <84>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 113 0>; > + clock-names = "gpio"; > + }; > + > + wkup_gpio1: gpio@42100000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x42100000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&wkup_gpio_intr>; > + interrupts = <114 0>, <114 1>, <114 2>, > + <114 3>, <114 4>, <114 5>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <84>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 114 0>; > + clock-names = "gpio"; > + }; > }; >