Linux-GPIO Archive on lore.kernel.org
 help / color / Atom feed
From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com,
	linus.walleij@linaro.org, stefan@agner.ch, mark.rutland@arm.com
Cc: pdeschrijver@nvidia.com, pgaikwad@nvidia.com, sboyd@kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	jckuo@nvidia.com, josephl@nvidia.com, talho@nvidia.com,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	mperttunen@nvidia.com, spatra@nvidia.com, robh+dt@kernel.org,
	devicetree@vger.kernel.org, rjw@rjwysocki.net,
	viresh.kumar@linaro.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v8 08/21] clk: tegra: periph: Add restore_context support
Date: Fri, 9 Aug 2019 14:55:13 +0300
Message-ID: <5a5f9fb9-9cdd-5d91-4b0e-9bdb95b2625e@gmail.com> (raw)
In-Reply-To: <1565308020-31952-9-git-send-email-skomatineni@nvidia.com>

09.08.2019 2:46, Sowjanya Komatineni пишет:
> This patch implements restore_context support for clk-periph and
> clk-sdmmc-mux clock operations to restore clock parent and rates
> on system resume.
> 
> During system suspend, core power goes off and looses the context
> of the Tegra clock controller registers.
> 
> So on system resume, clocks parent and rate are restored back to
> the context before suspend based on cached data.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  drivers/clk/tegra/clk-periph.c    | 18 ++++++++++++++++++
>  drivers/clk/tegra/clk-sdmmc-mux.c | 12 ++++++++++++
>  2 files changed, 30 insertions(+)
> 
> diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
> index 58437da25156..c9d28cbadccc 100644
> --- a/drivers/clk/tegra/clk-periph.c
> +++ b/drivers/clk/tegra/clk-periph.c
> @@ -3,6 +3,7 @@
>   * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
>   */
>  
> +#include <linux/clk.h>
>  #include <linux/clk-provider.h>
>  #include <linux/export.h>
>  #include <linux/slab.h>
> @@ -99,6 +100,20 @@ static void clk_periph_disable(struct clk_hw *hw)
>  	gate_ops->disable(gate_hw);
>  }
>  
> +static void clk_periph_restore_context(struct clk_hw *hw)
> +{
> +	struct tegra_clk_periph *periph = to_clk_periph(hw);
> +	const struct clk_ops *div_ops = periph->div_ops;
> +	struct clk_hw *div_hw = &periph->divider.hw;
> +	struct clk_hw *parent = clk_hw_get_parent(hw);
> +	int parent_id = clk_hw_get_parent_index(hw, parent);
> +
> +	if (!(periph->gate.flags & TEGRA_PERIPH_NO_DIV))
> +		div_ops->restore_context(div_hw);
> +
> +	clk_periph_set_parent(hw, parent_id);
> +}
> +
>  const struct clk_ops tegra_clk_periph_ops = {
>  	.get_parent = clk_periph_get_parent,
>  	.set_parent = clk_periph_set_parent,
> @@ -108,6 +123,7 @@ const struct clk_ops tegra_clk_periph_ops = {
>  	.is_enabled = clk_periph_is_enabled,
>  	.enable = clk_periph_enable,
>  	.disable = clk_periph_disable,
> +	.restore_context = clk_periph_restore_context,
>  };
>  
>  static const struct clk_ops tegra_clk_periph_nodiv_ops = {
> @@ -116,6 +132,7 @@ static const struct clk_ops tegra_clk_periph_nodiv_ops = {
>  	.is_enabled = clk_periph_is_enabled,
>  	.enable = clk_periph_enable,
>  	.disable = clk_periph_disable,
> +	.restore_context = clk_periph_restore_context,
>  };
>  
>  static const struct clk_ops tegra_clk_periph_no_gate_ops = {
> @@ -124,6 +141,7 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = {
>  	.recalc_rate = clk_periph_recalc_rate,
>  	.round_rate = clk_periph_round_rate,
>  	.set_rate = clk_periph_set_rate,
> +	.restore_context = clk_periph_restore_context,
>  };
>  
>  static struct clk *_tegra_clk_register_periph(const char *name,
> diff --git a/drivers/clk/tegra/clk-sdmmc-mux.c b/drivers/clk/tegra/clk-sdmmc-mux.c
> index a5cd3e31dbae..8db48966b100 100644
> --- a/drivers/clk/tegra/clk-sdmmc-mux.c
> +++ b/drivers/clk/tegra/clk-sdmmc-mux.c
> @@ -194,6 +194,17 @@ static void clk_sdmmc_mux_disable(struct clk_hw *hw)
>  	gate_ops->disable(gate_hw);
>  }
>  
> +static void clk_sdmmc_mux_restore_context(struct clk_hw *hw)
> +{
> +	struct clk_hw *parent = clk_hw_get_parent(hw);
> +	unsigned long parent_rate = clk_hw_get_rate(parent);
> +	unsigned long rate = clk_hw_get_rate(hw);
> +	int parent_id = clk_hw_get_parent_index(hw, parent);
> +
> +	clk_sdmmc_mux_set_parent(hw, parent_id);
> +	clk_sdmmc_mux_set_rate(hw, rate, parent_rate);

For the periph clocks you're restoring rate at first and then the
parent, while here it's the other way around. I'm wondering if there is
any difference in practice and thus whether rate's divider need to be
set to a some safe value before switching to a new parent that has a
higher clock rate than the old parent.

> +}
> +
>  static const struct clk_ops tegra_clk_sdmmc_mux_ops = {
>  	.get_parent = clk_sdmmc_mux_get_parent,
>  	.set_parent = clk_sdmmc_mux_set_parent,
> @@ -203,6 +214,7 @@ static const struct clk_ops tegra_clk_sdmmc_mux_ops = {
>  	.is_enabled = clk_sdmmc_mux_is_enabled,
>  	.enable = clk_sdmmc_mux_enable,
>  	.disable = clk_sdmmc_mux_disable,
> +	.restore_context = clk_sdmmc_mux_restore_context,
>  };
>  
>  struct clk *tegra_clk_register_sdmmc_mux_div(const char *name,
> 


  reply index

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-08 23:46 [PATCH v8 00/21] SC7 entry and exit support for Tegra210 Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 01/21] pinctrl: tegra: Fix write barrier placement in pmx_writel Sowjanya Komatineni
2019-08-09 11:38   ` Dmitry Osipenko
2019-08-12  9:20   ` Thierry Reding
2019-08-14  8:32   ` Linus Walleij
2019-08-08 23:46 ` [PATCH v8 02/21] pinctrl: tegra: Add write barrier after all pinctrl register writes Sowjanya Komatineni
2019-08-09 11:39   ` Dmitry Osipenko
2019-08-12  9:20   ` Thierry Reding
2019-08-14  8:33   ` Linus Walleij
2019-08-08 23:46 ` [PATCH v8 03/21] clk: tegra: divider: Save and restore divider rate Sowjanya Komatineni
2019-08-12  9:21   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 04/21] clk: tegra: pllout: Save and restore pllout context Sowjanya Komatineni
2019-08-11 18:04   ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 05/21] clk: tegra: pll: Save and restore pll context Sowjanya Komatineni
2019-08-09 11:33   ` Dmitry Osipenko
2019-08-09 17:39     ` Sowjanya Komatineni
2019-08-09 17:50       ` Dmitry Osipenko
2019-08-09 18:50         ` Sowjanya Komatineni
2019-08-11 17:24           ` Dmitry Osipenko
2019-08-09 12:46   ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 06/21] clk: tegra: Support for OSC context save and restore Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 07/21] clk: Add API to get index of the clock parent Sowjanya Komatineni
2019-08-09 11:49   ` Dmitry Osipenko
2019-08-12  9:47   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 08/21] clk: tegra: periph: Add restore_context support Sowjanya Komatineni
2019-08-09 11:55   ` Dmitry Osipenko [this message]
2019-08-09 12:20     ` Dmitry Osipenko
2019-08-09 16:55       ` Sowjanya Komatineni
2019-08-12  9:50   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 09/21] clk: tegra: clk-super: Fix to enable PLLP branches to CPU Sowjanya Komatineni
2019-08-09 12:11   ` Dmitry Osipenko
2019-08-12  9:53   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 10/21] clk: tegra: clk-super: Add restore-context support Sowjanya Komatineni
2019-08-09 12:17   ` Dmitry Osipenko
2019-08-09 17:08     ` Sowjanya Komatineni
2019-08-11 17:29       ` Dmitry Osipenko
2019-08-12  9:55   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 11/21] clk: tegra: clk-dfll: Add suspend and resume support Sowjanya Komatineni
2019-08-09 12:23   ` Dmitry Osipenko
2019-08-09 16:39     ` Sowjanya Komatineni
2019-08-09 18:00       ` Dmitry Osipenko
2019-08-09 18:33         ` Sowjanya Komatineni
2019-08-09 18:52           ` Dmitry Osipenko
2019-08-12 10:01   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 12/21] cpufreq: tegra124: " Sowjanya Komatineni
2019-08-12 10:07   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 13/21] clk: tegra210: Use fence_udelay during PLLU init Sowjanya Komatineni
2019-08-11 18:02   ` Dmitry Osipenko
2019-08-11 19:16     ` Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 14/21] clk: tegra210: Add suspend and resume support Sowjanya Komatineni
2019-08-09 13:56   ` Dmitry Osipenko
2019-08-09 16:19     ` Sowjanya Komatineni
2019-08-09 18:18       ` Dmitry Osipenko
     [not found]         ` <cbe94f84-a17b-7e1a-811d-89db571784e1@nvidia.com>
2019-08-11 17:39           ` Dmitry Osipenko
2019-08-11 19:15             ` Sowjanya Komatineni
2019-08-12 16:25               ` Dmitry Osipenko
2019-08-12 17:28                 ` Sowjanya Komatineni
2019-08-12 18:19                   ` Dmitry Osipenko
2019-08-12 19:03                     ` Sowjanya Komatineni
2019-08-12 20:28                       ` Dmitry Osipenko
2019-08-12 10:17   ` Thierry Reding
2019-08-08 23:46 ` [PATCH v8 15/21] soc/tegra: pmc: Allow to support more tegras wake Sowjanya Komatineni
2019-08-11 17:52   ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 16/21] soc/tegra: pmc: Add pmc wake support for tegra210 Sowjanya Komatineni
2019-08-09 13:28   ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 17/21] arm64: tegra: Enable wake from deep sleep on RTC alarm Sowjanya Komatineni
2019-08-08 23:46 ` [PATCH v8 18/21] soc/tegra: pmc: Configure core power request polarity Sowjanya Komatineni
2019-08-09 13:13   ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 19/21] soc/tegra: pmc: Configure deep sleep control settings Sowjanya Komatineni
2019-08-09 13:23   ` Dmitry Osipenko
2019-08-09 16:23     ` Sowjanya Komatineni
2019-08-09 17:24       ` Sowjanya Komatineni
2019-08-09 18:22         ` Dmitry Osipenko
2019-08-08 23:46 ` [PATCH v8 20/21] arm64: dts: tegra210-p2180: Jetson TX1 SC7 timings Sowjanya Komatineni
2019-08-08 23:47 ` [PATCH v8 21/21] arm64: dts: tegra210-p3450: Jetson Nano " Sowjanya Komatineni

Reply instructions:

You may reply publically to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5a5f9fb9-9cdd-5d91-4b0e-9bdb95b2625e@gmail.com \
    --to=digetx@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jason@lakedaemon.net \
    --cc=jckuo@nvidia.com \
    --cc=jonathanh@nvidia.com \
    --cc=josephl@nvidia.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mperttunen@nvidia.com \
    --cc=pdeschrijver@nvidia.com \
    --cc=pgaikwad@nvidia.com \
    --cc=rjw@rjwysocki.net \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=skomatineni@nvidia.com \
    --cc=spatra@nvidia.com \
    --cc=stefan@agner.ch \
    --cc=talho@nvidia.com \
    --cc=tglx@linutronix.de \
    --cc=thierry.reding@gmail.com \
    --cc=viresh.kumar@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Linux-GPIO Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-gpio/0 linux-gpio/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-gpio linux-gpio/ https://lore.kernel.org/linux-gpio \
		linux-gpio@vger.kernel.org linux-gpio@archiver.kernel.org
	public-inbox-index linux-gpio


Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.linux-gpio


AGPL code for this site: git clone https://public-inbox.org/ public-inbox