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([2a00:1098:3142:14:a0dd:3eea:2b80:debb]) by smtp.gmail.com with ESMTPSA id k127sm3669434wmk.31.2019.11.28.01.25.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Nov 2019 01:25:38 -0800 (PST) From: Phil Elwell Subject: Re: Multiple SPI MCP23S17s sharing a CS line To: Linus Walleij , Phil Reid , Jason Kridner , =?UTF-8?Q?Jan_Kundr=c3=a1t?= , Sebastian Reichel Cc: Bartosz Golaszewski , "open list:GPIO SUBSYSTEM" References: Message-ID: <77b3a320-20a3-5993-b7cb-e3d6f171cd56@raspberrypi.org> Date: Thu, 28 Nov 2019 09:25:39 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-28_01:2019-11-28,2019-11-28 signatures=0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Linus, Thank you for such a speedy reply. On 27/11/2019 12:36, Linus Walleij wrote: > Hi Phil, > > I think the people I added to the To: line are better suited to answer > this question, they have used the MCP23* chips in practice more > than me and know how they work. > > Some minor comments inline. > > On Wed, Nov 27, 2019 at 12:20 PM Phil Elwell wrote: > >> We have a user asking for help to construct a Device Tree overlay to use >> the GPIOs exported by multiple MCP23S17s sharing an SPI Chip Select >> line. This is a special feature of the MCP devices whereby the SPI bus >> is treated rather like an I2C bus with each device assigned a unique >> address. His problem is in constructing gpiospecs to refer to all of the >> GPIOs. >> >> The mcp23s08 driver claims to support this feature, and there is a DT >> property ("microchip,spi-present-mask") to declare which addresses are >> used buy the devices. > > It's an interesting hack and I kind of see why they are doing it. > >> I've spent an hour or so looking at the driver >> code and crawling through the kernel GPIO infrastructure, and I don't >> think it's possible. Here's my logic: >> >> 1. Although all devices that are found are presented as a single SPI >> device, they are each registered as independent gpio_chips. > > So they are presented as a single SPI device, but they are > different physical packages (right?) so it is actually correct to > have several gpio_chips but incorrect that they are all > represented in a single device tree node. > > Interestingly there is not a single device tree in the entire > kernel that uses the "*,spi-present-mask" attribute. > > Could you provide an example? I've asked the user if I may see his overlay, but they've not responded yet and I don't think you'll learn very much from it. > I *THINK* the idea behind this attribute is just plain wrong > and cannot be made to work. > > Instead the device should be represented as one SPI node > with subnodes for each separate physical device when this > attribute would be used. > > mcp { > compatible = "microchip,mcp23s08"; > microchip,spi-present-mask = <0x03>; > mcp0: chip0 { > reg = <0>; > .... > } > mcp1: chip1 { > reg = <1>; > .... > } > }; > > By introducing such child nodes it gets possible to reference > these chips by phandle <&mcp1 ...>; > > Notice use of reg attribute to address subchip. I've not spent enough time in this area to know all of the rules and conventions, but it strikes me that if you treat the parent as a kind of bus and the "reg" properties as being the addresses (rather than indexes) then you no longer need the present mask. Phil > IIUC this needs to be figured out and both the DT bindings > and the driver need to be fixed to support this peculiar addressing > scheme. > > Yours, > Linus Walleij >