From: Lars Povlsen <lars.povlsen@microchip.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
SoC Team <soc@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Steen Hegelund <Steen.Hegelund@microchip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Olof Johansson <olof@lixom.net>,
"Michael Turquette" <mturquette@baylibre.com>,
DTML <devicetree@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: [PATCH v3 00/10] Adding support for Microchip Sparx5 SoC
Date: Thu, 23 Jul 2020 12:09:00 +0200 [thread overview]
Message-ID: <87v9iek0g3.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <CAK8P3a1VGsMFfqaMXA2n49F84MYR5eYWvPT-sMHK1XYGGnNB0A@mail.gmail.com>
Arnd Bergmann writes:
> On Mon, Jun 15, 2020 at 3:33 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>>
>> This patch series adds support for Microchip Sparx5 SoC, the CPU
>> system of a advanced, TSN capable gigabit switch. The CPU is an armv8
>> x 2 CPU core (A53).
>>
>> Although this is an ARM core, it shares some peripherals with the
>> Microsemi Ocelot MIPS SoC.
>
> I've picked up this version of the series into an arm/newsoc branch in
> the soc tree,
> except for the pinctrl patch that Linus Walleij already merged.
>
Great! Thanks a lot for following up!
> I see you still have a few pending patches for other subsystems (spi, mmc)
> and I'm not sure what the status is for those and am dropping them for the
> moment.
>
Yes, I had a question out for the SPI maintainer but did not get any
feedback, so I was thinking just doing my own assumptions and refreshing
the series - probably tomorrow.
I also just bumped the MMC maintainer (Adrian) yesterday, as he did send
a me an 'Acked-by', but it hasn't been merged it seems.
> Once the bindings are accepted by the respective subsystem maintainers,
> please send any remaining DT patches as a follow-up to what I've already
> merged.
>
I'll try to work out the puzzle, might need to reach out directly to to
determine whats missing.
Later,
---Lars
> Arnd
--
Lars Povlsen,
Microchip
prev parent reply other threads:[~2020-07-23 10:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-15 13:32 [PATCH v3 00/10] Adding support for Microchip Sparx5 SoC Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 01/10] dt-bindings: arm: sparx5: Add documentation " Lars Povlsen
2020-07-13 18:40 ` Rob Herring
2020-06-15 13:32 ` [PATCH v3 02/10] arm64: sparx5: Add support for Microchip 2xA53 SoC Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 03/10] arm64: dts: sparx5: Add basic cpu support Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 04/10] arm64: dts: sparx5: Add pinctrl support Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 05/10] pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen
2020-06-20 21:10 ` Linus Walleij
2020-06-22 7:54 ` Lars Povlsen
2020-07-07 11:58 ` Linus Walleij
2020-06-15 13:32 ` [PATCH v3 06/10] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen
2020-07-13 18:41 ` Rob Herring
2020-06-15 13:32 ` [PATCH v3 07/10] dt-bindings: clock: sparx5: Add bindings include file Lars Povlsen
2020-07-13 18:41 ` Rob Herring
2020-06-15 13:32 ` [PATCH v3 08/10] clk: sparx5: Add Sparx5 SoC DPLL clock driver Lars Povlsen
[not found] ` <159558008977.3847286.10561464126267966931@swboyd.mtv.corp.google.com>
2020-07-24 12:19 ` Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 09/10] arm64: dts: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen
2020-06-15 13:32 ` [PATCH v3 10/10] arm64: dts: sparx5: Add i2c devices, i2c muxes Lars Povlsen
2020-07-22 20:32 ` [PATCH v3 00/10] Adding support for Microchip Sparx5 SoC Arnd Bergmann
2020-07-23 10:09 ` Lars Povlsen [this message]
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