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[209.85.128.178]) by smtp.gmail.com with ESMTPSA id k19-20020a81ac13000000b00545b02d4af5sm1215327ywh.48.2023.04.07.12.53.59 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Apr 2023 12:53:59 -0700 (PDT) Received: by mail-yw1-f178.google.com with SMTP id 00721157ae682-54c12009c30so100132547b3.9 for ; Fri, 07 Apr 2023 12:53:59 -0700 (PDT) X-Received: by 2002:a81:e20a:0:b0:54d:4a49:ba22 with SMTP id p10-20020a81e20a000000b0054d4a49ba22mr1345371ywl.7.1680897239277; Fri, 07 Apr 2023 12:53:59 -0700 (PDT) MIME-Version: 1.0 References: <20230323173019.3706069-1-dianders@chromium.org> <20230323102605.12.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid> <43b74b3f-e607-ba55-a5fa-326fb4b5519d@linaro.org> In-Reply-To: <43b74b3f-e607-ba55-a5fa-326fb4b5519d@linaro.org> From: Doug Anderson Date: Fri, 7 Apr 2023 12:53:47 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 12/14] arm64: dts: qcom: sc7180: Fix trogdor qspi pin config To: Krzysztof Kozlowski Cc: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij , Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Andy Gross , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi, On Fri, Apr 7, 2023 at 11:11=E2=80=AFAM Krzysztof Kozlowski wrote: > > On 23/03/2023 18:30, Douglas Anderson wrote: > > In commit 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial > > trogdor and lazor dt") we specified the pull settings on the boot SPI > > (the qspi) data lines as pullups to "park" the lines. This seemed like > > the right thing to do, but I never really probed the lines to confirm. > > > > > > &qup_i2c2_default { > > @@ -1336,6 +1340,22 @@ p_sensor_int_l: p-sensor-int-l-state { > > bias-disable; > > }; > > > > + qspi_sleep: qspi-sleep-state { > > + pins =3D "gpio63", "gpio64", "gpio65", "gpio68"; > > + > > + /* > > + * When we're not actively transferring we want pins as G= PIOs > > + * with output disabled so that the quad SPI IP block sto= ps > > + * driving them. We rely on the normal pulls configured i= n > > + * the active state and don't redefine them here. Also no= te > > + * that we don't need the reverse (output-enable) in the > > + * normal mode since the "output-enable" only matters for > > + * GPIO function. > > + */ > > + function =3D "gpio"; > > + output-disable; > > Doug, > > I acked some of your patches, but I assumed you tested all this. It > turns out you never run dtbs_check on the patches you sent. I'm fairly certain that I ran dtbs_check and confirmed that no new errors were introduced on the device tree files that this patch series cleaned up. Did I miss one? I did not try to go through and fix all examples of people using "input-enable" across all Qualcomm device trees, though. Those old device trees still work even if they're using the now-deprecated bindings. When deprecating something my understanding is that it's not required to go back and immediately transition all old device tree files. If having the "input-enable: false" in the bindings is causing huge problems we could do a blank search-and-replace to rename it to "output-disable", at least for places under "tlmm". Even if there are cases where it's superfluous it would at least make the bindings validate. -Doug