From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24305C04A6B for ; Wed, 8 May 2019 06:28:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D9BCC21019 for ; Wed, 8 May 2019 06:28:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726694AbfEHG15 (ORCPT ); Wed, 8 May 2019 02:27:57 -0400 Received: from mga03.intel.com ([134.134.136.65]:28813 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725884AbfEHG14 (ORCPT ); Wed, 8 May 2019 02:27:56 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 May 2019 23:27:56 -0700 X-ExtLoop1: 1 Received: from hao-dev.bj.intel.com (HELO localhost) ([10.238.157.65]) by fmsmga004.fm.intel.com with ESMTP; 07 May 2019 23:27:53 -0700 Date: Wed, 8 May 2019 14:11:33 +0800 From: Wu Hao To: Moritz Fischer Cc: atull@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, Luwei Kang , Russ Weight , Xu Yilun , linux-hwmon@vger.kernel.org, linux@roeck-us.net Subject: Re: [PATCH v2 15/18] fpga: dfl: fme: add thermal management support Message-ID: <20190508061133.GB32255@hao-dev> References: <1556528151-17221-1-git-send-email-hao.wu@intel.com> <1556528151-17221-16-git-send-email-hao.wu@intel.com> <20190507183057.GA30078@archbox> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190507183057.GA30078@archbox> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org On Tue, May 07, 2019 at 11:30:57AM -0700, Moritz Fischer wrote: > Please for next round: > > +CC linux-hwmon, Guenter etc ... Thanks a lot for the kindly reminder. I will make sure linux-hwmon, Guenter cced for the next version patchset. Thanks Hao > > On Mon, Apr 29, 2019 at 04:55:48PM +0800, Wu Hao wrote: > > This patch adds support to thermal management private feature for DFL > > FPGA Management Engine (FME). This private feature driver registers > > a hwmon for thermal/temperature monitoring (hwmon temp1_input). > > If hardware automatic throttling is supported by this hardware, then > > driver also exposes sysfs interfaces under hwmon for thresholds > > (temp1_alarm/ crit/ emergency), threshold status (temp1_alarm_status/ > > temp1_crit_status) and throttling policy (temp1_alarm_policy). > > > > Signed-off-by: Luwei Kang > > Signed-off-by: Russ Weight > > Signed-off-by: Xu Yilun > > Signed-off-by: Wu Hao > > --- > > v2: create a dfl_fme_thermal hwmon to expose thermal information. > > move all sysfs interfaces under hwmon > > tempareture --> hwmon temp1_input > > threshold1 --> hwmon temp1_alarm > > threshold2 --> hwmon temp1_crit > > trip_threshold --> hwmon temp1_emergency > > threshold1_status --> hwmon temp1_alarm_status > > threshold2_status --> hwmon temp1_crit_status > > threshold1_policy --> hwmon temp1_alarm_policy > > --- > > Documentation/ABI/testing/sysfs-platform-dfl-fme | 64 +++++++ > > drivers/fpga/Kconfig | 2 +- > > drivers/fpga/dfl-fme-main.c | 212 +++++++++++++++++++++++ > > 3 files changed, 277 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/ABI/testing/sysfs-platform-dfl-fme b/Documentation/ABI/testing/sysfs-platform-dfl-fme > > index d1aa375..dfbd315 100644 > > --- a/Documentation/ABI/testing/sysfs-platform-dfl-fme > > +++ b/Documentation/ABI/testing/sysfs-platform-dfl-fme > > @@ -44,3 +44,67 @@ Description: Read-only. It returns socket_id to indicate which socket > > this FPGA belongs to, only valid for integrated solution. > > User only needs this information, in case standard numa node > > can't provide correct information. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/name > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. Read this file to get the name of hwmon device, it > > + supports values: > > + 'dfl_fme_thermal' - thermal hwmon device name > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_input > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. It returns FPGA device temperature in millidegrees > > + Celsius. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_alarm > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. It returns hardware threshold1 temperature in > > + millidegrees Celsius. If temperature rises at or above this > > + threshold, hardware starts 50% or 90% throttling (see > > + 'temp1_alarm_policy'). > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. It returns hardware threshold2 temperature in > > + millidegrees Celsius. If temperature rises at or above this > > + threshold, hardware starts 100% throttling. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_emergency > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. It returns hardware trip threshold temperature in > > + millidegrees Celsius. If temperature rises at or above this > > + threshold, a fatal event will be triggered to board management > > + controller (BMC) to shutdown FPGA. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_alarm_status > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-only. It returns 1 if temperature is currently at or above > > + hardware threshold1 (see 'temp1_alarm'), otherwise 0. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit_status > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-only. It returns 1 if temperature is currently at or above > > + hardware threshold2 (see 'temp1_crit'), otherwise 0. > > + > > +What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_alarm_policy > > +Date: April 2019 > > +KernelVersion: 5.2 > > +Contact: Wu Hao > > +Description: Read-Only. Read this file to get the policy of hardware threshold1 > > + (see 'temp1_alarm'). It only supports two values (policies): > > + 0 - AP2 state (90% throttling) > > + 1 - AP1 state (50% throttling) > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > > index c20445b..a6d7588 100644 > > --- a/drivers/fpga/Kconfig > > +++ b/drivers/fpga/Kconfig > > @@ -154,7 +154,7 @@ config FPGA_DFL > > > > config FPGA_DFL_FME > > tristate "FPGA DFL FME Driver" > > - depends on FPGA_DFL > > + depends on FPGA_DFL && HWMON > > help > > The FPGA Management Engine (FME) is a feature device implemented > > under Device Feature List (DFL) framework. Select this option to > > diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c > > index 8339ee8..b9a68b8 100644 > > --- a/drivers/fpga/dfl-fme-main.c > > +++ b/drivers/fpga/dfl-fme-main.c > > @@ -14,6 +14,8 @@ > > * Henry Mitchel > > */ > > > > +#include > > +#include > > #include > > #include > > #include > > @@ -217,6 +219,212 @@ static long fme_hdr_ioctl(struct platform_device *pdev, > > .ioctl = fme_hdr_ioctl, > > }; > > > > +#define FME_THERM_THRESHOLD 0x8 > > +#define TEMP_THRESHOLD1 GENMASK_ULL(6, 0) > > +#define TEMP_THRESHOLD1_EN BIT_ULL(7) > > +#define TEMP_THRESHOLD2 GENMASK_ULL(14, 8) > > +#define TEMP_THRESHOLD2_EN BIT_ULL(15) > > +#define TRIP_THRESHOLD GENMASK_ULL(30, 24) > > +#define TEMP_THRESHOLD1_STATUS BIT_ULL(32) /* threshold1 reached */ > > +#define TEMP_THRESHOLD2_STATUS BIT_ULL(33) /* threshold2 reached */ > > +/* threshold1 policy: 0 - AP2 (90% throttle) / 1 - AP1 (50% throttle) */ > > +#define TEMP_THRESHOLD1_POLICY BIT_ULL(44) > > + > > +#define FME_THERM_RDSENSOR_FMT1 0x10 > > +#define FPGA_TEMPERATURE GENMASK_ULL(6, 0) > > + > > +#define FME_THERM_CAP 0x20 > > +#define THERM_NO_THROTTLE BIT_ULL(0) > > + > > +#define MD_PRE_DEG > > + > > +static bool fme_thermal_throttle_support(void __iomem *base) > > +{ > > + u64 v = readq(base + FME_THERM_CAP); > > + > > + return FIELD_GET(THERM_NO_THROTTLE, v) ? false : true; > > +} > > + > > +static umode_t thermal_hwmon_attrs_visible(const void *drvdata, > > + enum hwmon_sensor_types type, > > + u32 attr, int channel) > > +{ > > + const struct dfl_feature *feature = drvdata; > > + > > + /* temperature is always supported, and check hardware cap for others */ > > + if (attr == hwmon_temp_input) > > + return 0444; > > + > > + return fme_thermal_throttle_support(feature->ioaddr) ? 0444 : 0; > > +} > > + > > +static int thermal_hwmon_read(struct device *dev, enum hwmon_sensor_types type, > > + u32 attr, int channel, long *val) > > +{ > > + struct dfl_feature *feature = dev_get_drvdata(dev); > > + u64 v; > > + > > + switch (attr) { > > + case hwmon_temp_input: > > + v = readq(feature->ioaddr + FME_THERM_RDSENSOR_FMT1); > > + *val = (long)(FIELD_GET(FPGA_TEMPERATURE, v) * 1000); > > + break; > > + case hwmon_temp_alarm: > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + *val = (long)(FIELD_GET(TEMP_THRESHOLD1, v) * 1000); > > + break; > > + case hwmon_temp_crit: > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + *val = (long)(FIELD_GET(TEMP_THRESHOLD2, v) * 1000); > > + break; > > + case hwmon_temp_emergency: > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + *val = (long)(FIELD_GET(TRIP_THRESHOLD, v) * 1000); > > + break; > > + default: > > + return -EOPNOTSUPP; > > + } > > + > > + return 0; > > +} > > + > > +static const struct hwmon_ops thermal_hwmon_ops = { > > + .is_visible = thermal_hwmon_attrs_visible, > > + .read = thermal_hwmon_read, > > +}; > > + > > +static const u32 thermal_hwmon_temp_config[] = { > > + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_CRIT | HWMON_T_EMERGENCY, > > + 0 > > +}; > > + > > +static const struct hwmon_channel_info hwmon_temp_info = { > > + .type = hwmon_temp, > > + .config = thermal_hwmon_temp_config, > > +}; > > + > > +static const struct hwmon_channel_info *thermal_hwmon_info[] = { > > + &hwmon_temp_info, > > + NULL > > +}; > > + > > +static const struct hwmon_chip_info thermal_hwmon_chip_info = { > > + .ops = &thermal_hwmon_ops, > > + .info = thermal_hwmon_info, > > +}; > > + > > +static ssize_t temp1_alarm_status_show(struct device *dev, > > + struct device_attribute *attr, char *buf) > > +{ > > + struct dfl_feature *feature = dev_get_drvdata(dev); > > + u64 v; > > + > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + > > + return scnprintf(buf, PAGE_SIZE, "%u\n", > > + (unsigned int)FIELD_GET(TEMP_THRESHOLD1_STATUS, v)); > > +} > > + > > +static ssize_t temp1_crit_status_show(struct device *dev, > > + struct device_attribute *attr, char *buf) > > +{ > > + struct dfl_feature *feature = dev_get_drvdata(dev); > > + u64 v; > > + > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + > > + return scnprintf(buf, PAGE_SIZE, "%u\n", > > + (unsigned int)FIELD_GET(TEMP_THRESHOLD2_STATUS, v)); > > +} > > + > > +static ssize_t temp1_alarm_policy_show(struct device *dev, > > + struct device_attribute *attr, char *buf) > > +{ > > + struct dfl_feature *feature = dev_get_drvdata(dev); > > + u64 v; > > + > > + v = readq(feature->ioaddr + FME_THERM_THRESHOLD); > > + > > + return scnprintf(buf, PAGE_SIZE, "%u\n", > > + (unsigned int)FIELD_GET(TEMP_THRESHOLD1_POLICY, v)); > > +} > > + > > +static DEVICE_ATTR_RO(temp1_alarm_status); > > +static DEVICE_ATTR_RO(temp1_crit_status); > > +static DEVICE_ATTR_RO(temp1_alarm_policy); > > + > > +static struct attribute *thermal_extra_attrs[] = { > > + &dev_attr_temp1_alarm_status.attr, > > + &dev_attr_temp1_crit_status.attr, > > + &dev_attr_temp1_alarm_policy.attr, > > + NULL, > > +}; > > + > > +static umode_t thermal_extra_attrs_visible(struct kobject *kobj, > > + struct attribute *attr, int index) > > +{ > > + struct device *dev = kobj_to_dev(kobj); > > + struct dfl_feature *feature = dev_get_drvdata(dev); > > + > > + return fme_thermal_throttle_support(feature->ioaddr) ? attr->mode : 0; > > +} > > + > > +static const struct attribute_group thermal_extra_group = { > > + .attrs = thermal_extra_attrs, > > + .is_visible = thermal_extra_attrs_visible, > > +}; > > +__ATTRIBUTE_GROUPS(thermal_extra); > > + > > +static int fme_thermal_mgmt_init(struct platform_device *pdev, > > + struct dfl_feature *feature) > > +{ > > + struct device *hwmon; > > + > > + dev_dbg(&pdev->dev, "FME Thermal Management Init.\n"); > > + > > + /* > > + * create hwmon to allow userspace monitoring temperature and other > > + * threshold information. > > + * > > + * temp1_alarm -> hardware threshold 1 -> 50% or 90% throttling > > + * temp1_crit -> hardware threshold 2 -> 100% throttling > > + * temp1_emergency -> hardware trip_threshold to shutdown FPGA > > + * > > + * create device specific sysfs interfaces, e.g. read temp1_alarm_policy > > + * to understand the actual hardware throttling action (50% vs 90%). > > + * > > + * If hardware doesn't support automatic throttling per thresholds, > > + * then all above sysfs interfaces are not visible except temp1_input > > + * for temperature. > > + */ > > + hwmon = devm_hwmon_device_register_with_info(&pdev->dev, > > + "dfl_fme_thermal", feature, > > + &thermal_hwmon_chip_info, > > + thermal_extra_groups); > > + if (IS_ERR(hwmon)) { > > + dev_err(&pdev->dev, "Fail to register thermal hwmon\n"); > > + return PTR_ERR(hwmon); > > + } > > + > > + return 0; > > +} > > + > > +static void fme_thermal_mgmt_uinit(struct platform_device *pdev, > > + struct dfl_feature *feature) > > +{ > > + dev_dbg(&pdev->dev, "FME Thermal Management UInit.\n"); > > +} > > + > > +static const struct dfl_feature_id fme_thermal_mgmt_id_table[] = { > > + {.id = FME_FEATURE_ID_THERMAL_MGMT,}, > > + {0,} > > +}; > > + > > +static const struct dfl_feature_ops fme_thermal_mgmt_ops = { > > + .init = fme_thermal_mgmt_init, > > + .uinit = fme_thermal_mgmt_uinit, > > +}; > > + > > static struct dfl_feature_driver fme_feature_drvs[] = { > > { > > .id_table = fme_hdr_id_table, > > @@ -227,6 +435,10 @@ static long fme_hdr_ioctl(struct platform_device *pdev, > > .ops = &fme_pr_mgmt_ops, > > }, > > { > > + .id_table = fme_thermal_mgmt_id_table, > > + .ops = &fme_thermal_mgmt_ops, > > + }, > > + { > > .ops = NULL, > > }, > > }; > > -- > > 1.8.3.1 > >