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From: Guenter Roeck <linux@roeck-us.net>
To: "Woods, Brian" <Brian.Woods@amd.com>
Cc: Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marcel Bocu <marcel.p.bocu@gmail.com>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	Clemens Ladisch <clemens@ladisch.de>,
	Jean Delvare <jdelvare@suse.com>,
	"linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
	Vicki Pfau <vi@endrift.com>
Subject: Re: [PATCH 1/2] x86/amd_nb: Add PCI device IDs for family 17h, model 71h
Date: Mon, 22 Jul 2019 09:51:05 -0700
Message-ID: <20190722165105.GA9336@roeck-us.net> (raw)
In-Reply-To: <20190722160420.GA16162@amd.com>

On Mon, Jul 22, 2019 at 04:04:24PM +0000, Woods, Brian wrote:
> On Mon, Jul 22, 2019 at 11:12:45AM +0200, Borislav Petkov wrote:
> > On Mon, Jul 22, 2019 at 10:59:32AM +0200, Thomas Gleixner wrote:
> > > On Fri, 19 Jul 2019, Guenter Roeck wrote:
> > > > > We could merge his patches (if he contacted the x86 crew), make a v2 of
> > > > > mine (71h -> 70h, add his Signed-off-by?) and merge, or some other option?
> > > > > 
> > > > Either case, we'll need feedback from x86 maintainers. They are not exactly
> > > > happy if anyone pushes a patch into arch/x86 without their approval.
> > > 
> > > Adding those PCI ids looks straight forward. So feel free to route them
> > > through hwmon with:
> > 
> > ... but before you do that, let's wait for Brian to confirm the proper
> > model range.
> > 
> > Thx.
> > 
> > -- 
> > Regards/Gruss,
> >     Boris.
> > 
> > ECO tip #101: Trim your mails when you reply.
> > --
> 
> Generally we use X0-XF for a model of processors.  Starting at 70h would
> be preferred.
> 
> The PCI devices match our internal documentation for what it's worth.  I
> was going to test these patches but the system I borrowed was
> requisitioned and hasn't been returned yet so I can't test them now, but
> I don't want to delay these anymore.

With 3900X, and the series applied, I get:

k10temp-pci-00c3
Adapter: PCI adapter
Tdie:         +45.1°C  (high = +70.0°C)
Tctl:         +45.1°C  

which looks about right.

Interesting, though. I thought there are two CPU dies on this chip.
I guess the temperature sensor is on the IO block ? If so, are there
additional sensors on the CPU dies ?

Guenter

> 
> Assuming the change from 71h -> 70h, feel free to add:
> Acked-by: Brian Woods <brian.woods@amd.com>
> 
> -- 
> Brian Woods

  reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-18 18:26 Marcel Bocu
2019-07-18 18:26 ` [PATCH 2/2] hwmon/k10temp: Add support for AMD family 17h, model 71h CPUs Marcel Bocu
2019-07-22 17:46   ` [PATCH v2 2/2] hwmon/k10temp: Add support for AMD family 17h, model 70h CPUs Marcel Bocu
2019-07-22 18:23     ` Guenter Roeck
2019-07-22 21:12       ` Marcel Bocu
     [not found] ` <20190718193330.GA23809@roeck-us.net>
2019-07-19  7:40   ` [PATCH 1/2] x86/amd_nb: Add PCI device IDs for family 17h, model 71h Marcel Bocu
2019-07-19 13:27     ` Guenter Roeck
2019-07-19 15:30       ` Marcel Bocu
2019-07-19 16:08         ` Guenter Roeck
2019-07-22  8:59           ` Thomas Gleixner
2019-07-22  9:12             ` Borislav Petkov
2019-07-22 16:04               ` Woods, Brian
2019-07-22 16:51                 ` Guenter Roeck [this message]
2019-07-22 17:39                   ` Woods, Brian
2019-07-22 18:04                     ` Marcel Bocu
2019-07-22 18:11                       ` Vicki Pfau
2019-07-22 21:09                         ` Marcel Bocu
2019-07-22 22:01                           ` Guenter Roeck
2019-07-22 17:45 ` [PATCH v2 1/2] x86/amd_nb: Add PCI device IDs for family 17h, model 70h Marcel Bocu

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