From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE18CC77B61 for ; Mon, 24 Apr 2023 10:50:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231488AbjDXKuv (ORCPT ); Mon, 24 Apr 2023 06:50:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231537AbjDXKup (ORCPT ); Mon, 24 Apr 2023 06:50:45 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3171B26BD; Mon, 24 Apr 2023 03:50:43 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33OAoKZY076554; Mon, 24 Apr 2023 05:50:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1682333420; bh=Cl5M1/Sa57+bU+iBeDHEnYz6kWjr3RV+s1L4CQPjc5I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lj4dmKkAHXTy04PIg7soM0ujhpDG9RENLn0LmQBZuSTfmIjBxn15yBujxy6ykkuxR sCyv0TEEnFDi3HFvPgEqvKl6YjghFQext5WueH7EyzB8Z2B9n2QHetBxmyhCtV3is1 XvlssOTjQ604G2e6GHet196OSNiYspqodGIeeSxk= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33OAoJQ8016627 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 24 Apr 2023 05:50:19 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Mon, 24 Apr 2023 05:50:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Mon, 24 Apr 2023 05:50:19 -0500 Received: from ula0497641.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33OAoBPE004376; Mon, 24 Apr 2023 05:50:16 -0500 From: Neha Malcom Francis To: , , , , , , , CC: , , , , Subject: [PATCH RESEND v3 1/3] dt-bindings: hwmon: esm: Add ESM support for TI K3 devices Date: Mon, 24 Apr 2023 16:20:09 +0530 Message-ID: <20230424105011.70674-2-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230424105011.70674-1-n-francis@ti.com> References: <20230424105011.70674-1-n-francis@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Document the binding for TI K3 ESM (Error Signaling Module) block. Signed-off-by: Neha Malcom Francis --- .../bindings/hwmon/ti,j721e-esm.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml diff --git a/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml new file mode 100644 index 000000000000..c5eb7f46cc46 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/ti,j721e-esm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 ESM + +maintainers: + - Neha Malcom Francis + +description: + The ESM (Error Signaling Module) is an IP block on TI K3 devices + that allows handling of safety events somewhat similar to what interrupt + controller would do. The safety signals have their separate paths within + the SoC, and they are handled by the ESM, which routes them to the proper + destination, which can be system reset, interrupt controller, etc. In the + simplest configuration the signals are just routed to reset the SoC. + +properties: + compatible: + const: ti,j721e-esm + + reg: + maxItems: 1 + + ti,esm-pins: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + integer array of ESM interrupt pins to route to external event pin + which can be used to reset the SoC. + minItems: 1 + maxItems: 255 + +additionalProperties: false + +required: + - compatible + - reg + - ti,esm-pins + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + }; + }; -- 2.34.1