From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 585CAC1975A for ; Wed, 25 Mar 2020 10:32:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 340D12080C for ; Wed, 25 Mar 2020 10:32:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727158AbgCYKcy (ORCPT ); Wed, 25 Mar 2020 06:32:54 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:47439 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726103AbgCYKcy (ORCPT ); Wed, 25 Mar 2020 06:32:54 -0400 Received: from p5de0bf0b.dip0.t-ipconnect.de ([93.224.191.11] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jH3KR-0007j8-0u; Wed, 25 Mar 2020 11:32:07 +0100 Received: by nanos.tec.linutronix.de (Postfix, from userid 1000) id 25179100C51; Wed, 25 Mar 2020 11:32:06 +0100 (CET) From: Thomas Gleixner To: Rong Chen , Andy Shevchenko Cc: LKML , "maintainer\:X86 ARCHITECTURE \(32-BIT AND 64-BIT\)" , Greg Kroah-Hartman , Mark Gross , Tony Luck , "Rafael J. Wysocki" , Viresh Kumar , Linux PM , Srinivas Pandruvada , Len Brown , Paolo Bonzini , Darren Hart , Andy Shevchenko , ACPI Devel Maling List , linux-edac@vger.kernel.org, Platform Driver , Jean Delvare , Guenter Roeck , linux-hwmon@vger.kernel.org, Zhang Rui , Daniel Lezcano , Amit Kucheria , Chanwoo Choi , Jacob Pan , Adrian Hunter , Ulf Hansson , linux-mmc , Bjorn Helgaas , linux-pci@vger.kernel.org, Takashi Iwai , ALSA Development Mailing List , Herbert Xu , "David S. Miller" , linux-crypto , lkp@lists.01.org Subject: Re: [cpufreq] 06c4d00466: will-it-scale.per_process_ops -53.4% regression In-Reply-To: <43a4189a-7153-18e8-4657-4a4400002c05@intel.com> References: <20200320131509.564059710@linutronix.de> <20200324060124.GC11705@shao2-debian> <43a4189a-7153-18e8-4657-4a4400002c05@intel.com> Date: Wed, 25 Mar 2020 11:32:06 +0100 Message-ID: <87zhc4ybbt.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Rong Chen writes: > On 3/24/20 6:24 PM, Andy Shevchenko wrote: >> On Tue, Mar 24, 2020 at 8:02 AM kernel test robot wrote: >>> Greeting, >>> >>> FYI, we noticed a -53.4% regression of will-it-scale.per_process_ops due to commit: >>> commit: 06c4d00466eb374841bc84c39af19b3161ff6917 ("[patch 09/22] cpufreq: Convert to new X86 CPU match macros") >>> url: https://github.com/0day-ci/linux/commits/Thomas-Gleixner/x86-devicetable-Move-x86-specific-macro-out-of-generic-code/20200321-031729 >>> base: https://git.kernel.org/cgit/linux/kernel/git/rafael/linux-pm.git linux-next >>> >>> in testcase: will-it-scale >>> on test machine: 4 threads Intel(R) Core(TM) i3-3220 CPU @ 3.30GHz with 8G memory >>> with following parameters: >> >> drivers/cpufreq/speedstep-centrino.c change missed the terminator, >> perhaps it's a culprit, because I don't believe removing dups and >> reordering lines may affect this. >> Can you restore terminator there and re-test? >> > > I have retested with the change, but it has no effect on the performance. Bah. The binary equivalence testing detected this, but I obvioulsy missed it. Delta fix below. Thanks, tglx 8<-------------- --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2727,7 +2727,7 @@ static inline void intel_pstate_request_ #define X86_MATCH_HWP(model, hwp_mode) \ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_APERFMPERF, hwp_mode) + X86_FEATURE_HWP, hwp_mode) static const struct x86_cpu_id hwp_support_ids[] __initconst = { X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),