From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B306C433E0 for ; Mon, 25 May 2020 09:06:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F12EB2068D for ; Mon, 25 May 2020 09:06:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="nO2zcmFB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388182AbgEYJGE (ORCPT ); Mon, 25 May 2020 05:06:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388693AbgEYJGE (ORCPT ); Mon, 25 May 2020 05:06:04 -0400 Received: from mail-qk1-x741.google.com (mail-qk1-x741.google.com [IPv6:2607:f8b0:4864:20::741]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB0CCC08C5C1 for ; Mon, 25 May 2020 02:06:03 -0700 (PDT) Received: by mail-qk1-x741.google.com with SMTP id c185so2806707qke.7 for ; Mon, 25 May 2020 02:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=dPuZPyJHL9y310jCMBab1+wUqEyxBpL9sxzRpIMUcDw=; b=nO2zcmFBdCWzlGqLw1pR2ThUuz31GiwsX9FmLMPWXkIRbISIRdArAGzOKpkV7Qzv10 5VetiQSFGmqqkEyKB7+SGACaU0qLz2m+9iyUgPiDy2IDRCPxhwFx8/5DMtWUHYRsjtlL 0atWQF/ahgFhsYQYAzdXXs0aRQhob0wySOVyDYs2DXpouokBCqB6slqb/TvDM+I33ev8 yk0brFmDMsprGHiwBPRLvyh/NVcy/OCFMiVYdFYc4bQaZFP6VvDRpzKRyp0zTf5FOVWN aSAJO9abuoljXUYQUaIMlrcVwRxlonf00RVbuDaEI1E+vkonNYosmqgXcWB0HgzUmBS7 NMpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=dPuZPyJHL9y310jCMBab1+wUqEyxBpL9sxzRpIMUcDw=; b=hMPLkpbu4Oc0gghsGjOMw3DuuHx/IdcrPkNZlRzAHZvnAH9zWMk8U9H214fJvbwPRu Z0HpvtBN7jmY15S9s2D3YYrKLYuZ+DHKDx+KHtjfXAfKFWtV2r/3TwYVdvrawU33YCDQ lmBvCYXQ4rMTsjDL4uCqiuNlPzvUDXEOPZhRmdrSTgRJmLDMqxZeTLPYBc1ev9Kzs+Rz cmDSvu8K0w8aDoDzILtGs+mqtYkEQjzt5dX6jKHadB7KJM6t946DuklXZZaTq9vr/XII K0by34SqDJq6LwonoNlJ8V7v7w3rLfQVruGxwQQQdirliVFrio9bCuQUu52HzJbLQDg4 W56w== X-Gm-Message-State: AOAM5338/1uRBZ30BvjAusdA6bX31tyEYQfsfcGJhNVbrotz6Gh6xTdn 6dw/lWQLhT2eombaM/IMBBanZXkutu0MxAoyJRNa0w== X-Google-Smtp-Source: ABdhPJwwogx5lD1d892oBsZ0UV12gKR+k0N+3QkhwPrACB1IANnU5OS7w1qWs680sMYLIO0JDYTSL1iYK1byj+QAdpM= X-Received: by 2002:a37:5b47:: with SMTP id p68mr26336785qkb.120.1590397562647; Mon, 25 May 2020 02:06:02 -0700 (PDT) MIME-Version: 1.0 References: <20200423174543.17161-1-michael@walle.cc> <20200423174543.17161-11-michael@walle.cc> <75bff2917be1badd36af9f980cf59d2c@walle.cc> In-Reply-To: <75bff2917be1badd36af9f980cf59d2c@walle.cc> From: Bartosz Golaszewski Date: Mon, 25 May 2020 11:05:51 +0200 Message-ID: Subject: Re: [PATCH v3 10/16] gpio: add a reusable generic gpio_chip using regmap To: Michael Walle Cc: Andy Shevchenko , linux-gpio , linux-devicetree , LKML , linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, LINUXWATCHDOG , arm-soc , Linus Walleij , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Mark Brown , Greg Kroah-Hartman Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org wt., 12 maj 2020 o 16:41 Michael Walle napisa=C5=82(a): > > >> + > >> +MODULE_AUTHOR("Michael Walle "); > >> +MODULE_DESCRIPTION("GPIO generic regmap driver core"); > >> +MODULE_LICENSE("GPL"); > >> diff --git a/include/linux/gpio-regmap.h b/include/linux/gpio-regmap.h > >> new file mode 100644 > >> index 000000000000..a868cbcde6e9 > >> --- /dev/null > >> +++ b/include/linux/gpio-regmap.h > >> @@ -0,0 +1,69 @@ > >> +/* SPDX-License-Identifier: GPL-2.0-only */ > >> + > >> +#ifndef _LINUX_GPIO_REGMAP_H > >> +#define _LINUX_GPIO_REGMAP_H > >> + > >> +struct gpio_regmap; > >> + > >> +#define GPIO_REGMAP_ADDR_ZERO ((unsigned long)(-1)) > >> +#define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) > >> + > > > > What if the addr is actually 0? > > Then the driver has to set GPIO_REGMAP_ADDR_ZERO or use the convenience > macro GPIO_REGMAP_ADDR. > > So you can have > > struct gpio_regmap_config config =3D { 0 }; > config.reg_dat_base =3D 0x10; > config.reg_dir_out_base =3D 0x20; > > or > > config.reg_dat_base =3D GPIO_REGMAP_ADDR_ZERO; > > or if you can't be sure if the RHS value might be zero: > > config.reg_dat_base =3D GPIO_REGMAP_ADDR(reg); > > > > Maybe drop GPIO_REGMAP_ADDR and require users to set unused registers > > to GPIO_REGMAP_ADDR_ZERO? > > Thats bad because: > * you'd have to set plenty of unused base registers for a simple driver > * if there will be additional properties in the future, you have to > touch > all other drivers, because they are initialized as 0 (ie. valid reg > 0). > > >> +/** > >> + * struct gpio_regmap_config - Description of a generic regmap > >> gpio_chip. > >> + * > >> + * @parent: The parent device > >> + * @regmap: The regmap used to access the registers > >> + * given, the name of the device is used > >> + * @label: (Optional) Descriptive name for GPIO > >> controller. > >> + * If not given, the name of the device is used. > >> + * @ngpio: Number of GPIOs > >> + * @reg_dat_base: (Optional) (in) register base address > >> + * @reg_set_base: (Optional) set register base address > >> + * @reg_clr_base: (Optional) clear register base address > >> + * @reg_dir_in_base: (Optional) out setting register base address > >> + * @reg_dir_out_base: (Optional) in setting register base address > > > > The two above are inverted I think? > good catch. > > > Also: why the limitation of only supporting one at a time? > > they should be exclusive, either you have a register where you set the > output bits to one, or the input bits. Maybe this need a bit more > context > above. in gpio-mmio.c you can set both and both are used in > set_direction(), but only one is read in get_direction(). > > That being said, I have no strong opinion wether they should be > exclusive > or not, besides the symmetry of set_/get_direction(). > > -michael > Sorry for the late response, your comments make sense to me. Are you going to submit a v4 before the v5.8 merge window? Bart