From: David Woodhouse <dwmw2@infradead.org> To: x86@kernel.org Cc: iommu <iommu@lists.linux-foundation.org>, kvm <kvm@vger.kernel.org>, linux-hyperv@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com> Subject: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs() Date: Mon, 5 Oct 2020 16:28:50 +0100 Message-ID: <20201005152856.974112-7-dwmw2@infradead.org> (raw) In-Reply-To: <20201005152856.974112-1-dwmw2@infradead.org> From: David Woodhouse <dwmw@amazon.co.uk> This is the maximum possible set of CPUs which can be used. Use it to calculate the default affinity requested from __irq_alloc_descs() by first attempting to find the intersection with irq_default_affinity, or falling back to using just the max_affinity if the intersection would be empty. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> --- include/linux/irqdomain.h | 3 ++- kernel/irq/ipi.c | 2 +- kernel/irq/irqdomain.c | 45 +++++++++++++++++++++++++++++++++------ 3 files changed, 42 insertions(+), 8 deletions(-) diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 44445d9de881..6b5576da77f0 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -278,7 +278,8 @@ extern void irq_set_default_host(struct irq_domain *host); extern struct irq_domain *irq_get_default_host(void); extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, irq_hw_number_t hwirq, int node, - const struct irq_affinity_desc *affinity); + const struct irq_affinity_desc *affinity, + const struct cpumask *max_affinity); static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) { diff --git a/kernel/irq/ipi.c b/kernel/irq/ipi.c index 43e3d1be622c..13f56210eca9 100644 --- a/kernel/irq/ipi.c +++ b/kernel/irq/ipi.c @@ -75,7 +75,7 @@ int irq_reserve_ipi(struct irq_domain *domain, } } - virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE, NULL); + virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE, NULL, dest); if (virq <= 0) { pr_warn("Can't reserve IPI, failed to alloc descs\n"); return -ENOMEM; diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index c93e00ca11d8..ffd41f21afca 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -660,7 +660,8 @@ unsigned int irq_create_mapping(struct irq_domain *domain, } /* Allocate a virtual interrupt number */ - virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node), NULL); + virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node), + NULL, NULL); if (virq <= 0) { pr_debug("-> virq allocation failed\n"); return 0; @@ -1011,25 +1012,57 @@ int irq_domain_translate_twocell(struct irq_domain *d, EXPORT_SYMBOL_GPL(irq_domain_translate_twocell); int irq_domain_alloc_descs(int virq, unsigned int cnt, irq_hw_number_t hwirq, - int node, const struct irq_affinity_desc *affinity) + int node, const struct irq_affinity_desc *affinity, + const struct cpumask *max_affinity) { + cpumask_var_t default_affinity; unsigned int hint; + int i; + + /* Check requested per-IRQ affinities are in the possible range */ + if (affinity && max_affinity) { + for (i = 0; i < cnt; i++) + if (!cpumask_subset(&affinity[i].mask, max_affinity)) + return -EINVAL; + } + + /* + * Generate default affinity. Either the possible subset of + * irq_default_affinity if such a subset is non-empty, or fall + * back to the provided max_affinity if there is no intersection. + * And just a copy of irq_default_affinity in the + * !CONFIG_CPUMASK_OFFSTACK case. + */ + memset(&default_affinity, 0, sizeof(default_affinity)); + if ((max_affinity && + !cpumask_subset(irq_default_affinity, max_affinity))) { + if (!alloc_cpumask_var(&default_affinity, GFP_KERNEL)) + return -ENOMEM; + cpumask_and(default_affinity, max_affinity, + irq_default_affinity); + if (cpumask_empty(default_affinity)) + cpumask_copy(default_affinity, max_affinity); + } else if (cpumask_available(default_affinity)) + cpumask_copy(default_affinity, irq_default_affinity); if (virq >= 0) { virq = __irq_alloc_descs(virq, virq, cnt, node, THIS_MODULE, - affinity, NULL); + affinity, default_affinity); } else { hint = hwirq % nr_irqs; if (hint == 0) hint++; virq = __irq_alloc_descs(-1, hint, cnt, node, THIS_MODULE, - affinity, NULL); + affinity, default_affinity); if (virq <= 0 && hint > 1) { virq = __irq_alloc_descs(-1, 1, cnt, node, THIS_MODULE, - affinity, NULL); + affinity, default_affinity); } } + if (cpumask_available(default_affinity)) + free_cpumask_var(default_affinity); + return virq; } @@ -1342,7 +1375,7 @@ int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, virq = irq_base; } else { virq = irq_domain_alloc_descs(irq_base, nr_irqs, 0, node, - affinity); + affinity, NULL); if (virq < 0) { pr_debug("cannot allocate IRQ(base %d, count %d)\n", irq_base, nr_irqs); -- 2.26.2
next prev parent reply index Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-05 15:28 [PATCH 0/13] Fix per-domain IRQ affinity, allow >255 CPUs on x86 without IRQ remapping David Woodhouse 2020-10-05 15:28 ` [PATCH 01/13] x86/apic: Use x2apic in guest kernels even with unusable CPUs David Woodhouse 2020-10-05 15:28 ` [PATCH 02/13] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-06 20:45 ` Thomas Gleixner 2020-10-05 15:28 ` [PATCH 03/13] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-05 15:28 ` [PATCH 04/13] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse 2020-10-05 15:28 ` [PATCH 05/13] genirq: Prepare for default affinity to be passed to __irq_alloc_descs() David Woodhouse 2020-10-06 21:01 ` Thomas Gleixner 2020-10-06 21:07 ` David Woodhouse 2020-10-05 15:28 ` [PATCH 06/13] genirq: Add default_affinity argument " David Woodhouse 2020-10-06 21:06 ` Thomas Gleixner 2020-10-05 15:28 ` David Woodhouse [this message] 2020-10-06 21:26 ` [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs() Thomas Gleixner 2020-10-07 7:19 ` David Woodhouse 2020-10-07 13:37 ` Thomas Gleixner 2020-10-07 14:10 ` David Woodhouse 2020-10-07 15:57 ` Thomas Gleixner 2020-10-07 16:11 ` David Woodhouse 2020-10-07 20:53 ` Thomas Gleixner 2020-10-08 7:21 ` David Woodhouse 2020-10-08 9:34 ` Thomas Gleixner 2020-10-08 11:10 ` David Woodhouse 2020-10-08 12:40 ` Thomas Gleixner 2020-10-09 7:54 ` David Woodhouse 2020-10-05 15:28 ` [PATCH 08/13] genirq: Add irq_domain_set_affinity() David Woodhouse 2020-10-06 21:32 ` Thomas Gleixner 2020-10-07 7:22 ` David Woodhouse 2020-10-05 15:28 ` [PATCH 09/13] x86/irq: Add x86_non_ir_cpumask David Woodhouse 2020-10-06 21:42 ` Thomas Gleixner 2020-10-07 7:25 ` David Woodhouse 2020-10-05 15:28 ` [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR David Woodhouse 2020-10-06 21:54 ` Thomas Gleixner 2020-10-07 7:48 ` David Woodhouse 2020-10-07 12:59 ` Thomas Gleixner 2020-10-07 13:08 ` David Woodhouse 2020-10-07 14:05 ` Thomas Gleixner 2020-10-07 14:23 ` David Woodhouse 2020-10-07 16:02 ` Thomas Gleixner 2020-10-07 16:15 ` David Woodhouse 2020-10-07 15:05 ` David Woodhouse 2020-10-07 15:25 ` Thomas Gleixner 2020-10-07 15:46 ` David Woodhouse 2020-10-07 17:23 ` Thomas Gleixner 2020-10-07 17:34 ` David Woodhouse 2020-10-05 15:28 ` [PATCH 11/13] x86/smp: Allow more than 255 CPUs even without interrupt remapping David Woodhouse 2020-10-05 15:28 ` [PATCH 12/13] iommu/irq_remapping: Kill most of hyperv-iommu.c now it's redundant David Woodhouse 2020-10-05 15:28 ` [PATCH 13/13] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-07 8:14 ` Paolo Bonzini 2020-10-07 8:59 ` David Woodhouse 2020-10-07 11:15 ` Paolo Bonzini 2020-10-07 12:04 ` David Woodhouse
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