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From: Marc Zyngier <maz@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Frank Wunderlich <frank-w@public-files.de>,
	Thierry Reding <treding@nvidia.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh@kernel.org>, Will Deacon <will@kernel.org>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Bharat Kumar Gogada <bharatku@xilinx.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-hyperv@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-mediatek@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org, kernel-team@android.com
Subject: [PATCH v3 04/14] PCI: xilinx: Don't allocate extra memory for the MSI capture address
Date: Tue, 30 Mar 2021 16:11:35 +0100
Message-ID: <20210330151145.997953-5-maz@kernel.org> (raw)
In-Reply-To: <20210330151145.997953-1-maz@kernel.org>

A long cargo-culted behaviour of PCI drivers is to allocate memory
to obtain an address that is fed to the controller as the MSI
capture address (i.e. the MSI doorbell).

But there is no actual requirement for this address to be RAM.
All it needs to be is a suitable aligned address that will
*not* be DMA'd to.

Use the physical address of the 'port' data structure as the MSI
capture address, aligned on a 4K boundary.

Tested-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/pci/controller/pcie-xilinx.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/controller/pcie-xilinx.c b/drivers/pci/controller/pcie-xilinx.c
index fa5baeb82653..e127a7b6e535 100644
--- a/drivers/pci/controller/pcie-xilinx.c
+++ b/drivers/pci/controller/pcie-xilinx.c
@@ -94,7 +94,6 @@
  * struct xilinx_pcie_port - PCIe port information
  * @reg_base: IO Mapped Register Base
  * @irq: Interrupt number
- * @msi_pages: MSI pages
  * @dev: Device pointer
  * @msi_domain: MSI IRQ domain pointer
  * @leg_domain: Legacy IRQ domain pointer
@@ -103,7 +102,6 @@
 struct xilinx_pcie_port {
 	void __iomem *reg_base;
 	u32 irq;
-	unsigned long msi_pages;
 	struct device *dev;
 	struct irq_domain *msi_domain;
 	struct irq_domain *leg_domain;
@@ -274,10 +272,10 @@ static int xilinx_pcie_msi_setup_irq(struct msi_controller *chip,
 
 	irq_set_msi_desc(irq, desc);
 
-	msg_addr = virt_to_phys((void *)port->msi_pages);
+	msg_addr = ALIGN_DOWN(virt_to_phys(port), SZ_4K);
 
-	msg.address_hi = 0;
-	msg.address_lo = msg_addr;
+	msg.address_hi = upper_32_bits(msg_addr);
+	msg.address_lo = lower_32_bits(msg_addr);
 	msg.data = irq;
 
 	pci_write_msi_msg(irq, &msg);
@@ -330,13 +328,9 @@ static int xilinx_pcie_enable_msi(struct xilinx_pcie_port *port)
 {
 	phys_addr_t msg_addr;
 
-	port->msi_pages = __get_free_pages(GFP_KERNEL, 0);
-	if (!port->msi_pages)
-		return -ENOMEM;
-
-	msg_addr = virt_to_phys((void *)port->msi_pages);
-	pcie_write(port, 0x0, XILINX_PCIE_REG_MSIBASE1);
-	pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);
+	msg_addr = ALIGN_DOWN(virt_to_phys(port), SZ_4K);
+	pcie_write(port, upper_32_bits(msg_addr), XILINX_PCIE_REG_MSIBASE1);
+	pcie_write(port, lower_32_bits(msg_addr), XILINX_PCIE_REG_MSIBASE2);
 
 	return 0;
 }
-- 
2.29.2


  parent reply index

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-30 15:11 [PATCH v3 00/14] PCI/MSI: Getting rid of msi_controller, and other cleanups Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 01/14] PCI: tegra: Convert to MSI domains Marc Zyngier
2021-04-19 19:19   ` Jon Hunter
2021-04-19 20:02     ` Jon Hunter
     [not found]       ` <87fszlqria.wl-maz@kernel.org>
2021-04-20 12:45         ` Jon Hunter
2021-03-30 15:11 ` [PATCH v3 02/14] PCI: rcar: Don't allocate extra memory for the MSI capture address Marc Zyngier
2021-03-30 15:28   ` Lorenzo Pieralisi
2021-04-01 10:59     ` Yoshihiro Shimoda
2021-03-30 15:11 ` [PATCH v3 03/14] PCI: rcar: Convert to MSI domains Marc Zyngier
2021-04-01 10:19   ` Lorenzo Pieralisi
2021-04-01 10:38     ` Marc Zyngier
2021-04-01 11:03       ` Lorenzo Pieralisi
2021-03-30 15:11 ` Marc Zyngier [this message]
2021-03-30 15:11 ` [PATCH v3 05/14] PCI: xilinx: " Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 06/14] PCI: hv: Drop msi_controller structure Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 07/14] PCI/MSI: Drop use of msi_controller from core code Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 08/14] PCI/MSI: Kill msi_controller structure Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 09/14] PCI/MSI: Kill default_teardown_msi_irqs() Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 10/14] PCI/MSI: Let PCI host bridges declare their reliance on MSI domains Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 11/14] PCI/MSI: Make pci_host_common_probe() declare its " Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 12/14] PCI: mediatek: Advertise lack of built-in MSI handling Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 13/14] PCI/MSI: Document the various ways of ending up with NO_MSI Marc Zyngier
2021-05-18  4:28   ` Jeremy Linton
2021-05-18  8:59     ` Marc Zyngier
2021-03-30 15:11 ` [PATCH v3 14/14] PCI: Refactor HT advertising of NO_MSI flag Marc Zyngier
2021-04-01 11:27 ` [PATCH v3 00/14] PCI/MSI: Getting rid of msi_controller, and other cleanups Lorenzo Pieralisi
2021-04-01 12:07   ` Marc Zyngier

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