From: Vineeth Pillai <viremana@linux.microsoft.com>
To: Wei Liu <wei.liu@kernel.org>
Cc: Lan Tianyu <Tianyu.Lan@microsoft.com>,
Michael Kelley <mikelley@microsoft.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Stephen Hemminger <sthemmin@microsoft.com>,
Haiyang Zhang <haiyangz@microsoft.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"K. Y. Srinivasan" <kys@microsoft.com>,
x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org,
viremana@linux.microsoft.com
Subject: Re: [PATCH v2 2/7] hyperv: SVM enlightened TLB flush support flag
Date: Wed, 21 Apr 2021 07:15:54 -0400 [thread overview]
Message-ID: <4a57cd2b-43b5-2625-3663-449ffa715b51@linux.microsoft.com> (raw)
In-Reply-To: <20210421100026.4hcgrxeri444if45@liuwe-devbox-debian-v2>
On 4/21/21 6:00 AM, Wei Liu wrote:
> On Thu, Apr 15, 2021 at 01:43:37PM +0000, Vineeth Pillai wrote:
>>
>> +/*
>> + * This is specific to AMD and specifies that enlightened TLB flush is
>> + * supported. If guest opts in to this feature, ASID invalidations only
>> + * flushes gva -> hpa mapping entries. To flush the TLB entries derived
>> + * from NPT, hypercalls should be used (HvFlushGuestPhysicalAddressSpace
>> + * or HvFlushGuestPhysicalAddressList).
>> + */
>> +#define HV_X64_NESTED_ENLIGHTENED_TLB BIT(22)
>> +
> c
> This is not yet documented in TLFS, right? I can't find this bit in the
> latest edition (6.0b).
This would be documented in the TLFS update which is soon to be
released.
>
> My first thought is the comment says this is AMD specific but the name
> is rather generic. That looks a bit odd to begin with.
I thought of of keeping the name generic to avoid renaming Intel
specific ones also. If I understand correctly, the TLFS would also
be having generic name for this and just translated the generic
name here in this header.
Thanks,
Vineeth
next prev parent reply other threads:[~2021-04-21 11:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-15 13:43 [PATCH v2 0/7] Hyper-V nested virt enlightenments for SVM Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 1/7] hyperv: Detect Nested virtualization support " Vineeth Pillai
2021-04-16 8:26 ` Vitaly Kuznetsov
2021-04-16 16:10 ` Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 2/7] hyperv: SVM enlightened TLB flush support flag Vineeth Pillai
2021-04-21 10:00 ` Wei Liu
2021-04-21 11:15 ` Vineeth Pillai [this message]
2021-04-21 13:20 ` Wei Liu
2021-04-15 13:43 ` [PATCH v2 3/7] KVM: x86: hyper-v: Move the remote TLB flush logic out of vmx Vineeth Pillai
2021-04-16 8:36 ` Vitaly Kuznetsov
2021-04-16 8:40 ` Paolo Bonzini
2021-04-16 16:39 ` Vineeth Pillai
2021-04-20 15:57 ` Vitaly Kuznetsov
2021-04-15 13:43 ` [PATCH v2 4/7] KVM: SVM: hyper-v: Nested enlightenments in VMCB Vineeth Pillai
2021-04-16 8:58 ` Vitaly Kuznetsov
2021-04-16 17:07 ` Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 5/7] KVM: SVM: hyper-v: Remote TLB flush for SVM Vineeth Pillai
2021-04-16 9:04 ` Vitaly Kuznetsov
2021-04-16 17:26 ` Vineeth Pillai
2021-04-21 14:03 ` Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 6/7] KVM: SVM: hyper-v: Enlightened MSR-Bitmap support Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 7/7] KVM: SVM: hyper-v: Direct Virtual Flush support Vineeth Pillai
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