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b=MiyUdSPO+bq6rscKv8Eli56Y3rMCtp5Wz3tWLD/KkjPQ+4vN8MZafs4xpCgZxCNcBKrGRmRX8Qa4sDT3QhEe0tNwVFB1vUMVKiOBqewHhXyvH9WLV+ww0e4Tykrvtb/mm7xiVoWFRazXyTMa781E6HvxVxF0ZVq2OCAupxrlwJE= Received: from BYAPR21MB1688.namprd21.prod.outlook.com (2603:10b6:a02:bf::26) by MN2PR21MB1503.namprd21.prod.outlook.com (2603:10b6:208:1f7::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5944.0; Tue, 13 Dec 2022 17:19:26 +0000 Received: from BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd]) by BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::1e50:78ec:6954:d6dd%8]) with mapi id 15.20.5944.002; Tue, 13 Dec 2022 17:19:26 +0000 From: "Michael Kelley (LINUX)" To: Tianyu Lan , "luto@kernel.org" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "seanjc@google.com" , "pbonzini@redhat.com" , "jgross@suse.com" , Tianyu Lan , "kirill@shutemov.name" , "jiangshan.ljs@antgroup.com" , "peterz@infradead.org" , "ashish.kalra@amd.com" , "srutherford@google.com" , "akpm@linux-foundation.org" , "anshuman.khandual@arm.com" , "pawan.kumar.gupta@linux.intel.com" , "adrian.hunter@intel.com" , "daniel.sneddon@linux.intel.com" , "alexander.shishkin@linux.intel.com" , "sandipan.das@amd.com" , "ray.huang@amd.com" , "brijesh.singh@amd.com" , "michael.roth@amd.com" , "thomas.lendacky@amd.com" , "venu.busireddy@oracle.com" , "sterritt@google.com" , "tony.luck@intel.com" , "samitolvanen@google.com" , "fenghua.yu@intel.com" CC: "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "linux-arch@vger.kernel.org" Subject: RE: [RFC PATCH V2 06/18] x86/hyperv: Use vmmcall to implement hvcall in sev-snp enlightened guest Thread-Topic: [RFC PATCH V2 06/18] x86/hyperv: Use vmmcall to implement hvcall in sev-snp enlightened guest Thread-Index: AQHY+8mhT4urGRjzaU6DopEVErqwfq5sL68w Date: Tue, 13 Dec 2022 17:19:25 +0000 Message-ID: References: <20221119034633.1728632-1-ltykernel@gmail.com> <20221119034633.1728632-7-ltykernel@gmail.com> In-Reply-To: <20221119034633.1728632-7-ltykernel@gmail.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=fd3bca26-1a03-43d2-bf71-8c8d7a67c50e;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2022-12-13T16:54:57Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 200a28ec-29e4-458e-7b83-08dadd2e2f46 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Dec 2022 17:19:25.7103 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: MQI3qbDMhKTRRG7D+2iiduJXiIDxm3NSJevQAl8AQg/WTBqzDHnbbv/Ies+riqovwmd+Afyv4TOYPrwoGlHsiSKEU5qRIwhaD2Wd+iSAYc0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR21MB1503 Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org From: Tianyu Lan Sent: Friday, November 18, 2022 7:46= PM >=20 > In sev-snp enlightened guest, hvcall needs to use vmmcall to trigger What does "hvcall" refer to here? Is this a Hyper-V hypercall, or just a generic hypervisor call? > vmexit and notify hypervisor to handle hypercall request. >=20 > Signed-off-by: Tianyu Lan > --- > arch/x86/include/asm/mshyperv.h | 66 ++++++++++++++++++++++----------- > 1 file changed, 45 insertions(+), 21 deletions(-) >=20 > diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyp= erv.h > index 9b8c3f638845..28d5429e33c9 100644 > --- a/arch/x86/include/asm/mshyperv.h > +++ b/arch/x86/include/asm/mshyperv.h > @@ -45,16 +45,25 @@ static inline u64 hv_do_hypercall(u64 control, void *= input, void *output) > u64 hv_status; >=20 > #ifdef CONFIG_X86_64 > - if (!hv_hypercall_pg) > - return U64_MAX; > + if (hv_isolation_type_en_snp()) { > + __asm__ __volatile__("mov %4, %%r8\n" > + "vmmcall" > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input_address) > + : "r" (output_address) > + : "cc", "memory", "r8", "r9", "r10", "r11"); > + } else { > + if (!hv_hypercall_pg) > + return U64_MAX; >=20 > - __asm__ __volatile__("mov %4, %%r8\n" > - CALL_NOSPEC > - : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > - "+c" (control), "+d" (input_address) > - : "r" (output_address), > - THUNK_TARGET(hv_hypercall_pg) > - : "cc", "memory", "r8", "r9", "r10", "r11"); > + __asm__ __volatile__("mov %4, %%r8\n" > + CALL_NOSPEC > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input_address) > + : "r" (output_address), > + THUNK_TARGET(hv_hypercall_pg) > + : "cc", "memory", "r8", "r9", "r10", "r11"); > + } > #else > u32 input_address_hi =3D upper_32_bits(input_address); > u32 input_address_lo =3D lower_32_bits(input_address); > @@ -82,12 +91,18 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64= input1) > u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; >=20 > #ifdef CONFIG_X86_64 > - { > + if (hv_isolation_type_en_snp()) { > + __asm__ __volatile__( > + "vmmcall" > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input1) > + :: "cc", "r8", "r9", "r10", "r11"); > + } else { > __asm__ __volatile__(CALL_NOSPEC > - : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > - "+c" (control), "+d" (input1) > - : THUNK_TARGET(hv_hypercall_pg) > - : "cc", "r8", "r9", "r10", "r11"); > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input1) > + : THUNK_TARGET(hv_hypercall_pg) > + : "cc", "r8", "r9", "r10", "r11"); The above 4 lines appear to just have changes in indentation. Maybe there's value in having the same indentation as the new code you've added, so I won't object if you want to keep the changes. > } > #else > { > @@ -113,14 +128,21 @@ static inline u64 hv_do_fast_hypercall16(u16 code, = u64 input1, u64 input2) > u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; >=20 > #ifdef CONFIG_X86_64 > - { > + if (hv_isolation_type_en_snp()) { > __asm__ __volatile__("mov %4, %%r8\n" > - CALL_NOSPEC > - : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > - "+c" (control), "+d" (input1) > - : "r" (input2), > - THUNK_TARGET(hv_hypercall_pg) > - : "cc", "r8", "r9", "r10", "r11"); > + "vmmcall" > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input1) > + : "r" (input2) > + : "cc", "r8", "r9", "r10", "r11"); > + } else { > + __asm__ __volatile__("mov %4, %%r8\n" > + CALL_NOSPEC > + : "=3Da" (hv_status), ASM_CALL_CONSTRAINT, > + "+c" (control), "+d" (input1) > + : "r" (input2), > + THUNK_TARGET(hv_hypercall_pg) > + : "cc", "r8", "r9", "r10", "r11"); Same here. Above 5 lines appear to be changes only in indentation. > } > #else > { > @@ -177,6 +199,7 @@ int hv_map_ioapic_interrupt(int ioapic_id, bool level= , int vcpu, > int vector, > struct hv_interrupt_entry *entry); > int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *= entry); > int hv_set_mem_host_visibility(unsigned long addr, int numpages, bool vi= sible); > +int hv_snp_boot_ap(int cpu, unsigned long start_ip); This declaration doesn't seem to belong in this patch. It should be in Patch 13 of the series. >=20 > #ifdef CONFIG_AMD_MEM_ENCRYPT > void hv_ghcb_msr_write(u64 msr, u64 value); > @@ -191,6 +214,7 @@ static inline void hv_ghcb_terminate(unsigned int set= , unsigned > int reason) {} > #endif >=20 > extern bool hv_isolation_type_snp(void); > +extern bool hv_isolation_type_en_snp(void); This declaration seems to be a duplicate that doesn't belong in this patch. >=20 > static inline bool hv_is_synic_reg(unsigned int reg) > { > -- > 2.25.1