From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2576C433FE for ; Thu, 3 Nov 2022 03:31:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230494AbiKCDbU (ORCPT ); Wed, 2 Nov 2022 23:31:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231363AbiKCDbC (ORCPT ); Wed, 2 Nov 2022 23:31:02 -0400 Received: from na01-obe.outbound.protection.outlook.com (mail-eastusazon11020024.outbound.protection.outlook.com [52.101.51.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18770167F6; Wed, 2 Nov 2022 20:30:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=egSoA9Mx2H+FiBAbNN8BTtyxZ5lpSBVKN1e3+6Y3kKE9tgM0N7PONpJ6Kse5iNC6MLNTABDCo8giw211wr1Q5dVau8JemkcpgpfPDGVjKeiF9Fb2TOvVdpim+vhWs1re/QsOWTyvHeEUmfRMGPi8q+Yvyfipti9wSWnrUczId/OYNGxCNhk0Mh+2eOIaxwkvI2yPxDkHHze5jCaARVXT3Gmb0yAdYcHgdd3tHjyTwBJnvwzaUwOUkRzixAV4ykkQ6xTTsH39998Za9FfVdXlygNVWRHtpz2jckLO9yPTMTmDqHSS2tzOi8ciDRC/KzeyuSePLraavURX1wttp0RFag== ARC-Message-Signature: i=1; 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b=Ru1NMxk9O5/aEo+ZzFJbaiIbVfakYgUVTGB9QW/nr7yvAbgYuqXQ2UvLn4RCBuHrFQvTfu55y1mSdkHaaNXtEwb/+BUOdWx8ty6twWq+tPO8MMGmZf+Z1YJCZJODC7MVz2Q5FOXB6pi35AtBGWtg0QiLJLkopeALSDmdFDAIUt8= Received: from BYAPR21MB1688.namprd21.prod.outlook.com (2603:10b6:a02:bf::26) by CY5PR21MB3660.namprd21.prod.outlook.com (2603:10b6:930:2c::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.4; Thu, 3 Nov 2022 03:30:13 +0000 Received: from BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::f565:80ed:8070:474b]) by BYAPR21MB1688.namprd21.prod.outlook.com ([fe80::f565:80ed:8070:474b%8]) with mapi id 15.20.5813.004; Thu, 3 Nov 2022 03:30:13 +0000 From: "Michael Kelley (LINUX)" To: Jinank Jain , Jinank Jain CC: KY Srinivasan , Haiyang Zhang , "sthemmin@microsoft.com" , "wei.liu@kernel.org" , Dexuan Cui , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "arnd@arndb.de" , "peterz@infradead.org" , "jpoimboe@kernel.org" , "seanjc@google.com" , "kirill.shutemov@linux.intel.com" , "ak@linux.intel.com" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "linux-hyperv@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arch@vger.kernel.org" Subject: RE: [PATCH v2 3/5] hv: Add an interface to do nested hypercalls Thread-Topic: [PATCH v2 3/5] hv: Add an interface to do nested hypercalls Thread-Index: AQHY7toFMRGwfG8Yo0mw2/kFpX79Wq4sg8fQ Date: Thu, 3 Nov 2022 03:30:12 +0000 Message-ID: References: <0a960bee61e46c4e368f351d3cf40d60ff28ca8b.1667406350.git.jinankjain@linux.microsoft.com> In-Reply-To: <0a960bee61e46c4e368f351d3cf40d60ff28ca8b.1667406350.git.jinankjain@linux.microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=a6e2cf2c-671d-4cac-bdf7-47f2f7c88bbc;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2022-11-03T03:02:43Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5fa92167-efc7-4a35-bbfd-08dabd4bb7c5 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Nov 2022 03:30:12.9576 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 2QVNDsfNN5nY00uYghXsxGAJ1l1azEyTZyzWJsBnzBl+blAtYRB6mDfceeOE4Lh8+Ks9XFapEbaVUmNWd+s872gB8yeV72RbRvXBGtu59Ss= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR21MB3660 Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org From: Jinank Jain Sent: Wednesday, Novembe= r 2, 2022 9:36 AM >=20 > According to TLFS, in order to communicate to L0 hypervisor there needs > to be an additional bit set in the control register. This communication > is required to perform priviledged instructions which can only be > performed by L0 hypervisor. An example of that could be setting up the > VMBus infrastructure. >=20 > Signed-off-by: Jinank Jain > --- > arch/x86/include/asm/hyperv-tlfs.h | 3 ++- > arch/x86/include/asm/mshyperv.h | 42 +++++++++++++++++++++++++++--- > include/asm-generic/hyperv-tlfs.h | 1 + > include/asm-generic/mshyperv.h | 1 + > 4 files changed, 42 insertions(+), 5 deletions(-) >=20 > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hy= perv-tlfs.h > index 0319091e2019..fd066226f12b 100644 > --- a/arch/x86/include/asm/hyperv-tlfs.h > +++ b/arch/x86/include/asm/hyperv-tlfs.h > @@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control { > __u32 reserved:31; > } features; > struct { > - __u32 reserved; > + __u32 inter_partition_comm:1; > + __u32 reserved:31; > } hypercallControls; > } __packed; >=20 > diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyp= erv.h > index 415289757428..451d8c3ab63b 100644 > --- a/arch/x86/include/asm/mshyperv.h > +++ b/arch/x86/include/asm/mshyperv.h > @@ -74,10 +74,16 @@ static inline u64 hv_do_hypercall(u64 control, void *= input, void > *output) > return hv_status; > } >=20 > +/* Hypercall to the L0 hypervisor */ > +static inline u64 hv_do_nested_hypercall(u64 control, void *input, void = *output) > +{ > + return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output); > +} > + > /* Fast hypercall with 8 bytes of input and no output */ > -static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) > +static inline u64 _hv_do_fast_hypercall8(u64 control, u16 code, u64 inpu= t1) > { > - u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + u64 hv_status; >=20 > #ifdef CONFIG_X86_64 > { > @@ -105,10 +111,24 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u= 64 input1) > return hv_status; > } >=20 > +static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + > + return _hv_do_fast_hypercall8(control, code, input1); > +} > + > +static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED= ; > + > + return _hv_do_fast_hypercall8(control, code, input1); > +} > + > /* Fast hypercall with 16 bytes of input */ > -static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input= 2) > +static inline u64 _hv_do_fast_hypercall16(u64 control, u16 code, u64 inp= ut1, u64 input2) > { > - u64 hv_status, control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + u64 hv_status; >=20 > #ifdef CONFIG_X86_64 > { > @@ -139,6 +159,20 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u= 64 input1, u64 input2) > return hv_status; > } >=20 > +static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input= 2) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT; > + > + return _hv_do_fast_hypercall16(control, code, input1, input2); > +} > + > +static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u6= 4 input2) > +{ > + u64 control =3D (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED= ; > + > + return _hv_do_fast_hypercall16(control, code, input1, input2); > +} > + > extern struct hv_vp_assist_page **hv_vp_assist_page; >=20 > static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned i= nt cpu) > diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hype= rv-tlfs.h > index fdce7a4cfc6f..c67836dd8468 100644 > --- a/include/asm-generic/hyperv-tlfs.h > +++ b/include/asm-generic/hyperv-tlfs.h > @@ -185,6 +185,7 @@ enum HV_GENERIC_SET_FORMAT { > #define HV_HYPERCALL_VARHEAD_OFFSET 17 > #define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17) > #define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27) > +#define HV_HYPERCALL_NESTED BIT(31) Since it is used with a bunch of other u64 values, the above should probably be BIT_ULL(31). > #define HV_HYPERCALL_REP_COMP_OFFSET 32 > #define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32) > #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32) > diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyper= v.h > index bfb9eb9d7215..a2524d96ce2d 100644 > --- a/include/asm-generic/mshyperv.h > +++ b/include/asm-generic/mshyperv.h > @@ -53,6 +53,7 @@ extern void * __percpu *hyperv_pcpu_input_arg; > extern void * __percpu *hyperv_pcpu_output_arg; >=20 > extern u64 hv_do_hypercall(u64 control, void *inputaddr, void *outputadd= r); > +extern u64 hv_do_nested_hypercall(u64 control, void *inputaddr, void *ou= tputaddr); Is this needed? hv_do_nested_hypercall() is implemented as a static inline function in the x86-specific version of mshyperv.h, so this seems duplicati= ve. But maybe I'm missing something .... > extern u64 hv_do_fast_hypercall8(u16 control, u64 input8); > extern bool hv_isolation_type_snp(void); >=20 > -- > 2.25.1