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Mon, 17 May 2021 17:27:49 +0000 From: Michael Kelley To: Mark Rutland CC: "will@kernel.org" , "catalin.marinas@arm.com" , "lorenzo.pieralisi@arm.com" , "sudeep.holla@arm.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "linux-efi@vger.kernel.org" , "arnd@arndb.de" , "wei.liu@kernel.org" , "ardb@kernel.org" , "daniel.lezcano@linaro.org" , KY Srinivasan Subject: RE: [PATCH v10 3/7] arm64: hyperv: Add Hyper-V clocksource/clockevent support Thread-Topic: [PATCH v10 3/7] arm64: hyperv: Add Hyper-V clocksource/clockevent support Thread-Index: AQHXR1WfRNuOt4THnkSQtAriU3aWFKri7Q2AgAAsnCCABJMQgIAAO7hQ Date: Mon, 17 May 2021 17:27:49 +0000 Message-ID: References: <1620841067-46606-1-git-send-email-mikelley@microsoft.com> <1620841067-46606-4-git-send-email-mikelley@microsoft.com> <20210514123711.GB30645@C02TD0UTHF1T.local> <20210517130815.GC62656@C02TD0UTHF1T.local> In-Reply-To: <20210517130815.GC62656@C02TD0UTHF1T.local> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=64b36f6f-5fad-4b61-b0f2-4e651fd5b71c;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2021-05-17T16:41:59Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MWHPR21MB1593.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d4c8c0b7-4477-4a47-d9b7-08d919591817 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 May 2021 17:27:49.5476 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: vkGNcDQ0njV0GhWcruLAL70CHC/Fyio/yHr8iONqZTeaSmJ0pN2lzMY37oRnhAA+hiGR48kEGsfkctpvi1gZfXX9pqYsXg1721sQzrXT0f4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR2101MB0937 Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org From: Mark Rutland Sent: Monday, May 17, 2021 6:08 A= M >=20 > On Fri, May 14, 2021 at 03:35:15PM +0000, Michael Kelley wrote: > > From: Mark Rutland Sent: Friday, May 14, 2021 5:= 37 AM > > > On Wed, May 12, 2021 at 10:37:43AM -0700, Michael Kelley wrote: > > > > Add architecture specific definitions and functions needed > > > > by the architecture independent Hyper-V clocksource driver. > > > > Update the Hyper-V clocksource driver to be initialized > > > > on ARM64. > > > > > > Previously we've said that for a clocksource we must use the architec= ted > > > counter, since that's necessary for things like the VDSO to work > > > correctly and efficiently. > > > > > > Given that, I'm a bit confused that we're registering a per-cpu > > > clocksource that is in part based on the architected counter. Likewis= e, > > > I don't entirely follow why it's necessary to PV the clock_event_devi= ce. > > > > > > Are the architected counter and timer reliable without this PV > > > infrastructure? Why do we need to PV either of those? > > > > > > Thanks, > > > Mark. > > > > For the clocksource, we have a requirement to live migrate VMs > > between Hyper-V hosts running on hardware that may have different > > arch counter frequencies (it's not conformant to the ARM v8.6 1 GHz > > requirement). The Hyper-V virtualization does scaling to handle the > > frequency difference. And yes, there's a tradeoff with vDSO not > > working, though we have an out-of-tree vDSO implementation that > > we can use when necessary. >=20 > Just to be clear, the vDSO is *one example* of something that won't > function correctly. More generally, because this undermines core > architectural guarantees, it requires more invasive changes (e.g. we'd > have to weaken the sanity checks, and not use the counter in things like > kexec paths), impacts any architectural features tied to the generic > timer/counter (e.g. the event stream, SPE and tracing, future features), > and means that other SW (e.g. bootloaders and other EFI applications) > are unlikley to function correctly in this environment. >=20 > I am very much not keen on trying to PV this. >=20 > What does the guest see when it reads CNTFRQ_EL0? Does this match the > real HW value (and can this change over time)? Or is this entirely > synthetic? >=20 > What do the ACPI tables look like in the guest? Is there a GTDT table at > all? >=20 > How does the counter event stream behave? >=20 > Are there other architectural features which Hyper-V does not implement > for a guest? >=20 > Is there anything else that may change across a migration? e.g. MIDR? > MPIDR? Any of the ID registers? The ARMv8 architectural system counter and associated registers are visible and functional in a VM on Hyper-V. The "arch_sys_counter" clocksource is instantiated by the arm_arch_timer.c driver based on the GTDT in the guest, and a Linux guest on Hyper-V runs fine with this clocksource. Low level co= de like bootloaders and EFI applications work normally. The Hyper-V virtualization provides another Linux clocksource that is an overlay on the arch counter and that provides time consistency across a liv= e migration. Live migration of ARM64 VMs on Hyper-V is not functional today, but the Hyper-V team believes they can make it functional. I have not explored with them the live migration implications of things beyond time consistency, like event streams, CNTFRQ_EL0, MIDR/MPIDR, etc. Would a summary of your point be that live migration across hardware with different arch counter frequencies is likely to not be possible with 100% fidelity because of these other dependencies on the arch counter frequency? (hence the fixed 1 GHz frequency in ARM v8.6) >=20 > > For clockevents, the only timer interrupt that Hyper-V provides > > in a guest VM is its virtualized "STIMER" interrupt. There's no > > virtualization of the ARM arch timer in the guest. >=20 > I think that is rather unfortunate, given it's a core architectural > feature. Is it just the interrupt that's missing? i.e. does all the > PE-local functionality behave as the architecture requires? Right off the bat, I don't know about timer-related PE-local functionality as it's not exercised in a Linux VM on Hyper-V that is using STIMER-based clockevents. I'll explore with the Hyper-V team. My impression is that enabling the ARM arch timer in a guest VM is more work for Hyper-V than just wiring up an interrupt. Michael >=20 > Thanks, > Mark. >=20 > > > > > > > > > > Signed-off-by: Michael Kelley > > > > Reviewed-by: Sunil Muthuswamy > > > > --- > > > > arch/arm64/include/asm/mshyperv.h | 12 ++++++++++++ > > > > drivers/clocksource/hyperv_timer.c | 14 ++++++++++++++ > > > > 2 files changed, 26 insertions(+) > > > > > > > > diff --git a/arch/arm64/include/asm/mshyperv.h > b/arch/arm64/include/asm/mshyperv.h > > > > index c448704..b17299c 100644 > > > > --- a/arch/arm64/include/asm/mshyperv.h > > > > +++ b/arch/arm64/include/asm/mshyperv.h > > > > @@ -21,6 +21,7 @@ > > > > #include > > > > #include > > > > #include > > > > +#include > > > > > > > > /* > > > > * Declare calls to get and set Hyper-V VP register values on ARM6= 4, which > > > > @@ -41,6 +42,17 @@ static inline u64 hv_get_register(unsigned int r= eg) > > > > return hv_get_vpreg(reg); > > > > } > > > > > > > > +/* Define the interrupt ID used by STIMER0 Direct Mode interrupts.= This > > > > + * value can't come from ACPI tables because it is needed before t= he > > > > + * Linux ACPI subsystem is initialized. > > > > + */ > > > > +#define HYPERV_STIMER0_VECTOR 31 > > > > + > > > > +static inline u64 hv_get_raw_timer(void) > > > > +{ > > > > + return arch_timer_read_counter(); > > > > +} > > > > + > > > > /* SMCCC hypercall parameters */ > > > > #define HV_SMCCC_FUNC_NUMBER 1 > > > > #define HV_FUNC_ID ARM_SMCCC_CALL_VAL( \ > > > > diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksour= ce/hyperv_timer.c > > > > index 977fd05..270ad9c 100644 > > > > --- a/drivers/clocksource/hyperv_timer.c > > > > +++ b/drivers/clocksource/hyperv_timer.c > > > > @@ -569,3 +569,17 @@ void __init hv_init_clocksource(void) > > > > hv_setup_sched_clock(read_hv_sched_clock_msr); > > > > } > > > > EXPORT_SYMBOL_GPL(hv_init_clocksource); > > > > + > > > > +/* Initialize everything on ARM64 */ > > > > +static int __init hyperv_timer_init(struct acpi_table_header *tabl= e) > > > > +{ > > > > + if (!hv_is_hyperv_initialized()) > > > > + return -EINVAL; > > > > + > > > > + hv_init_clocksource(); > > > > + if (hv_stimer_alloc(true)) > > > > + return -EINVAL; > > > > + > > > > + return 0; > > > > +} > > > > +TIMER_ACPI_DECLARE(hyperv, ACPI_SIG_GTDT, hyperv_timer_init); > > > > -- > > > > 1.8.3.1 > > > >