From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED3F1C433FE for ; Tue, 29 Nov 2022 17:47:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235936AbiK2RrO (ORCPT ); Tue, 29 Nov 2022 12:47:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235857AbiK2RrM (ORCPT ); Tue, 29 Nov 2022 12:47:12 -0500 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B239754B1B; Tue, 29 Nov 2022 09:47:11 -0800 (PST) Received: from zn.tnic (p200300ea9733e724329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:9733:e724:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id DDD711EC04CB; Tue, 29 Nov 2022 18:47:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1669744029; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=JYhgRUKR3FJNpFBq84Sg5nW8vU15kq68SWoPzofwG0Q=; b=C9yhgsGHLVsG8saaLstTe4dmxJhjJrBTCPd3mxTbQfv/ZNKgNmjwaJFRkyIDeReJdY8oJp ijIxUTdRKklOYNwQC8739rCLHnOBfPiMOPxKOA45aWsUni+NS12zAui7+VMmWL4BjXL+IF GJdt2hcUVZySzvYGVvQ2SxFp4+cFRpM= Date: Tue, 29 Nov 2022 18:47:06 +0100 From: Borislav Petkov To: "Michael Kelley (LINUX)" Cc: "thomas.lendacky@amd.com" , "hpa@zytor.com" , KY Srinivasan , Haiyang Zhang , "wei.liu@kernel.org" , Dexuan Cui , "luto@kernel.org" , "peterz@infradead.org" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "lpieralisi@kernel.org" , "robh@kernel.org" , "kw@linux.com" , "bhelgaas@google.com" , "arnd@arndb.de" , "hch@infradead.org" , "m.szyprowski@samsung.com" , "robin.murphy@arm.com" , "brijesh.singh@amd.com" , "tglx@linutronix.de" , "mingo@redhat.com" , "dave.hansen@linux.intel.com" , Tianyu Lan , "kirill.shutemov@linux.intel.com" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "ak@linux.intel.com" , "isaku.yamahata@intel.com" , "Williams, Dan J" , "jane.chu@oracle.com" , "seanjc@google.com" , "tony.luck@intel.com" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-arch@vger.kernel.org" , "iommu@lists.linux.dev" Subject: Re: [Patch v3 07/14] x86/hyperv: Change vTOM handling to use standard coco mechanisms Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org On Tue, Nov 29, 2022 at 03:49:06PM +0000, Michael Kelley (LINUX) wrote: > But it turns out that AMD really has two fairly different schemes: > the C-bit scheme and the vTOM scheme. Except it doesn't: "In the VMSA of an SNP-active guest, the VIRTUAL_TOM field designates a 2MB aligned guest physical address called the virtual top of memory. When bit 1 (vTOM) of SEV_FEATURES is set in the VMSA of an SNP-active VM, the VIRTUAL_TOM..." So SEV_FEATURES[1] is vTOM and it is part of SNP. Why do you keep harping on this being something else is beyond me... I already pointed you to the patch which adds this along with the other SEV_FEATURES. > The details of these two AMD schemes are pretty different. vTOM is > *not* just a minor option on the C-bit scheme. It's an either/or -- a > guest VM is either doing the C-bit scheme or the vTOM scheme, not some > combination. Linux code in coco/core.c could choose to treat C-bit and > vTOM as two sub-schemes under CC_VENDOR_AMD, but that makes the code a > bit messy because we end up with "if" statements to figure out whether > to do things the C-bit way or the vTOM way. Are you saying that that: if (cc_vendor == CC_VENDOR_AMD && sev_features & MSR_AMD64_SNP_VTOM_ENABLED) is messy? Why? We will have to support vTOM sooner or later. > Or we could model the two AMD schemes as two different vendors, > which is what I'm suggesting. Doing so recognizes that the two schemes > are fairly disjoint, and it makes the code cleaner. How is that any different from the above check? You *need* some sort of a check to differentiate between the two anyway. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette