From: Borislav Petkov <bp@alien8.de>
To: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Tianyu Lan <ltykernel@gmail.com>,
kys@microsoft.com, haiyangz@microsoft.com,
sthemmin@microsoft.com, wei.liu@kernel.org, decui@microsoft.com,
tglx@linutronix.de, mingo@redhat.com, x86@kernel.org,
hpa@zytor.com, dave.hansen@linux.intel.com, luto@kernel.org,
peterz@infradead.org, davem@davemloft.net, kuba@kernel.org,
gregkh@linuxfoundation.org, arnd@arndb.de, brijesh.singh@amd.com,
jroedel@suse.de, Tianyu.Lan@microsoft.com, pgonda@google.com,
akpm@linux-foundation.org, rppt@kernel.org,
kirill.shutemov@linux.intel.com, saravanand@fb.com,
aneesh.kumar@linux.ibm.com, rientjes@google.com, tj@kernel.org,
michael.h.kelley@microsoft.com, linux-arch@vger.kernel.org,
linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, vkuznets@redhat.com,
konrad.wilk@oracle.com, hch@lst.de, robin.murphy@arm.com,
joro@8bytes.org, parri.andrea@gmail.com, dave.hansen@intel.com
Subject: Re: [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb page
Date: Thu, 30 Sep 2021 20:33:44 +0200 [thread overview]
Message-ID: <YVYDCHavgLb6WFiM@zn.tnic> (raw)
In-Reply-To: <0f33ca85-f1c6-bab3-5bdb-233c09f86621@amd.com>
On Thu, Sep 30, 2021 at 01:27:20PM -0500, Tom Lendacky wrote:
> > + if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1)
>
> Really, any non-zero value indicates an error, so this should be:
>
> if (ghcb->save.sw_exit_info_1 & 0xffffffff)
That's ok but that should be a separate patch - first patch splits the
function and second changes the functionality.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2021-09-30 18:33 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-30 13:05 [PATCH V6 0/8] x86/Hyper-V: Add Hyper-V Isolation VM support(First part) Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 1/8] x86/hyperv: Initialize GHCB page in Isolation VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 2/8] x86/hyperv: Initialize shared memory boundary in the " Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 3/8] x86/hyperv: Add new hvcall guest address host visibility support Tianyu Lan
2021-09-30 18:02 ` Borislav Petkov
2021-10-01 13:17 ` Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 4/8] Drivers: hv: vmbus: Mark vmbus ring buffer visible to host in Isolation VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb page Tianyu Lan
2021-09-30 18:20 ` Borislav Petkov
2021-10-01 13:31 ` Tianyu Lan
2021-09-30 18:27 ` Tom Lendacky
2021-09-30 18:33 ` Borislav Petkov [this message]
2021-10-01 13:44 ` Tianyu Lan
2021-09-30 18:34 ` Tom Lendacky
2021-09-30 13:05 ` [PATCH V6 6/8] x86/hyperv: Add ghcb hvcall support for SNP VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 7/8] Drivers: hv: vmbus: Add SNP support for VMbus channel initiate message Tianyu Lan
2021-10-02 13:26 ` Michael Kelley
2021-10-02 14:39 ` Tianyu Lan
2021-10-04 2:39 ` Michael Kelley
2021-09-30 13:05 ` [PATCH V6 8/8] Drivers: hv : vmbus: Initialize VMbus ring buffer for Isolation VM Tianyu Lan
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