From: Akash Asthana <akashast@codeaurora.org>
To: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org
Cc: linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, swboyd@chromium.org,
mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, mka@chromium.org,
dianders@chromium.org, msavaliy@codeaurora.org,
evgreen@chromium.org, Akash Asthana <akashast@codeaurora.org>
Subject: [PATCH V6 3/7] i2c: i2c-qcom-geni: Add interconnect support
Date: Thu, 21 May 2020 13:59:20 +0530 [thread overview]
Message-ID: <1590049764-20912-4-git-send-email-akashast@codeaurora.org> (raw)
In-Reply-To: <1590049764-20912-1-git-send-email-akashast@codeaurora.org>
Get the interconnect paths for I2C based Serial Engine device
and vote according to the bus speed of the driver.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Wolfram Sang <wsa@kernel.org>
---
Changes in V2:
- As per Bjorn's comment, removed se == NULL check from geni_i2c_icc_get
- As per Bjorn's comment, removed code to set se->icc_path* to NULL in failure
- As per Bjorn's comment, introduced and using devm_of_icc_get API for getting
path handle
- As per Matthias comment, added error handling for icc_set_bw call
Changes in V3:
- As per Matthias comment, use common library APIs defined in geni-se
driver for ICC functionality.
Changes in V4:
- Move peak_bw guess as twice of avg_bw if nothing mentioned explicitly
to ICC core.
Changes in V5:
- Use icc_enable/disable in power on/off call.
Changes in V6:
- No changes
drivers/i2c/busses/i2c-qcom-geni.c | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
index 18d1e4f..f2e786d 100644
--- a/drivers/i2c/busses/i2c-qcom-geni.c
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -557,6 +557,25 @@ static int geni_i2c_probe(struct platform_device *pdev)
gi2c->adap.dev.of_node = dev->of_node;
strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
+ ret = geni_icc_get(&gi2c->se, "qup-memory");
+ if (ret)
+ return ret;
+ /*
+ * Set the bus quota for core and cpu to a reasonable value for
+ * register access.
+ * Set quota for DDR based on bus speed.
+ */
+ geni_icc_bw_init(&gi2c->se.icc_paths[GENI_TO_CORE], GENI_DEFAULT_BW,
+ 0);
+ geni_icc_bw_init(&gi2c->se.icc_paths[CPU_TO_GENI], GENI_DEFAULT_BW,
+ 0);
+ geni_icc_bw_init(&gi2c->se.icc_paths[GENI_TO_DDR],
+ Bps_to_icc(gi2c->clk_freq_out), 0);
+
+ ret = geni_icc_set_bw(&gi2c->se);
+ if (ret)
+ return ret;
+
ret = geni_se_resources_on(&gi2c->se);
if (ret) {
dev_err(dev, "Error turning on resources %d\n", ret);
@@ -579,6 +598,10 @@ static int geni_i2c_probe(struct platform_device *pdev)
return ret;
}
+ ret = geni_icc_disable(&gi2c->se);
+ if (ret)
+ return ret;
+
dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
gi2c->suspended = 1;
@@ -623,7 +646,7 @@ static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev)
gi2c->suspended = 1;
}
- return 0;
+ return geni_icc_disable(&gi2c->se);
}
static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
@@ -631,6 +654,10 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
int ret;
struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
+ ret = geni_icc_enable(&gi2c->se);
+ if (ret)
+ return ret;
+
ret = geni_se_resources_on(&gi2c->se);
if (ret)
return ret;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-05-21 8:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 8:29 [PATCH V6 0/7] [PATCH V5 0/7] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-05-21 8:29 ` [PATCH V6 1/7] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-05-21 15:50 ` Matthias Kaehlcke
2020-05-26 12:41 ` Akash Asthana
2020-05-21 8:29 ` [PATCH V6 2/7] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-05-21 16:00 ` Matthias Kaehlcke
2020-05-21 18:12 ` Matthias Kaehlcke
2020-05-22 18:31 ` kbuild test robot
2020-05-21 8:29 ` Akash Asthana [this message]
2020-05-21 8:29 ` [PATCH V6 4/7] spi: spi-geni-qcom: Add interconnect support Akash Asthana
2020-05-21 8:29 ` [PATCH V6 5/7] tty: serial: qcom_geni_serial: " Akash Asthana
2020-05-21 8:39 ` Greg KH
2020-05-21 8:29 ` [PATCH V6 6/7] spi: spi-qcom-qspi: " Akash Asthana
2020-05-23 1:11 ` kbuild test robot
2020-05-21 8:29 ` [PATCH V6 7/7] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
2020-05-23 14:05 ` kbuild test robot
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