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Wed, 13 May 2020 07:42:37 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4234721FE90; Wed, 13 May 2020 07:42:37 +0200 (CEST) Received: from gnbcxd0016.gnb.st.com (10.75.127.50) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 13 May 2020 07:42:36 +0200 Date: Wed, 13 May 2020 07:42:31 +0200 From: Alain Volmat To: Rob Herring CC: "wsa@kernel.org" , "mark.rutland@arm.com" , Pierre Yves MORDRET , "mcoquelin.stm32@gmail.com" , Alexandre TORGUE , "linux-i2c@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Fabrice GASNIER Subject: Re: [PATCH 3/4] dt-bindings: i2c-stm32: add SMBus Alert bindings Message-ID: <20200513054231.GA16558@gnbcxd0016.gnb.st.com> Mail-Followup-To: Rob Herring , "wsa@kernel.org" , "mark.rutland@arm.com" , Pierre Yves MORDRET , "mcoquelin.stm32@gmail.com" , Alexandre TORGUE , "linux-i2c@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Fabrice GASNIER References: <1588657871-14747-1-git-send-email-alain.volmat@st.com> <1588657871-14747-4-git-send-email-alain.volmat@st.com> <20200513021932.GA9172@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20200513021932.GA9172@bogus> X-Disclaimer: ce message est personnel / this message is private X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG7NODE2.st.com (10.75.127.20) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216,18.0.676 definitions=2020-05-13_01:2020-05-11,2020-05-13 signatures=0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Hello Rob, On Wed, May 13, 2020 at 02:19:32AM +0000, Rob Herring wrote: > On Tue, May 05, 2020 at 07:51:10AM +0200, Alain Volmat wrote: > > Add a new binding of the i2c-stm32f7 driver to enable the handling > > of the SMBUS-Alert > > > > Signed-off-by: Alain Volmat > > --- > > Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml > > index b50a2f420b36..04c0882c3661 100644 > > --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml > > +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml > > @@ -36,6 +36,10 @@ allOf: > > minItems: 3 > > maxItems: 3 > > > > + st,smbus-alert: > > + description: Enable the SMBus Alert feature > > + $ref: /schemas/types.yaml#/definitions/flag > > + > > We already have smbus_alert interrupt. Can't you just check for this in > the slave nodes and enable if found? My understanding reading the code (smbalert_probe within i2c-smbus.c, of_i2c_setup_smbus_alert called when registering an adapter within i2c-core-smbus.c) is that smbus_alert refers to an interrupt on the adapter side. That is an interrupt that would be triggered when the adapter is receiving an smbus_alert message. In our case (stm32f7), we do not have specific interrupt for that purpose. The interrupt triggered when an SMBUS Alert is received (by the adapter) is the same interrupt as for other reasons and we check within the irq handler within stm32f7 the reason before calling i2c_handle_smbus_alert if the status register indicated an SMBUS Alert. So my understanding is that we cannot rely on the mechanism of naming an interrupt smbus_alert. Did I misunderstood something ? > > > - if: > > properties: > > compatible: > > -- > > 2.17.1 > >