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From: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
To: Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	bcm-kernel-feedback-list@broadcom.com,
	Wolfram Sang <wsa@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Brendan Higgins <brendanhiggins@google.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Lori Hikichi <lori.hikichi@broadcom.com>,
	Dhananjay Phadke <dphadke@linux.microsoft.com>,
	linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Subject: [PATCH v1 6/6] i2c: iproc: handle rx fifo full interrupt
Date: Sun, 11 Oct 2020 23:52:54 +0530	[thread overview]
Message-ID: <20201011182254.17776-7-rayagonda.kokatanur@broadcom.com> (raw)
In-Reply-To: <20201011182254.17776-1-rayagonda.kokatanur@broadcom.com>

[-- Attachment #1: Type: text/plain, Size: 2589 bytes --]

Add code to handle IS_S_RX_FIFO_FULL_SHIFT interrupt to support
master write request with >= 64 bytes.

Iproc has a slave rx fifo size of 64 bytes.
Rx fifo full interrupt (IS_S_RX_FIFO_FULL_SHIFT) will be generated
when RX fifo becomes full. This can happen if master issues write
request of more than 64 bytes.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
---
 drivers/i2c/busses/i2c-bcm-iproc.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-bcm-iproc.c b/drivers/i2c/busses/i2c-bcm-iproc.c
index 22e04055b447..cceaf69279a9 100644
--- a/drivers/i2c/busses/i2c-bcm-iproc.c
+++ b/drivers/i2c/busses/i2c-bcm-iproc.c
@@ -313,6 +313,8 @@ static void bcm_iproc_i2c_slave_init(
 
 	/* Enable interrupt register to indicate a valid byte in receive fifo */
 	val = BIT(IE_S_RX_EVENT_SHIFT);
+	/* Enable interrupt register to indicate Slave Rx FIFO Full */
+	val |= BIT(IE_S_RX_FIFO_FULL_SHIFT);
 	/* Enable interrupt register to indicate a Master read transaction */
 	val |= BIT(IE_S_RD_EVENT_SHIFT);
 	/* Enable interrupt register for the Slave BUSY command */
@@ -434,9 +436,15 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c,
 	 *                    events
 	 * Master-read      : both IS_S_RX_EVENT_SHIFT and IS_S_RD_EVENT_SHIFT
 	 *                    events or only IS_S_RD_EVENT_SHIFT
+	 *
+	 * iproc has a slave rx fifo size of 64 bytes. Rx fifo full interrupt
+	 * (IS_S_RX_FIFO_FULL_SHIFT) will be generated when RX fifo becomes
+	 * full. This can happen if Master issues write requests of more than
+	 * 64 bytes.
 	 */
 	if (status & BIT(IS_S_RX_EVENT_SHIFT) ||
-	    status & BIT(IS_S_RD_EVENT_SHIFT)) {
+	    status & BIT(IS_S_RD_EVENT_SHIFT) ||
+	    status & BIT(IS_S_RX_FIFO_FULL_SHIFT)) {
 		/* disable slave interrupts */
 		val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);
 		val &= ~iproc_i2c->slave_int_mask;
@@ -452,9 +460,14 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c,
 		/* schedule tasklet to read data later */
 		tasklet_schedule(&iproc_i2c->slave_rx_tasklet);
 
-		/* clear only IS_S_RX_EVENT_SHIFT interrupt */
-		iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET,
-				 BIT(IS_S_RX_EVENT_SHIFT));
+		/*
+		 * clear only IS_S_RX_EVENT_SHIFT and
+		 * IS_S_RX_FIFO_FULL_SHIFT interrupt.
+		 */
+		val = BIT(IS_S_RX_EVENT_SHIFT);
+		if (status & BIT(IS_S_RX_FIFO_FULL_SHIFT))
+			val |= BIT(IS_S_RX_FIFO_FULL_SHIFT);
+		iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, val);
 	}
 
 	if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) {
-- 
2.17.1


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WARNING: multiple messages have this Message-ID (diff)
From: Dhananjay Phadke <dphadke@linux.microsoft.com>
To: rayagonda.kokatanur@broadcom.com
Cc: andriy.shevchenko@linux.intel.com,
	bcm-kernel-feedback-list@broadcom.com, brendanhiggins@google.com,
	dphadke@linux.microsoft.com, f.fainelli@gmail.com,
	linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org,
	linux-kernel@vger.kernel.org, lori.hikichi@broadcom.com,
	rjui@broadcom.com, sbranden@broadcom.com, wsa@kernel.org
Subject: [PATCH v1 6/6] i2c: iproc: handle rx fifo full interrupt
Date: Mon, 12 Oct 2020 15:03:04 -0700	[thread overview]
Message-ID: <20201011182254.17776-7-rayagonda.kokatanur@broadcom.com> (raw)
Message-ID: <20201012220304.oBt3wutbEhjjmEuAaCnt6wB6oMGnz3w08PrfgyLAwug@z> (raw)
In-Reply-To: <20201011182254.17776-7-rayagonda.kokatanur@broadcom.com>

From: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>

On Sun, 11 Oct 2020 23:52:54 +0530, Rayagonda Kokatanur wrote:
> Add code to handle IS_S_RX_FIFO_FULL_SHIFT interrupt to support
> master write request with >= 64 bytes.
> 
> Iproc has a slave rx fifo size of 64 bytes.
> Rx fifo full interrupt (IS_S_RX_FIFO_FULL_SHIFT) will be generated
> when RX fifo becomes full. This can happen if master issues write
> request of more than 64 bytes.
> 

ARM cores run much faster than I2C bus, why would rx fifo go full when
rx interrupt is enabled and bytes are read out by bus driver isr?
Isn't fifo read pointer updated on these byte reads?
Does controller stretch clock when rx fifo is full (e.g. kernel has
crashed, bus driver isn't draining fifo)?


  parent reply	other threads:[~2020-10-11 18:24 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-11 18:22 [PATCH v1 0/6] fix iproc driver to handle master read request Rayagonda Kokatanur
2020-10-11 18:22 ` [PATCH v1 1/6] i2c: iproc: handle Master aborted error Rayagonda Kokatanur
2020-10-23 17:14   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 2/6] i2c: iproc: handle only slave interrupts which are enabled Rayagonda Kokatanur
2020-10-23 17:18   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 3/6] i2c: iproc: update slave isr mask (ISR_MASK_SLAVE) Rayagonda Kokatanur
2020-10-23 17:19   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 4/6] i2c: iproc: fix typo in slave_isr function Rayagonda Kokatanur
2020-10-23 17:20   ` Ray Jui
2020-10-26 13:52     ` Rayagonda Kokatanur
2020-10-11 18:22 ` [PATCH v1 5/6] i2c: iproc: handle master read request Rayagonda Kokatanur
2020-10-14  3:20   ` Dhananjay Phadke
2020-10-14  9:12     ` Rayagonda Kokatanur
     [not found]     ` <CAHO=5PEtoJrFEPin0hH19Ubs9Zmhxiay4jSGAhXBFE=ft=+CYg@mail.gmail.com>
2020-10-23 17:26       ` Ray Jui
2020-10-26 13:55         ` Rayagonda Kokatanur
2020-10-11 18:22 ` Rayagonda Kokatanur [this message]
2020-10-12 22:03   ` [PATCH v1 6/6] i2c: iproc: handle rx fifo full interrupt Dhananjay Phadke
2020-10-23 17:42   ` Ray Jui
2020-10-26 15:13     ` Rayagonda Kokatanur
2020-10-27  0:36       ` Ray Jui

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