From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: wsa@kernel.org, linux-i2c@vger.kernel.org, digetx@gmail.com,
treding@nvidia.com, jarkko.nikula@linux.intel.com,
rmk+kernel@armlinux.org.uk, song.bao.hua@hisilicon.com,
john.garry@huawei.com, prime.zeng@huawei.com,
linuxarm@huawei.com
Subject: Re: [PATCH v3 2/3] i2c: add support for HiSilicon I2C controller
Date: Mon, 22 Mar 2021 18:59:46 +0200 [thread overview]
Message-ID: <YFjNAvVTavCRt/C8@smile.fi.intel.com> (raw)
In-Reply-To: <1616411413-7177-3-git-send-email-yangyicong@hisilicon.com>
On Mon, Mar 22, 2021 at 07:10:12PM +0800, Yicong Yang wrote:
> Add HiSilicon I2C controller driver for the Kunpeng SoC. It provides
> the access to the i2c busses, which connects to the eeprom, rtc, etc.
>
> The driver works with IRQ mode, and supports basic I2C features and 10bit
> address. The DMA is not supported.
...
> +#include <linux/acpi.h>
Hadn't noticed how you are using this header.
> +#include <linux/bits.h>
> +#include <linux/bitfield.h>
> +#include <linux/completion.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
Missed mod_devicetable.h.
Probably missed property.h, but not sure.
> +#include <linux/platform_device.h>
...
> +#define HISI_I2C_INT_ALL 0x1f
GENMASK() ?
...
> +#define HISI_I2C_INT_ERR (HISI_I2C_INT_TRANS_ERR | \
> + HISI_I2C_INT_FIFO_ERR)
Either one line, or it will look better like
#define HISI_I2C_INT_ERR \
(HISI_I2C_INT_TRANS_ERR | HISI_I2C_INT_FIFO_ERR)
...
> +#define HISI_I2C_STD_SPEED_MODE 0x0
> +#define HISI_I2C_FAST_SPEED_MODE 0x1
> +#define HISI_I2C_HIGH_SPEED_MODE 0x2
Why not plain decimal numbers?
...
> +struct hisi_i2c_controller {
> + struct device *dev;
> + struct i2c_adapter adapter;
If you put this as a first member, the container_of() become a no-op for this.
But I dunno if it's used against this structure.
> + void __iomem *iobase;
> + int irq;
> +
> + /* Intermediates for recording the transfer process */
> + struct completion *completion;
> + struct i2c_msg *msgs;
> + int msg_num;
> + int msg_tx_idx;
> + int buf_tx_idx;
> + int msg_rx_idx;
> + int buf_rx_idx;
> + u16 tar_addr;
> + u32 xfer_err;
> +
> + /* I2C bus configuration */
> + u32 scl_fall_time;
> + u32 scl_rise_time;
> + u32 sda_hold_time;
> + u64 clk_rate_khz;
> + u32 bus_freq_hz;
> + u32 spk_len;
> +};
...
> + struct i2c_timings t;
> +
> + i2c_parse_fw_timings(ctlr->dev, &t, true);
> + ctlr->bus_freq_hz = t.bus_freq_hz;
> + ctlr->scl_fall_time = t.scl_fall_ns;
> + ctlr->scl_rise_time = t.scl_rise_ns;
> + ctlr->sda_hold_time = t.sda_hold_ns;
Why not simply to have the timings structure embedded into hisi_i2c_controller
one?
...
> + ctlr->dev = dev;
Would it make sense to assign aster getting IRQ resource...
> + ctlr->iobase = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(ctlr->iobase))
> + return PTR_ERR(ctlr->iobase);
> +
> + ctlr->irq = platform_get_irq(pdev, 0);
> + if (ctlr->irq < 0)
> + return ctlr->irq;
...somewhere here?
> + hisi_i2c_disable_int(ctlr, HISI_I2C_INT_ALL);
...
> + ctlr->clk_rate_khz = DIV_ROUND_UP_ULL(ctlr->clk_rate_khz, 1000);
HZ_PER_KHZ ?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2021-03-22 17:00 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-22 11:10 [PATCH v3 0/3] Add support for HiSilicon I2C controller Yicong Yang
2021-03-22 11:10 ` [PATCH v3 1/3] i2c: core: add managed function for adding i2c adapters Yicong Yang
2021-03-22 16:35 ` Andy Shevchenko
2021-03-24 8:26 ` Yicong Yang
2021-03-24 11:05 ` Andy Shevchenko
2021-03-22 16:45 ` Dmitry Osipenko
2021-03-24 8:29 ` Yicong Yang
2021-03-24 11:06 ` Andy Shevchenko
2021-03-22 11:10 ` [PATCH v3 2/3] i2c: add support for HiSilicon I2C controller Yicong Yang
2021-03-22 15:21 ` Dmitry Osipenko
2021-03-24 9:30 ` Yicong Yang
2021-03-24 12:26 ` Dmitry Osipenko
2021-03-22 16:59 ` Andy Shevchenko [this message]
2021-03-24 10:07 ` Yicong Yang
2021-03-24 11:15 ` Andy Shevchenko
2021-03-22 17:04 ` Andy Shevchenko
2021-03-24 10:21 ` Yicong Yang
2021-03-24 11:16 ` Andy Shevchenko
2021-03-22 11:10 ` [PATCH v3 3/3] MAINTAINERS: Add maintainer for HiSilicon I2C driver Yicong Yang
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