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[91.76.12.16]) by smtp.googlemail.com with ESMTPSA id r19sm794198lfi.58.2020.07.29.17.31.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Jul 2020 17:31:22 -0700 (PDT) Subject: Re: [RFC PATCH v5 12/14] gpu: host1x: mipi: Keep MIPI clock enabled till calibration is done To: Sowjanya Komatineni , thierry.reding@gmail.com, jonathanh@nvidia.com, frankc@nvidia.com, hverkuil@xs4all.nl, sakari.ailus@iki.fi, robh+dt@kernel.org, helen.koike@collabora.com Cc: sboyd@kernel.org, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org References: <1595883452-17343-1-git-send-email-skomatineni@nvidia.com> <1595883452-17343-13-git-send-email-skomatineni@nvidia.com> <69903c67-8e5f-11c2-45ec-c76b97634aba@nvidia.com> <48977b6b-ef7e-1bdf-e3e0-2903032aa225@gmail.com> From: Dmitry Osipenko Message-ID: Date: Thu, 30 Jul 2020 03:31:20 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org 30.07.2020 02:54, Sowjanya Komatineni пишет: > > On 7/29/20 4:42 PM, Dmitry Osipenko wrote: >> 29.07.2020 20:55, Sowjanya Komatineni пишет: >>> On 7/29/20 10:08 AM, Dmitry Osipenko wrote: >>>> 28.07.2020 19:04, Sowjanya Komatineni пишет: >>>> ... >>>>>>> +void tegra_mipi_cancel_calibration(struct tegra_mipi_device >>>>>>> *device) >>>>>>> +{ >>>>>> Doesn't MIPI_CAL need to be reset here? >>>>> No need to reset MIPI CAL >>>> Could you please explain why. There is a calibration state-machine that >>>> apparently needs to be returned into initial state, does it return by >>>> itself? >>>> >>>> TRM says that MIPI block needs to be reset before of starting >>>> calibration process. The reset is completely missing in the driver, I >>>> assume it needs to be corrected with another patch. >>> TRM documented incorrectly. There is no need to reset MIPI_CAL. >>> >>> MIPI CAL is FSM and it does not hang and done bit is to indicate if >>> results are applied to pads or not. >>> >>> If we don't see done bit set meaning, MIPI CAL did not see LP-11 and >>> results are not applied to pads. >> But how to stop calibration from triggering on LP-11 once it has been >> enabled? The reset should be needed since there is no other way to reset >> the calibration state. > > Its a finite state machine that goes thru fixed steps of sequence codes > internally and holds results in registers. > > When it sees LP-11 results are applied to pads. > > If it does not see LP-11, next start will again trigger calibrating with > finite sequence codes. > > As per HW designers, we don't have to do any reverts when done bit is > not set. Alright, then should be good if HW can't stuck. Reviewed-by: Dmitry Osipenko