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From: Przemyslaw Gaj <pgaj@cadence.com>
To: <bbrezillon@kernel.org>
Cc: linux-i3c@lists.infradead.org, Przemyslaw Gaj <pgaj@cadence.com>,
	rafalc@cadence.com, vitor.soares@synopsys.com
Subject: [PATCH 1/3] i3c: Drop support for I2C 10 bit addresing
Date: Tue, 26 Feb 2019 11:00:01 +0000	[thread overview]
Message-ID: <20190226110003.5909-2-pgaj@cadence.com> (raw)
In-Reply-To: <20190226110003.5909-1-pgaj@cadence.com>

This patch dropps support for I2C devices with 10 bit addressing. When I2C
device with 10 bit address is defined in DT, I3C master registration fails.

Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
---
 drivers/i3c/master.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 2dc628d..6c7fa4b 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -1962,6 +1962,13 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
 	if (ret)
 		return ret;
 
+    /* The I3C Specification does not clearly say I2C devices with 10-bit
+     * address are supported. These devices can't be passed properly through
+     * DEFSLVS command.
+     */
+    if (boardinfo->base.flags & I2C_CLIENT_TEN)
+        return -ENOTSUPP;
+
 	/* LVR is encoded in reg[2]. */
 	boardinfo->lvr = reg[2];
 
-- 
2.8.3


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  reply	other threads:[~2019-02-26 11:01 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-26 11:00 [PATCH 0/3] Drop support for I2C 10 bit devices from I3C subsystem Przemyslaw Gaj
2019-02-26 11:00 ` Przemyslaw Gaj [this message]
2019-02-26 12:11   ` [PATCH 1/3] i3c: Drop support for I2C 10 bit addresing Boris Brezillon
2019-02-26 11:00 ` [PATCH 2/3] i3c: master: cdns: Drop support for I2C 10 bit addresing in Cadence I3C master Przemyslaw Gaj
2019-02-26 11:00 ` [PATCH 3/3] dt-bindings: i3c: Document dropped support for I2C 10 bit devices Przemyslaw Gaj

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