[PATCH 0/3] Drop support for I2C 10 bit devices from I3C subsystem

[PATCH 0/3] Drop support for I2C 10 bit devices from I3C subsystem

[Przemyslaw Gaj]

I3C MIPI spec does not clearly say that I2C 10bit devices are supported. 
Additionally, it isn't possible to pass 10 bit device properly through DEFSLVS
command and reserve address for such device on secondary master side.

Przemyslaw Gaj (3):
  i3c: Drop support for I2C 10 bit addresing
  i3c: master: cdns: Drop support for I2C 10 bit addresing in Cadence
    I3C master
  dt-bindings: i3c: Document dropped support for I2C 10 bit devices

 Documentation/devicetree/bindings/i3c/i3c.txt | 4 +++-
 drivers/i3c/master.c                          | 7 +++++++
 drivers/i3c/master/i3c-master-cdns.c          | 4 +---
 3 files changed, 11 insertions(+), 4 deletions(-)

-- 
2.8.3


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[PATCH 1/3] i3c: Drop support for I2C 10 bit addresing

[Przemyslaw Gaj]

This patch dropps support for I2C devices with 10 bit addressing. When I2C
device with 10 bit address is defined in DT, I3C master registration fails.

Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
---
 drivers/i3c/master.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 2dc628d..6c7fa4b 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -1962,6 +1962,13 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
 	if (ret)
 		return ret;
 
+    /* The I3C Specification does not clearly say I2C devices with 10-bit
+     * address are supported. These devices can't be passed properly through
+     * DEFSLVS command.
+     */
+    if (boardinfo->base.flags & I2C_CLIENT_TEN)
+        return -ENOTSUPP;
+
 	/* LVR is encoded in reg[2]. */
 	boardinfo->lvr = reg[2];
 
-- 
2.8.3


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[PATCH 2/3] i3c: master: cdns: Drop support for I2C 10 bit addresing in Cadence I3C master

[Przemyslaw Gaj]

Because this patch series dropped support for 10 bit I2C devices, support is
also dropped in Cadence I3C master driver.

Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
---
 drivers/i3c/master/i3c-master-cdns.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/i3c/master/i3c-master-cdns.c b/drivers/i3c/master/i3c-master-cdns.c
index 8889a4f..1797fbf 100644
--- a/drivers/i3c/master/i3c-master-cdns.c
+++ b/drivers/i3c/master/i3c-master-cdns.c
@@ -1010,9 +1010,7 @@ static int cdns_i3c_master_attach_i2c_dev(struct i2c_dev_desc *dev)
 	master->free_rr_slots &= ~BIT(slot);
 	i2c_dev_set_master_data(dev, data);
 
-	writel(prepare_rr0_dev_address(dev->boardinfo->base.addr) |
-	       (dev->boardinfo->base.flags & I2C_CLIENT_TEN ?
-		DEV_ID_RR0_LVR_EXT_ADDR : 0),
+	writel(prepare_rr0_dev_address(dev->boardinfo->base.addr),
 	       master->regs + DEV_ID_RR0(data->id));
 	writel(dev->boardinfo->lvr, master->regs + DEV_ID_RR2(data->id));
 	writel(readl(master->regs + DEVS_CTRL) |
-- 
2.8.3


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[PATCH 3/3] dt-bindings: i3c: Document dropped support for I2C 10 bit devices

[Przemyslaw Gaj]

Because this patch series dropped support for 10 bit I2C devices, I'm
documenting this.

Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
---
 Documentation/devicetree/bindings/i3c/i3c.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/i3c/i3c.txt b/Documentation/devicetree/bindings/i3c/i3c.txt
index ab729a0..4ffe059 100644
--- a/Documentation/devicetree/bindings/i3c/i3c.txt
+++ b/Documentation/devicetree/bindings/i3c/i3c.txt
@@ -39,7 +39,9 @@ valid here, but several new properties have been added.
 New constraint on existing properties:
 --------------------------------------
 - reg: contains 3 cells
-  + first cell : still encoding the I2C address
+  + first cell : still encoding the I2C address. 10 bit addressing is not
+    supported. Devices with 10 bit address can't be properly passed through
+    DEFSLVS command.
 
   + second cell: shall be 0
 
-- 
2.8.3


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Re: [PATCH 1/3] i3c: Drop support for I2C 10 bit addresing

[Boris Brezillon]

On Tue, 26 Feb 2019 11:00:01 +0000
Przemyslaw Gaj <pgaj@cadence.com> wrote:

> This patch dropps support for I2C devices with 10 bit addressing. When I2C
> device with 10 bit address is defined in DT, I3C master registration fails.
> 
> Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com>
> ---
>  drivers/i3c/master.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
> index 2dc628d..6c7fa4b 100644
> --- a/drivers/i3c/master.c
> +++ b/drivers/i3c/master.c
> @@ -1962,6 +1962,13 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
>  	if (ret)
>  		return ret;
>  
> +    /* The I3C Specification does not clearly say I2C devices with 10-bit
> +     * address are supported. These devices can't be passed properly through
> +     * DEFSLVS command.
> +     */
> +    if (boardinfo->base.flags & I2C_CLIENT_TEN)

Please add a dev_err() here so that the user knows why it failed.

The rest of the series looks good.

> +        return -ENOTSUPP;
> +
>  	/* LVR is encoded in reg[2]. */
>  	boardinfo->lvr = reg[2];
>  


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