From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
linux-i3c@lists.infradead.org
Cc: devicetree@vger.kernel.org,
Rajeev Huralikoppi <rajeev.huralikoppi@silvaco.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Conor Culhane <conor.culhane@silvaco.com>
Subject: [PATCH 2/4] dt-bindings: i3c: Describe Silvaco master binding
Date: Thu, 9 Jul 2020 10:01:57 +0200 [thread overview]
Message-ID: <20200709080159.2178-2-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20200709080159.2178-1-miquel.raynal@bootlin.com>
Silvaco provide a dual-role I3C master.
Description is rather simple: it needs a register mapping, three
clocks and an interrupt.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
.../bindings/i3c/svc,i3c-master.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml
diff --git a/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml
new file mode 100644
index 000000000000..11e670c6b76f
--- /dev/null
+++ b/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i3c/svc,i3c-master.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Silvaco I3C master
+
+maintainers:
+ - Conor Culhane <conor.culhane@silvaco.com>
+
+properties:
+ compatible:
+ const: svc,i3c-master
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ description: |
+ There are three clocks:
+ pclk: System clock
+ fast_clk: Fast clock (for the bus)
+ slow_clk: Slow clock (for other events)
+
+ items:
+ - const: pclk
+ - const: fast_clk
+ - const: slow_clk
+
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
+examples:
+ - |
+ i3c-master@a0000000 {
+ compatible = "svc,i3c-master";
+ clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>;
+ clock-names = "pclk", "fast_clk", "slow_clk";
+ interrupt-parent = <&gic>;
+ interrupts = <0 89 4>;
+ reg = <0x0 0xa0000000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.20.1
--
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next prev parent reply other threads:[~2020-07-09 8:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 8:01 [PATCH 1/4] dt-bindings: Add vendor prefix for Silvaco Miquel Raynal
2020-07-09 8:01 ` Miquel Raynal [this message]
2020-07-09 17:04 ` [PATCH 2/4] dt-bindings: i3c: Describe Silvaco master binding Rob Herring
2020-07-09 8:01 ` [PATCH 3/4] i3c: master: svc: Add Silvaco I3C master driver Miquel Raynal
2020-07-09 10:02 ` kernel test robot
2020-07-09 12:58 ` kernel test robot
2020-08-03 20:20 ` Nicolas Pitre
[not found] ` <BN6PR16MB1762D6CE430AB08B7A2BE5FCF14A0@BN6PR16MB1762.namprd16.prod.outlook.com>
2020-08-05 15:13 ` Nicolas Pitre
2020-08-05 15:22 ` Miquel Raynal
2020-07-09 8:01 ` [PATCH 4/4] MAINTAINERS: Add Silvaco I3C master Miquel Raynal
2020-07-20 22:23 ` [PATCH 1/4] dt-bindings: Add vendor prefix for Silvaco Rob Herring
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