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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	Hans de Goede <hdegoede@redhat.com>, Jens Axboe <axboe@kernel.dk>,
	Hannes Reinecke <hare@suse.de>,
	Serge Semin <fancer.lancer@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	<linux-ide@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: [PATCH v4 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema
Date: Fri, 10 Jun 2022 11:17:58 +0300	[thread overview]
Message-ID: <20220610081801.11854-21-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>

Baikal-T1 AHCI controller is based on the DWC AHCI SATA IP-core v4.10a
with the next specific settings: two SATA ports, cascaded CSR access based
on two clock domains (APB and AXI), selectable source of the reference
clock (though stable work is currently available from the external source
only), two reset lanes for the application and SATA ports domains. Other
than that the device is fully compatible with the generic DWC AHCI SATA
bindings.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Hannes Reinecke <hare@suse.de>

---

Changelog v2:
- Rename 'syscon' property to 'baikal,bt1-syscon'.
- Drop macro usage from the example node.

Changelog v4:
- Use the DWC AHCI port properties definition from the DWC AHCI SATA
  common schema. (@Rob)
- Drop Baikal-T1 syscon reference and implement the clock signal
  source in the framework of the clock controller. (@Rob)
---
 .../bindings/ata/baikal,bt1-ahci.yaml         | 116 ++++++++++++++++++
 1 file changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml

diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml
new file mode 100644
index 000000000000..d5fbd7d561d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Baikal-T1 SoC AHCI SATA controller
+
+maintainers:
+  - Serge Semin <fancer.lancer@gmail.com>
+
+description: |
+  AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
+  DWC AHCI SATA v4.10a IP-core.
+
+allOf:
+  - $ref: snps,dwc-ahci.yaml#
+
+properties:
+  compatible:
+    contains:
+      const: baikal,bt1-ahci
+
+  clocks:
+    items:
+      - description: Peripheral APB bus clock source
+      - description: Application AXI BIU clock
+      - description: SATA Ports reference clock
+
+  clock-names:
+    items:
+      - const: pclk
+      - const: aclk
+      - const: ref
+
+  resets:
+    items:
+      - description: Application AXI BIU domain reset
+      - description: SATA Ports clock domain reset
+
+  reset-names:
+    items:
+      - const: arst
+      - const: ref
+
+  ports-implemented:
+    maximum: 0x3
+
+patternProperties:
+  "^sata-port@[0-9a-e]$":
+    $ref: /schemas/ata/snps,dwc-ahci.yaml#/$defs/dwc-ahci-port
+
+    properties:
+      reg:
+        minimum: 0
+        maximum: 1
+
+      snps,tx-ts-max:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Due to having AXI3 bus interface utilized the maximum Tx DMA
+          transaction size can't exceed 16 beats (AxLEN[3:0]).
+        enum: [ 1, 2, 4, 8, 16 ]
+
+      snps,rx-ts-max:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Due to having AXI3 bus interface utilized the maximum Rx DMA
+          transaction size can't exceed 16 beats (AxLEN[3:0]).
+        enum: [ 1, 2, 4, 8, 16 ]
+
+    unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - resets
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    sata@1f050000 {
+      compatible = "baikal,bt1-ahci", "snps,dwc-ahci";
+      reg = <0x1f050000 0x2000>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      interrupts = <0 64 4>;
+
+      clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
+      clock-names = "pclk", "aclk", "ref";
+
+      resets = <&ccu_axi 2>, <&ccu_sys 0>;
+      reset-names = "arst", "ref";
+
+      ports-implemented = <0x3>;
+
+      sata-port@0 {
+        reg = <0>;
+
+        snps,tx-ts-max = <4>;
+        snps,rx-ts-max = <4>;
+      };
+
+      sata-port@1 {
+        reg = <1>;
+
+        snps,tx-ts-max = <4>;
+        snps,rx-ts-max = <4>;
+      };
+    };
+...
-- 
2.35.1


  parent reply	other threads:[~2022-06-10  8:19 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-10  8:17 [PATCH v4 00/23] ata: ahci: Add DWC/Baikal-T1 AHCI SATA support Serge Semin
2022-06-10  8:17 ` [PATCH v4 01/23] dt-bindings: ata: ahci-platform: Move dma-coherent to sata-common.yaml Serge Semin
2022-06-14 22:02   ` Rob Herring
2022-06-14 22:15   ` Florian Fainelli
2022-06-10  8:17 ` [PATCH v4 02/23] dt-bindings: ata: ahci-platform: Detach common AHCI bindings Serge Semin
2022-06-14 22:16   ` Rob Herring
2022-06-10  8:17 ` [PATCH v4 03/23] dt-bindings: ata: ahci-platform: Clarify common AHCI props constraints Serge Semin
2022-06-14 22:17   ` Rob Herring
2022-06-10  8:17 ` [PATCH v4 04/23] dt-bindings: ata: sata: Extend number of SATA ports Serge Semin
2022-06-10  8:17 ` [PATCH v4 05/23] dt-bindings: ata: sata-brcm: Apply common AHCI schema Serge Semin
2022-06-14 22:15   ` Florian Fainelli
2022-06-14 22:17   ` Rob Herring
2022-06-10  8:17 ` [PATCH v4 06/23] ata: libahci_platform: Convert to using platform devm-ioremap methods Serge Semin
2022-06-10  8:17 ` [PATCH v4 07/23] ata: libahci_platform: Convert to using devm bulk clocks API Serge Semin
2022-06-14  8:22   ` Damien Le Moal
2022-06-15 20:45     ` Serge Semin
2022-06-16  0:23       ` Damien Le Moal
2022-06-17 19:54         ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 08/23] ata: libahci_platform: Sanity check the DT child nodes number Serge Semin
2022-06-14  8:23   ` Damien Le Moal
2022-06-15 20:53     ` Serge Semin
2022-06-16  0:25       ` Damien Le Moal
2022-06-17 20:18         ` Serge Semin
2022-06-18  6:49           ` Damien Le Moal
2022-06-10  8:17 ` [PATCH v4 09/23] ata: libahci_platform: Parse ports-implemented property in resources getter Serge Semin
2022-06-10  8:17 ` [PATCH v4 10/23] ata: libahci_platform: Introduce reset assertion/deassertion methods Serge Semin
2022-06-10  8:17 ` [PATCH v4 11/23] dt-bindings: ata: ahci: Add platform capability properties Serge Semin
2022-06-14 22:19   ` Rob Herring
2022-06-15 21:56     ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 12/23] ata: libahci: Extend port-cmd flags set with port capabilities Serge Semin
2022-06-14  8:32   ` Damien Le Moal
2022-06-15 20:58     ` Serge Semin
2022-06-16  0:28       ` Damien Le Moal
2022-06-17 20:31         ` Serge Semin
2022-06-18  6:52           ` Damien Le Moal
2022-06-18  8:10             ` Serge Semin
2022-06-28 12:08               ` Serge Semin
2022-06-29  1:35                 ` Damien Le Moal
2022-06-29  1:47                   ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 13/23] ata: libahci: Discard redundant force_port_map parameter Serge Semin
2022-06-10  8:17 ` [PATCH v4 14/23] ata: libahci: Don't read AHCI version twice in the save-config method Serge Semin
2022-06-10  8:17 ` [PATCH v4 15/23] ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments Serge Semin
2022-06-14  8:38   ` Damien Le Moal
2022-06-15 21:25     ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 16/23] ata: ahci: Introduce firmware-specific caps initialization Serge Semin
2022-06-14  8:42   ` Damien Le Moal
2022-06-15 21:11     ` Serge Semin
2022-06-16  0:29       ` Damien Le Moal
2022-06-17 20:32         ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 17/23] dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema Serge Semin
2022-06-14 22:27   ` Rob Herring
2022-06-17 19:37     ` Serge Semin
2022-06-28 12:10       ` Serge Semin
2022-07-06 22:36       ` Rob Herring
2022-07-07 15:25         ` Serge Semin
2022-07-12 20:13           ` Rob Herring
2022-07-12 20:43             ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 18/23] ata: libahci_platform: Add function returning a clock-handle by id Serge Semin
2022-06-14  8:45   ` Damien Le Moal
2022-06-15 21:24     ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 19/23] ata: ahci: Add DWC AHCI SATA controller support Serge Semin
2022-06-10 16:34   ` Randy Dunlap
2022-06-10 21:58     ` Serge Semin
2022-06-10 23:34       ` Randy Dunlap
2022-06-15 21:30         ` Serge Semin
2022-06-16  0:31           ` Damien Le Moal
2022-06-17 20:36             ` Serge Semin
2022-06-18  6:54               ` Damien Le Moal
2022-06-14  8:53   ` Damien Le Moal
2022-06-15 21:48     ` Serge Semin
2022-06-16  0:33       ` Damien Le Moal
2022-06-17 20:34         ` Serge Semin
2022-06-10  8:17 ` Serge Semin [this message]
2022-06-14 22:29   ` [PATCH v4 20/23] dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema Rob Herring
2022-06-17 19:49     ` Serge Semin
2022-06-10  8:17 ` [PATCH v4 21/23] ata: ahci-dwc: Add platform-specific quirks support Serge Semin
2022-06-10  8:18 ` [PATCH v4 22/23] ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support Serge Semin
2022-06-10  8:18 ` [PATCH v4 23/23] MAINTAINERS: Add maintainers for DWC AHCI SATA driver Serge Semin

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