From: David Woodhouse <dwmw2@infradead.org>
To: Christoph Hellwig <hch@lst.de>, Daniel Drake <drake@endlessm.com>
Cc: Jens Axboe <axboe@kernel.dk>, Keith Busch <kbusch@kernel.org>,
Sagi Grimberg <sagi@grimberg.me>,
linux-nvme <linux-nvme@lists.infradead.org>,
Linux PCI <linux-pci@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-ide@vger.kernel.org,
Linux Upstreaming Team <linux@endlessm.com>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Hannes Reinecke <hare@suse.de>,
Alex Williamson <alex.williamson@redhat.com>,
Dan Williams <dan.j.williams@intel.com>
Subject: Re: [PATCH v2 2/5] nvme: rename "pci" operations to "mmio"
Date: Mon, 24 Jun 2019 07:58:23 +0100 [thread overview]
Message-ID: <a7beeb56e98a5559c4ab7810368b4d388aedf44c.camel@infradead.org> (raw)
In-Reply-To: <20190624061617.GA2848@lst.de>
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On Mon, 2019-06-24 at 08:16 +0200, Christoph Hellwig wrote:
> On Thu, Jun 20, 2019 at 04:11:26PM +0800, Daniel Drake wrote:
> > On Thu, Jun 20, 2019 at 2:11 PM Christoph Hellwig <hch@lst.de> wrote:
> > > The Linux NVMe driver will deal with NVMe as specified plus whatever
> > > minor tweaks we'll need for small bugs. Hiding it behind an AHCI
> > > device is completely out of scope and will not be accepted.
> >
> > Do you have any new suggestions for alternative ways we can implement
> > support for this storage configuration?
>
> IFF we want to support it it has to be done at the PCIe layer. But
> even that will require actual documentation and support from Intel.
>
> If Intel still believes this scheme is their magic secret to control
> the NVMe market and give themselves and unfair advantage over their
> competitors there is not much we can do.
At the very least, the switch to make it normal again shouldn't be in
the BIOS settings where it requires manual interaction, but should be
changeable at run time by the operating system.
Intel are consistently failing to learn the "firmware exists to boot
the OS and get out of the way" lesson. There are cases like thermal
management which sometimes make for valid exceptions, of course. This
isn't one of them.
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next prev parent reply other threads:[~2019-06-24 6:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-20 5:13 [PATCH v2 0/5] Support Intel AHCI remapped NVMe devices Daniel Drake
2019-06-20 5:13 ` [PATCH v2 1/5] ahci: Discover Intel " Daniel Drake
2019-06-20 5:13 ` [PATCH v2 2/5] nvme: rename "pci" operations to "mmio" Daniel Drake
2019-06-20 6:10 ` Christoph Hellwig
2019-06-20 8:11 ` Daniel Drake
2019-06-24 6:16 ` Christoph Hellwig
2019-06-24 6:58 ` David Woodhouse [this message]
2019-06-25 3:51 ` Daniel Drake
2019-06-28 7:23 ` Christoph Hellwig
2019-06-20 5:13 ` [PATCH v2 3/5] nvme: introduce nvme_dev_ops Daniel Drake
2019-06-20 5:13 ` [PATCH v2 4/5] nvme: move common definitions to pci.h Daniel Drake
2019-06-20 5:13 ` [PATCH v2 5/5] nvme: Intel AHCI remap support Daniel Drake
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