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Tue, 28 Jan 2020 12:57:41 +0000 From: To: , , CC: , , , Subject: [PATCH v3 3/3] iio: adc: at91-sama5d2_adc: update for other trigger usage Thread-Topic: [PATCH v3 3/3] iio: adc: at91-sama5d2_adc: update for other trigger usage Thread-Index: AQHV1dqGOUCBlFaurEGFIEUerZ28kA== Date: Tue, 28 Jan 2020 12:57:41 +0000 Message-ID: <1580216189-27418-4-git-send-email-eugen.hristev@microchip.com> References: <1580216189-27418-1-git-send-email-eugen.hristev@microchip.com> In-Reply-To: <1580216189-27418-1-git-send-email-eugen.hristev@microchip.com> Accept-Language: en-US, ro-RO Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: ac2e5b73-d78e-448c-a971-08d7a3f1a8f6 x-ms-traffictypediagnostic: DM5PR11MB1612: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 029651C7A1 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(366004)(39860400002)(136003)(376002)(346002)(396003)(189003)(199004)(6506007)(71200400001)(8676002)(5660300002)(2616005)(316002)(81166006)(26005)(81156014)(66446008)(4326008)(110136005)(54906003)(91956017)(478600001)(64756008)(2906002)(66556008)(6512007)(66946007)(86362001)(6486002)(107886003)(76116006)(8936002)(36756003)(66476007)(186003);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR11MB1612;H:DM5PR11MB1242.namprd11.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: NY0a1tcTLXIHOMUTV2pgLY9tMe58faWOrjHlPeoYa5IMTwjNHV+jl1iPHQWl1b+JAQT9dkG4f7xBgx71H61ATL+gZ+/4Dt88jOpIXKoYjnpj1czOGPIpiMK1peRwtut7MSwSlMRu+bRUXnJyzIyralE1k1e8rinONFSMuuZFFg/D2S5IQ/VxCi4a7lyehvbYucwDpIDIOuffPPa0rpY/ySkAp0ERM5tfTLPqz+UbCOkoiQgXPDfNomXvZmXzL8JCjrOSq+H+QyZLmfWaLGbK3moGLJsokNTF/t0ffKpFV3BPsS498xcvepzg7ENxCpFz9ryGpfo/nu6YHhdAer44P9CXzqggE5bQrpH/vZADf7eYv26hpPF7aQHwKW5CHTvW05JX/250+hHogbSzISgoIfvlSU4c8DbnA0U7I8lntH+R/zYhVXEXfTXX1cB14RJm x-ms-exchange-antispam-messagedata: 87SABN5L4K3A7jp6M6x2DknTKi1/dEeWM37XvGPIXWjWeMRHc40SuG4U0bQmb7XWuVqIE/krTeJrQoMjo2h6QR3hja789CT34ukUbRtm69wM2iYZ97r/ctNiUO1SqOgaUEc2BxzJar3q+DlNkq6KKA== Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: ac2e5b73-d78e-448c-a971-08d7a3f1a8f6 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jan 2020 12:57:41.0859 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: yuFA1br1xhP3i/Vi+bqJ8aH1SIR9RWpxz+WDl+g1xdCdWb1KCh69CYxfd9H0cRZjPrGMX7W1+J5LE812z37n5rzRKd7AtxNmAwN6jYhmPyg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR11MB1612 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Eugen Hristev This change will allow the at91-sama5d2_adc driver to use other triggers than it's own. In particular, tested with the sysfs trigger. To be able to achieve this functionality, some changes were required: 1) Do not enable/disable channels when enabling/disabling the trigger. This is because the trigger is enabled/disabled only for our trigger (obviously). We need channels enabled/disabled regardless of what trigger i= s being used. 2) Cope with DMA : DMA cannot be used when using another type of trigger. Other triggers work through pollfunc, so we get polled anyway on every trig= ger. Thus we have to obtain data at every trigger. 3) When to start conversion? The usual pollfunc (store time from subsystem) would be in hard irq and this would be a good way, but current iio subsyste= m recommends to have it in the threaded irq. Thus adding software start code in this handler. 4) Buffer config: we need to setup buffer regardless of our own device's trigger. We may get one attached later. 5) IRQ handling: we use our own device IRQ only if it's our own trigger and we do not use DMA . If we use DMA, we use the DMA controller's IRQ. Signed-off-by: Eugen Hristev --- Changes in v3: - remove useless call to iio_triggered_buffer_predisable Changes in v2: - adapt to the situation of having the previous two patches ahead in the se= ries drivers/iio/adc/at91-sama5d2_adc.c | 142 +++++++++++++++++++--------------= ---- 1 file changed, 72 insertions(+), 70 deletions(-) diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama= 5d2_adc.c index 49c2b9d..03ceab4 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -728,7 +728,6 @@ static int at91_adc_configure_trigger(struct iio_trigge= r *trig, bool state) struct iio_dev *indio =3D iio_trigger_get_drvdata(trig); struct at91_adc_state *st =3D iio_priv(indio); u32 status =3D at91_adc_readl(st, AT91_SAMA5D2_TRGR); - u8 bit; =20 /* clear TRGMOD */ status &=3D ~AT91_SAMA5D2_TRGR_TRGMOD_MASK; @@ -739,48 +738,6 @@ static int at91_adc_configure_trigger(struct iio_trigg= er *trig, bool state) /* set/unset hw trigger */ at91_adc_writel(st, AT91_SAMA5D2_TRGR, status); =20 - for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) { - struct iio_chan_spec const *chan =3D at91_adc_chan_get(indio, bit); - u32 cor; - - if (!chan) - continue; - /* these channel types cannot be handled by this trigger */ - if (chan->type =3D=3D IIO_POSITIONRELATIVE || - chan->type =3D=3D IIO_PRESSURE) - continue; - - if (state) { - cor =3D at91_adc_readl(st, AT91_SAMA5D2_COR); - - if (chan->differential) - cor |=3D (BIT(chan->channel) | - BIT(chan->channel2)) << - AT91_SAMA5D2_COR_DIFF_OFFSET; - else - cor &=3D ~(BIT(chan->channel) << - AT91_SAMA5D2_COR_DIFF_OFFSET); - - at91_adc_writel(st, AT91_SAMA5D2_COR, cor); - } - - if (state) - at91_adc_writel(st, AT91_SAMA5D2_CHER, - BIT(chan->channel)); - else - at91_adc_writel(st, AT91_SAMA5D2_CHDR, - BIT(chan->channel)); - } - - /* Nothing to do if using DMA */ - if (st->dma_st.dma_chan) - return 0; - - if (state) - at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY); - else - at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY); - return 0; } =20 @@ -905,9 +862,22 @@ static int at91_adc_dma_start(struct iio_dev *indio_de= v) return 0; } =20 +static bool at91_adc_buffer_check_use_irq(struct iio_dev *indio, + struct at91_adc_state *st) +{ + /* if using DMA, we do not use our own IRQ (we use DMA-controller) */ + if (st->dma_st.dma_chan) + return false; + /* if the trigger is not ours, then it has its own IRQ */ + if (iio_trigger_validate_own_device(indio->trig, indio)) + return false; + return true; +} + static int at91_adc_buffer_postenable(struct iio_dev *indio_dev) { int ret; + u8 bit; struct at91_adc_state *st =3D iio_priv(indio_dev); =20 /* check if we are enabling triggered buffer or the touchscreen */ @@ -928,6 +898,36 @@ static int at91_adc_buffer_postenable(struct iio_dev *= indio_dev) return ret; } =20 + for_each_set_bit(bit, indio_dev->active_scan_mask, + indio_dev->num_channels) { + struct iio_chan_spec const *chan =3D + at91_adc_chan_get(indio_dev, bit); + u32 cor; + + if (!chan) + continue; + /* these channel types cannot be handled by this trigger */ + if (chan->type =3D=3D IIO_POSITIONRELATIVE || + chan->type =3D=3D IIO_PRESSURE) + continue; + + cor =3D at91_adc_readl(st, AT91_SAMA5D2_COR); + + if (chan->differential) + cor |=3D (BIT(chan->channel) | BIT(chan->channel2)) << + AT91_SAMA5D2_COR_DIFF_OFFSET; + else + cor &=3D ~(BIT(chan->channel) << + AT91_SAMA5D2_COR_DIFF_OFFSET); + + at91_adc_writel(st, AT91_SAMA5D2_COR, cor); + + at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); + } + + if (at91_adc_buffer_check_use_irq(indio_dev, st)) + at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY); + return iio_triggered_buffer_postenable(indio_dev); } =20 @@ -948,21 +948,11 @@ static int at91_adc_buffer_predisable(struct iio_dev = *indio_dev) if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES)) return -EINVAL; =20 - /* continue with the triggered buffer */ - ret =3D iio_triggered_buffer_predisable(indio_dev); - if (ret < 0) - dev_err(&indio_dev->dev, "buffer predisable failed\n"); - - if (!st->dma_st.dma_chan) - return ret; - - /* if we are using DMA we must clear registers and end DMA */ - dmaengine_terminate_sync(st->dma_st.dma_chan); - /* - * For each enabled channel we must read the last converted value + * For each enable channel we must disable it in hardware. + * In the case of DMA, we must read the last converted value * to clear EOC status and not get a possible interrupt later. - * This value is being read by DMA from LCDR anyway + * This value is being read by DMA from LCDR anyway, so it's not lost. */ for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->num_channels) { @@ -975,12 +965,28 @@ static int at91_adc_buffer_predisable(struct iio_dev = *indio_dev) if (chan->type =3D=3D IIO_POSITIONRELATIVE || chan->type =3D=3D IIO_PRESSURE) continue; + + at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel)); + if (st->dma_st.dma_chan) at91_adc_readl(st, chan->address); } =20 + if (at91_adc_buffer_check_use_irq(indio_dev, st)) + at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY); + /* read overflow register to clear possible overflow status */ at91_adc_readl(st, AT91_SAMA5D2_OVER); + + /* continue with the triggered buffer */ + ret =3D iio_triggered_buffer_predisable(indio_dev); + if (ret < 0) + dev_err(&indio_dev->dev, "buffer predisable failed\n"); + + /* if we are using DMA we must clear registers and end DMA */ + if (st->dma_st.dma_chan) + dmaengine_terminate_sync(st->dma_st.dma_chan); + return ret; } =20 @@ -1135,6 +1141,13 @@ static irqreturn_t at91_adc_trigger_handler(int irq,= void *p) struct iio_dev *indio_dev =3D pf->indio_dev; struct at91_adc_state *st =3D iio_priv(indio_dev); =20 + /* + * If it's not our trigger, start a conversion now, as we are + * actually polling the trigger now. + */ + if (iio_trigger_validate_own_device(indio_dev->trig, indio_dev)) + at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START); + if (st->dma_st.dma_chan) at91_adc_trigger_handler_dma(indio_dev); else @@ -1147,20 +1160,9 @@ static irqreturn_t at91_adc_trigger_handler(int irq,= void *p) =20 static int at91_adc_buffer_init(struct iio_dev *indio) { - struct at91_adc_state *st =3D iio_priv(indio); - - if (st->selected_trig->hw_trig) { - return devm_iio_triggered_buffer_setup(&indio->dev, indio, - &iio_pollfunc_store_time, - &at91_adc_trigger_handler, &at91_buffer_setup_ops); - } - /* - * we need to prepare the buffer ops in case we will get - * another buffer attached (like a callback buffer for the touchscreen) - */ - indio->setup_ops =3D &at91_buffer_setup_ops; - - return 0; + return devm_iio_triggered_buffer_setup(&indio->dev, indio, + &iio_pollfunc_store_time, + &at91_adc_trigger_handler, &at91_buffer_setup_ops); } =20 static unsigned at91_adc_startup_time(unsigned startup_time_min, --=20 2.7.4