From: Jishnu Prakash <jprakash@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mka@chromium.org, linus.walleij@linaro.org,
Jonathan.Cameron@huawei.com, andy.shevchenko@gmail.com,
amit.kucheria@verdurent.com, smohanad@codeaurora.org,
kgunda@codeaurora.org, aghayal@codeaurora.org,
Jonathan Cameron <jic23@kernel.org>,
Hartmut Knaack <knaack.h@gmx.de>,
Lars-Peter Clausen <lars@metafoo.de>,
Peter Meerwald-Stadler <pmeerw@pmeerw.net>,
linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org
Cc: linux-arm-msm-owner@vger.kernel.org,
Jishnu Prakash <jprakash@codeaurora.org>
Subject: [PATCH V4 4/5] iio: adc: Update error checks and debug prints
Date: Wed, 13 May 2020 14:52:15 +0530 [thread overview]
Message-ID: <1589361736-816-5-git-send-email-jprakash@codeaurora.org> (raw)
In-Reply-To: <1589361736-816-1-git-send-email-jprakash@codeaurora.org>
Change pr_err/pr_debug statements to dev_err/dev_dbg for
increased clarity. Also clean up some return value checks.
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
---
drivers/iio/adc/qcom-spmi-adc5.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index 6d6b611..974073f 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -249,11 +249,11 @@ static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data)
*data = (rslt_msb << 8) | rslt_lsb;
if (*data == ADC5_USR_DATA_CHECK) {
- pr_err("Invalid data:0x%x\n", *data);
+ dev_err(adc->dev, "Invalid data:0x%x\n", *data);
return -EINVAL;
}
- pr_debug("voltage raw code:0x%x\n", *data);
+ dev_dbg(adc->dev, "voltage raw code:0x%x\n", *data);
return 0;
}
@@ -304,7 +304,7 @@ static int adc5_configure(struct adc5_chip *adc,
/* Read registers 0x42 through 0x46 */
ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
- if (ret < 0)
+ if (ret)
return ret;
/* Digital param selection */
@@ -344,7 +344,7 @@ static int adc7_configure(struct adc5_chip *adc,
return ret;
ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
- if (ret < 0)
+ if (ret)
return ret;
/* Digital param selection */
@@ -385,24 +385,24 @@ static int adc5_do_conversion(struct adc5_chip *adc,
ret = adc5_configure(adc, prop);
if (ret) {
- pr_err("ADC configure failed with %d\n", ret);
+ dev_err(adc->dev, "ADC configure failed with %d\n", ret);
goto unlock;
}
if (adc->poll_eoc) {
ret = adc5_poll_wait_eoc(adc);
if (ret < 0) {
- pr_err("EOC bit not set\n");
+ dev_err(adc->dev, "EOC bit not set\n");
goto unlock;
}
} else {
ret = wait_for_completion_timeout(&adc->complete,
ADC5_CONV_TIMEOUT);
if (!ret) {
- pr_debug("Did not get completion timeout.\n");
+ dev_dbg(adc->dev, "Did not get completion timeout.\n");
ret = adc5_poll_wait_eoc(adc);
if (ret < 0) {
- pr_err("EOC bit not set\n");
+ dev_err(adc->dev, "EOC bit not set\n");
goto unlock;
}
}
@@ -435,7 +435,7 @@ static int adc7_do_conversion(struct adc5_chip *adc,
wait_for_completion_timeout(&adc->complete, ADC7_CONV_TIMEOUT);
ret = adc5_read(adc, ADC5_USR_STATUS1, &status, 1);
- if (ret < 0)
+ if (ret)
goto unlock;
if (status & ADC5_USR_STATUS1_CONV_FAULT) {
@@ -481,8 +481,8 @@ static int adc7_of_xlate(struct iio_dev *indio_dev,
int i, v_channel;
for (i = 0; i < adc->nchannels; i++) {
- v_channel = (adc->chan_props[i].sid << ADC_CHANNEL_OFFSET |
- adc->chan_props[i].channel);
+ v_channel = (adc->chan_props[i].sid << ADC_CHANNEL_OFFSET) |
+ adc->chan_props[i].channel;
if (v_channel == iiospec->args[0])
return i;
}
@@ -728,7 +728,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
channel_name = of_get_property(node,
"label", NULL) ? : node->name;
if (!channel_name) {
- pr_err("Invalid channel name\n");
+ dev_err(dev, "Invalid channel name\n");
return -EINVAL;
}
prop->datasheet_name = channel_name;
@@ -766,12 +766,12 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version,
sizeof(dig_version));
- if (ret < 0) {
+ if (ret) {
dev_err(dev, "Invalid dig version read %d\n", ret);
return ret;
}
- pr_debug("dig_ver:minor:%d, major:%d\n", dig_version[0],
+ dev_dbg(dev, "dig_ver:minor:%d, major:%d\n", dig_version[0],
dig_version[1]);
/* Digital controller >= 5.3 have hw_settle_2 option */
if ((dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR &&
@@ -975,7 +975,7 @@ static int adc5_probe(struct platform_device *pdev)
ret = adc5_get_dt_data(adc, node);
if (ret) {
- pr_err("adc get dt data failed\n");
+ dev_err(dev, "adc get dt data failed\n");
return ret;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-05-13 9:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1589361736-816-1-git-send-email-jprakash@codeaurora.org>
2020-05-13 9:22 ` [PATCH V4 1/5] iio: adc: Convert the QCOM SPMI ADC bindings to .yaml format Jishnu Prakash
2020-05-18 7:25 ` Linus Walleij
2020-05-13 9:22 ` [PATCH V4 2/5] iio: adc: Add PMIC7 ADC bindings Jishnu Prakash
2020-05-13 9:22 ` [PATCH V4 3/5] iio: adc: Add support for PMIC7 ADC Jishnu Prakash
2020-05-13 9:48 ` Andy Shevchenko
2020-05-22 11:58 ` Jishnu Prakash
2020-05-22 15:31 ` Andy Shevchenko
2020-05-13 9:22 ` Jishnu Prakash [this message]
2020-05-13 9:49 ` [PATCH V4 4/5] iio: adc: Update error checks and debug prints Andy Shevchenko
2020-05-22 11:58 ` Jishnu Prakash
2020-05-13 9:22 ` [PATCH V4 5/5] iio: adc: Clean up ADC code common to PMIC5 and PMIC7 Jishnu Prakash
2020-05-13 9:51 ` Andy Shevchenko
2020-05-22 11:59 ` Jishnu Prakash
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