[PATCH v7 0/9] hwmon: pmbus: adm1266: add support

[PATCH v7 0/9] hwmon: pmbus: adm1266: add support

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Add PMBus probing driver for the adm1266 Cascadable
Super Sequencer with Margin Control and Fault Recording.
Driver is using the pmbus_core, creating sysfs files
under hwmon for inputs: vh1->vh4 and vp1->vp13.

1. Add PMBus probing driver for inputs vh1->vh4
and vp1->vp13.

2. Add Block Write-Read Process Call command.
A PMBus specific implementation was required because
block write with I2C_SMBUS_PROC_CALL flag allows a
maximum of 32 bytes to be received.

3. This makes adm1266 driver expose GPIOs
to user-space. Currently are read only. Future
developments on the firmware will allow
them to be writable.

4. Allow the current sate of the sequencer to be read
through debugfs.

5. Blackboxes are 64 bytes of chip state related data
that is generated on faults. Use the nvmem kernel api
to expose the blackbox chip functionality to userspace.

6. Add group command support. This will allow the driver
to stop/program all cascaded adm1266 devices at once.

7. Writing the firmware hex file with offset 0
to the nvmem of the master adm1266 will trigger
the firmware programming of all cascaded devices.
The master adm1266 of each device is specified in
the devicetree.

8. Writing the configuration hex file to 0x30000
byte address of the nvmem file will trigger the
programming of that device in particular.

9. DT bindings for ADM1266.

Alexandru Tachici (9):
  hwmon: pmbus: adm1266: add support
  hwmon: pmbus: adm1266: Add Block process call
  hwmon: pmbus: adm1266: Add support for GPIOs
  hwmon: pmbus: adm1266: add debugfs for states
  hwmon: pmbus: adm1266: read blackbox
  hwmon: pmbus: adm1266: Add group command support
  hwmon: pmbus: adm1266: program firmware
  hwmon: pmbus: adm1266: program configuration
  dt-bindings: hwmon: Add bindings for ADM1266

Changelog: v5 -> v6:
  - added adm1266 to index.rst
  - changed max lines length from 80 to 100
  - replaced i2c_get_dma_safe_msg_buf with the use of kzalloc and ____cacheline_aligned
  - removed #ifdef CONFIG_GPIOLIB
  - removed ioctl commands, the state of the device can be read through debugfs
  - use the device managed version of nvmem_register
  - on power-up, set the UNIX time to adm1266 (this value is reset
  to 0 on each power-cycle).
  - removed patch adm1266: debugfs for blackbox info, rtc in blackbox is enough
  to help identify the current index
  - added two new nvmem cells for firmware and configuration

Changelog: v6 -> v7:
  - fixed compilation warning: removed unused variable ,entry, in
adm1266_init_debugfs

 .../bindings/hwmon/adi,adm1266.yaml           |   56 +
 Documentation/hwmon/adm1266.rst               |   37 +
 Documentation/hwmon/index.rst                 |    1 +
 drivers/hwmon/pmbus/Kconfig                   |   10 +
 drivers/hwmon/pmbus/Makefile                  |    1 +
 drivers/hwmon/pmbus/adm1266.c                 | 1272 +++++++++++++++++
 6 files changed, 1377 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml
 create mode 100644 Documentation/hwmon/adm1266.rst
 create mode 100644 drivers/hwmon/pmbus/adm1266.c

-- 
2.20.1

[PATCH v7 1/9] hwmon: pmbus: adm1266: add support

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Add pmbus probing driver for the adm1266 Cascadable
Super Sequencer with Margin Control and Fault Recording.
Driver is using the pmbus_core, creating sysfs files
under hwmon for inputs: vh1->vh4 and vp1->vp13.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 Documentation/hwmon/adm1266.rst | 37 +++++++++++++++++++
 Documentation/hwmon/index.rst   |  1 +
 drivers/hwmon/pmbus/Kconfig     |  9 +++++
 drivers/hwmon/pmbus/Makefile    |  1 +
 drivers/hwmon/pmbus/adm1266.c   | 65 +++++++++++++++++++++++++++++++++
 5 files changed, 113 insertions(+)
 create mode 100644 Documentation/hwmon/adm1266.rst
 create mode 100644 drivers/hwmon/pmbus/adm1266.c

diff --git a/Documentation/hwmon/adm1266.rst b/Documentation/hwmon/adm1266.rst
new file mode 100644
index 000000000000..9257f8a48650
--- /dev/null
+++ b/Documentation/hwmon/adm1266.rst
@@ -0,0 +1,37 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Kernel driver adm1266
+=====================
+
+Supported chips:
+  * Analog Devices ADM1266
+    Prefix: 'adm1266'
+    Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1266.pdf
+
+Author: Alexandru Tachici <alexandru.tachici@analog.com>
+
+
+Description
+-----------
+
+This driver supports hardware monitoring for Analog Devices ADM1266 sequencer.
+
+ADM1266 is a sequencer that features voltage readback from 17 channels via an
+integrated 12 bit SAR ADC, accessed using a PMBus interface.
+
+The driver is a client driver to the core PMBus driver. Please see
+Documentation/hwmon/pmbus for details on PMBus client drivers.
+
+
+Sysfs entries
+-------------
+
+The following attributes are supported. Limits are read-write, history reset
+attributes are write-only, all other attributes are read-only.
+
+inX_label		"voutx"
+inX_input		Measured voltage.
+inX_min			Minimum Voltage.
+inX_max			Maximum voltage.
+inX_min_alarm		Voltage low alarm.
+inX_max_alarm		Voltage high alarm.
diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst
index 55ff4b7c5349..056f7107d7b8 100644
--- a/Documentation/hwmon/index.rst
+++ b/Documentation/hwmon/index.rst
@@ -30,6 +30,7 @@ Hardware Monitoring Kernel Drivers
    adm1026
    adm1031
    adm1177
+   adm1266
    adm1275
    adm9240
    ads7828
diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig
index a337195b1c39..da34083e1ffd 100644
--- a/drivers/hwmon/pmbus/Kconfig
+++ b/drivers/hwmon/pmbus/Kconfig
@@ -26,6 +26,15 @@ config SENSORS_PMBUS
 	  This driver can also be built as a module. If so, the module will
 	  be called pmbus.
 
+config SENSORS_ADM1266
+	tristate "Analog Devices ADM1266 Sequencer"
+	help
+	  If you say yes here you get hardware monitoring support for Analog
+	  Devices ADM1266 Cascadable Super Sequencer.
+
+	  This driver can also be built as a module. If so, the module will
+	  be called adm1266.
+
 config SENSORS_ADM1275
 	tristate "Analog Devices ADM1275 and compatibles"
 	help
diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile
index c4b15db996ad..da41d22be1c9 100644
--- a/drivers/hwmon/pmbus/Makefile
+++ b/drivers/hwmon/pmbus/Makefile
@@ -5,6 +5,7 @@
 
 obj-$(CONFIG_PMBUS)		+= pmbus_core.o
 obj-$(CONFIG_SENSORS_PMBUS)	+= pmbus.o
+obj-$(CONFIG_SENSORS_ADM1266)	+= adm1266.o
 obj-$(CONFIG_SENSORS_ADM1275)	+= adm1275.o
 obj-$(CONFIG_SENSORS_BEL_PFE)	+= bel-pfe.o
 obj-$(CONFIG_SENSORS_IBM_CFFPS)	+= ibm-cffps.o
diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
new file mode 100644
index 000000000000..79e8d90886b8
--- /dev/null
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ADM1266 - Cascadable Super Sequencer with Margin
+ * Control and Fault Recording
+ *
+ * Copyright 2020 Analog Devices Inc.
+ */
+
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include "pmbus.h"
+#include <linux/slab.h>
+
+struct adm1266_data {
+	struct pmbus_driver_info info;
+	struct i2c_client *client;
+};
+
+static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct adm1266_data *data;
+	int i;
+
+	data = devm_kzalloc(&client->dev, sizeof(struct adm1266_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	data->info.pages = 17;
+	data->info.format[PSC_VOLTAGE_OUT] = linear;
+	for (i = 0; i < data->info.pages; i++)
+		data->info.func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+
+	return pmbus_do_probe(client, id, &data->info);
+}
+
+static const struct of_device_id adm1266_of_match[] = {
+	{ .compatible = "adi,adm1266" },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, adm1266_of_match);
+
+static const struct i2c_device_id adm1266_id[] = {
+	{ "adm1266", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, adm1266_id);
+
+static struct i2c_driver adm1266_driver = {
+	.driver = {
+		   .name = "adm1266",
+		   .of_match_table = adm1266_of_match,
+		  },
+	.probe = adm1266_probe,
+	.remove = pmbus_do_remove,
+	.id_table = adm1266_id,
+};
+
+module_i2c_driver(adm1266_driver);
+
+MODULE_AUTHOR("Alexandru Tachici <alexandru.tachici@analog.com>");
+MODULE_DESCRIPTION("PMBus driver for Analog Devices ADM1266");
+MODULE_LICENSE("GPL v2");
-- 
2.20.1

[PATCH v7 2/9] hwmon: pmbus: adm1266: Add Block process call

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

PmBus devices support Block Write-Block Read Process
Call described in SMBus specification v 2.0 with the
exception that Block writes and reads are permitted to
have up 255 data bytes instead of max 32 bytes (SMBus).

This patch adds Block WR process call support for ADM1266.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/Kconfig   |  1 +
 drivers/hwmon/pmbus/adm1266.c | 73 +++++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+)

diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig
index da34083e1ffd..c04068b665e6 100644
--- a/drivers/hwmon/pmbus/Kconfig
+++ b/drivers/hwmon/pmbus/Kconfig
@@ -28,6 +28,7 @@ config SENSORS_PMBUS
 
 config SENSORS_ADM1266
 	tristate "Analog Devices ADM1266 Sequencer"
+	select CRC8
 	help
 	  If you say yes here you get hardware monitoring support for Analog
 	  Devices ADM1266 Cascadable Super Sequencer.
diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index 79e8d90886b8..63975eba34ad 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -6,6 +6,7 @@
  * Copyright 2020 Analog Devices Inc.
  */
 
+#include <linux/crc8.h>
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -13,11 +14,80 @@
 #include "pmbus.h"
 #include <linux/slab.h>
 
+#define ADM1266_PMBUS_BLOCK_MAX		255
+
 struct adm1266_data {
 	struct pmbus_driver_info info;
 	struct i2c_client *client;
+	struct mutex buf_mutex;
+	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
+	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
 };
 
+DECLARE_CRC8_TABLE(pmbus_crc_table);
+
+/*
+ * Different from Block Read as it sends data and waits for the slave to
+ * return a value dependent on that data. The protocol is simply a Write Block
+ * followed by a Read Block without the Read-Block command field and the
+ * Write-Block STOP bit.
+ */
+static int adm1266_pmbus_block_xfer(struct adm1266_data *data, u8 cmd, u8 w_len, u8 *data_w,
+				    u8 *data_r)
+{
+	struct i2c_client *client = data->client;
+	struct i2c_msg msgs[2] = {
+		{
+			.addr = client->addr,
+			.flags = I2C_M_DMA_SAFE,
+			.buf = data->write_buf,
+			.len = w_len + 2,
+		},
+		{
+			.addr = client->addr,
+			.flags = I2C_M_RD | I2C_M_DMA_SAFE,
+			.buf = data->read_buf,
+			.len = ADM1266_PMBUS_BLOCK_MAX + 2,
+		}
+	};
+	u8 addr;
+	u8 crc;
+	int ret;
+
+	mutex_lock(&data->buf_mutex);
+
+	msgs[0].buf[0] = cmd;
+	msgs[0].buf[1] = w_len;
+	memcpy(&msgs[0].buf[2], data_w, w_len);
+
+	ret = i2c_transfer(client->adapter, msgs, 2);
+	if (ret != 2) {
+		if (ret >= 0)
+			ret = -EPROTO;
+		return ret;
+	}
+
+	if (client->flags & I2C_CLIENT_PEC) {
+		addr = i2c_8bit_addr_from_msg(&msgs[0]);
+		crc = crc8(pmbus_crc_table, &addr, 1, 0);
+		crc = crc8(pmbus_crc_table, msgs[0].buf,  msgs[0].len, crc);
+
+		addr = i2c_8bit_addr_from_msg(&msgs[1]);
+		crc = crc8(pmbus_crc_table, &addr, 1, crc);
+		crc = crc8(pmbus_crc_table, msgs[1].buf,  msgs[1].buf[0] + 1, crc);
+
+		if (crc != msgs[1].buf[msgs[1].buf[0] + 1])
+			return -EBADMSG;
+	}
+
+	memcpy(data_r, &msgs[1].buf[1], msgs[1].buf[0]);
+
+	ret = msgs[1].buf[0];
+	mutex_unlock(&data->buf_mutex);
+
+	return ret;
+}
+
 static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct adm1266_data *data;
@@ -33,6 +103,9 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
 	for (i = 0; i < data->info.pages; i++)
 		data->info.func[i] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
 
+	crc8_populate_msb(pmbus_crc_table, 0x7);
+	mutex_init(&data->buf_mutex);
+
 	return pmbus_do_probe(client, id, &data->info);
 }
 
-- 
2.20.1

[PATCH v7 3/9] hwmon: pmbus: adm1266: Add support for GPIOs

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Adm1266 exposes 9 GPIOs and 16 PDIOs which are currently read-only. They
are controlled by the internal sequencing engine.

This patch makes adm1266 driver expose GPIOs and PDIOs to user-space
using GPIO provider kernel api.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 204 ++++++++++++++++++++++++++++++++++
 1 file changed, 204 insertions(+)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index 63975eba34ad..be911de02cf6 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -6,18 +6,42 @@
  * Copyright 2020 Analog Devices Inc.
  */
 
+#include <linux/bitfield.h>
 #include <linux/crc8.h>
+#include <linux/debugfs.h>
+#include <linux/gpio/driver.h>
 #include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include "pmbus.h"
 #include <linux/slab.h>
 
+#define ADM1266_PDIO_CONFIG	0xD4
+#define ADM1266_GPIO_CONFIG	0xE1
+#define ADM1266_PDIO_STATUS	0xE9
+#define ADM1266_GPIO_STATUS	0xEA
+
+/* ADM1266 GPIO defines */
+#define ADM1266_GPIO_NR			9
+#define ADM1266_GPIO_FUNCTIONS(x)	FIELD_GET(BIT(0), x)
+#define ADM1266_GPIO_INPUT_EN(x)	FIELD_GET(BIT(2), x)
+#define ADM1266_GPIO_OUTPUT_EN(x)	FIELD_GET(BIT(3), x)
+#define ADM1266_GPIO_OPEN_DRAIN(x)	FIELD_GET(BIT(4), x)
+
+/* ADM1266 PDIO defines */
+#define ADM1266_PDIO_NR			16
+#define ADM1266_PDIO_PIN_CFG(x)		FIELD_GET(GENMASK(15, 13), x)
+#define ADM1266_PDIO_GLITCH_FILT(x)	FIELD_GET(GENMASK(12, 9), x)
+#define ADM1266_PDIO_OUT_CFG(x)		FIELD_GET(GENMASK(2, 0), x)
+
 #define ADM1266_PMBUS_BLOCK_MAX		255
 
 struct adm1266_data {
 	struct pmbus_driver_info info;
+	struct gpio_chip gc;
+	const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
 	struct i2c_client *client;
 	struct mutex buf_mutex;
 	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
@@ -88,9 +112,185 @@ static int adm1266_pmbus_block_xfer(struct adm1266_data *data, u8 cmd, u8 w_len,
 	return ret;
 }
 
+static const unsigned int adm1266_gpio_mapping[ADM1266_GPIO_NR][2] = {
+	{1, 0},
+	{2, 1},
+	{3, 2},
+	{4, 8},
+	{5, 9},
+	{6, 10},
+	{7, 11},
+	{8, 6},
+	{9, 7},
+};
+
+static const char *adm1266_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR] = {
+	"GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7", "GPIO8",
+	"GPIO9", "PDIO1", "PDIO2", "PDIO3", "PDIO4", "PDIO5", "PDIO6",
+	"PDIO7", "PDIO8", "PDIO9", "PDIO10", "PDIO11", "PDIO12", "PDIO13",
+	"PDIO14", "PDIO15", "PDIO16",
+};
+
+static int adm1266_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+	struct adm1266_data *data = gpiochip_get_data(chip);
+	u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
+	unsigned long pins_status;
+	unsigned int pmbus_cmd;
+	int ret;
+
+	if (offset < ADM1266_GPIO_NR)
+		pmbus_cmd = ADM1266_GPIO_STATUS;
+	else
+		pmbus_cmd = ADM1266_PDIO_STATUS;
+
+	ret = i2c_smbus_read_block_data(data->client, pmbus_cmd, read_buf);
+	if (ret < 0)
+		return ret;
+
+	pins_status = read_buf[0] + (read_buf[1] << 8);
+	if (offset < ADM1266_GPIO_NR)
+		return test_bit(adm1266_gpio_mapping[offset][1], &pins_status);
+
+	return test_bit(offset - ADM1266_GPIO_NR, &pins_status);
+}
+
+static int adm1266_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
+				     unsigned long *bits)
+{
+	struct adm1266_data *data = gpiochip_get_data(chip);
+	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
+	unsigned long status;
+	unsigned int gpio_nr;
+	int ret;
+
+	ret = i2c_smbus_read_block_data(data->client, ADM1266_GPIO_STATUS, read_buf);
+	if (ret < 0)
+		return ret;
+
+	status = read_buf[0] + (read_buf[1] << 8);
+
+	*bits = 0;
+	for_each_set_bit(gpio_nr, mask, ADM1266_GPIO_NR) {
+		if (test_bit(adm1266_gpio_mapping[gpio_nr][1], &status))
+			set_bit(gpio_nr, bits);
+	}
+
+	ret = i2c_smbus_read_block_data(data->client, ADM1266_PDIO_STATUS, read_buf);
+	if (ret < 0)
+		return ret;
+
+	status = read_buf[0] + (read_buf[1] << 8);
+
+	*bits = 0;
+	for_each_set_bit_from(gpio_nr, mask, ADM1266_GPIO_NR + ADM1266_PDIO_STATUS) {
+		if (test_bit(gpio_nr - ADM1266_GPIO_NR, &status))
+			set_bit(gpio_nr, bits);
+	}
+
+	return 0;
+}
+
+static void adm1266_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
+{
+	struct adm1266_data *data = gpiochip_get_data(chip);
+	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
+	unsigned long gpio_config;
+	unsigned long pdio_config;
+	unsigned long pin_cfg;
+	u8 write_cmd;
+	int ret;
+	int i;
+
+	for (i = 0; i < ADM1266_GPIO_NR; i++) {
+		write_cmd = adm1266_gpio_mapping[i][1];
+		ret = adm1266_pmbus_block_xfer(data, ADM1266_GPIO_CONFIG, 1, &write_cmd, read_buf);
+		if (ret != 2)
+			return;
+
+		gpio_config = read_buf[0];
+		seq_puts(s, adm1266_names[i]);
+
+		seq_puts(s, " ( ");
+		if (!ADM1266_GPIO_FUNCTIONS(gpio_config)) {
+			seq_puts(s, "high-Z )\n");
+			continue;
+		}
+		if (ADM1266_GPIO_INPUT_EN(gpio_config))
+			seq_puts(s, "input ");
+		if (ADM1266_GPIO_OUTPUT_EN(gpio_config))
+			seq_puts(s, "output ");
+		if (ADM1266_GPIO_OPEN_DRAIN(gpio_config))
+			seq_puts(s, "open-drain )\n");
+		else
+			seq_puts(s, "push-pull )\n");
+	}
+
+	write_cmd = 0xFF;
+	ret = adm1266_pmbus_block_xfer(data, ADM1266_PDIO_CONFIG, 1, &write_cmd, read_buf);
+	if (ret != 32)
+		return;
+
+	for (i = 0; i < ADM1266_PDIO_NR; i++) {
+		seq_puts(s, adm1266_names[ADM1266_GPIO_NR + i]);
+
+		pdio_config = read_buf[2 * i];
+		pdio_config += (read_buf[2 * i + 1] << 8);
+		pin_cfg = ADM1266_PDIO_PIN_CFG(pdio_config);
+
+		seq_puts(s, " ( ");
+		if (!pin_cfg || pin_cfg > 5) {
+			seq_puts(s, "high-Z )\n");
+			continue;
+		}
+
+		if (pin_cfg & BIT(0))
+			seq_puts(s, "output ");
+
+		if (pin_cfg & BIT(1))
+			seq_puts(s, "input ");
+
+		seq_puts(s, ")\n");
+	}
+}
+
+static int adm1266_config_gpio(struct adm1266_data *data)
+{
+	const char *name = dev_name(&data->client->dev);
+	char *gpio_name;
+	int ret;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(data->gpio_names); i++) {
+		gpio_name = devm_kasprintf(&data->client->dev, GFP_KERNEL, "adm1266-%x-%s",
+					   data->client->addr, adm1266_names[i]);
+		if (!gpio_name)
+			return -ENOMEM;
+
+		data->gpio_names[i] = gpio_name;
+	}
+
+	data->gc.label = name;
+	data->gc.parent = &data->client->dev;
+	data->gc.owner = THIS_MODULE;
+	data->gc.base = -1;
+	data->gc.names = data->gpio_names;
+	data->gc.ngpio = ARRAY_SIZE(data->gpio_names);
+	data->gc.get = adm1266_gpio_get;
+	data->gc.get_multiple = adm1266_gpio_get_multiple;
+	data->gc.dbg_show = adm1266_gpio_dbg_show;
+
+	ret = devm_gpiochip_add_data(&data->client->dev, &data->gc, data);
+	if (ret)
+		dev_err(&data->client->dev, "GPIO registering failed (%d)\n", ret);
+
+	return ret;
+}
+
 static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct adm1266_data *data;
+	int ret;
 	int i;
 
 	data = devm_kzalloc(&client->dev, sizeof(struct adm1266_data), GFP_KERNEL);
@@ -106,6 +306,10 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
 	crc8_populate_msb(pmbus_crc_table, 0x7);
 	mutex_init(&data->buf_mutex);
 
+	ret = adm1266_config_gpio(data);
+	if (ret < 0)
+		return ret;
+
 	return pmbus_do_probe(client, id, &data->info);
 }
 
-- 
2.20.1

[PATCH v7 4/9] hwmon: pmbus: adm1266: add debugfs for states

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Add a debugfs entry which prints the current state
of the adm1266 sequencer.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 41 ++++++++++++++++++++++++++++++++++-
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index be911de02cf6..0ea016b7e113 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -19,6 +19,7 @@
 #include <linux/slab.h>
 
 #define ADM1266_PDIO_CONFIG	0xD4
+#define ADM1266_READ_STATE	0xD9
 #define ADM1266_GPIO_CONFIG	0xE1
 #define ADM1266_PDIO_STATUS	0xE9
 #define ADM1266_GPIO_STATUS	0xEA
@@ -43,6 +44,7 @@ struct adm1266_data {
 	struct gpio_chip gc;
 	const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
 	struct i2c_client *client;
+	struct dentry *debugfs_dir;
 	struct mutex buf_mutex;
 	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
 	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
@@ -287,6 +289,37 @@ static int adm1266_config_gpio(struct adm1266_data *data)
 	return ret;
 }
 
+static int adm1266_state_read(struct seq_file *s, void *pdata)
+{
+	struct device *dev = s->private;
+	struct i2c_client *client = to_i2c_client(dev);
+	int ret;
+
+	ret = i2c_smbus_read_word_data(client, ADM1266_READ_STATE);
+	if (ret < 0)
+		return ret;
+
+	seq_printf(s, "%d\n", ret);
+
+	return 0;
+}
+
+static void adm1266_init_debugfs(struct adm1266_data *data)
+{
+	struct dentry *root;
+
+	root = pmbus_get_debugfs_dir(data->client);
+	if (!root)
+		return;
+
+	data->debugfs_dir = debugfs_create_dir(data->client->name, root);
+	if (!data->debugfs_dir)
+		return;
+
+	debugfs_create_devm_seqfile(&data->client->dev, "sequencer_state", data->debugfs_dir,
+				    adm1266_state_read);
+}
+
 static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct adm1266_data *data;
@@ -310,7 +343,13 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
 	if (ret < 0)
 		return ret;
 
-	return pmbus_do_probe(client, id, &data->info);
+	ret = pmbus_do_probe(client, id, &data->info);
+	if (ret)
+		return ret;
+
+	adm1266_init_debugfs(data);
+
+	return 0;
 }
 
 static const struct of_device_id adm1266_of_match[] = {
-- 
2.20.1

[PATCH v7 5/9] hwmon: pmbus: adm1266: read blackbox

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Use the nvmem kernel api to expose the black box
chip functionality to userspace.

Using this feature, the device is capable of recording
to nonvolatile flash memory the vital data about the
system status that caused the system to perform a
black box write.

A blackbox is 64 bytes of data containing all the
status registers, last two states of the sequencer,
timestamp and counters. The mapping of this data is
described in the adm1266 datasheet.

On power-up the driver sets the unix time to
the adm1266 using the SET_RTC command. This value
is incremented by an internal clock and it is used
as timestamp for the black box feature.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 165 ++++++++++++++++++++++++++++++++++
 1 file changed, 165 insertions(+)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index 0ea016b7e113..b61a968d67f9 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -15,12 +15,19 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/nvmem-provider.h>
 #include "pmbus.h"
 #include <linux/slab.h>
+#include <linux/timekeeping.h>
 
+#define ADM1266_BLACKBOX_CONFIG	0xD3
 #define ADM1266_PDIO_CONFIG	0xD4
 #define ADM1266_READ_STATE	0xD9
+#define ADM1266_READ_BLACKBOX	0xDE
+#define ADM1266_SET_RTC		0xDF
 #define ADM1266_GPIO_CONFIG	0xE1
+#define ADM1266_BLACKBOX_INFO	0xE6
 #define ADM1266_PDIO_STATUS	0xE9
 #define ADM1266_GPIO_STATUS	0xEA
 
@@ -37,6 +44,9 @@
 #define ADM1266_PDIO_GLITCH_FILT(x)	FIELD_GET(GENMASK(12, 9), x)
 #define ADM1266_PDIO_OUT_CFG(x)		FIELD_GET(GENMASK(2, 0), x)
 
+#define ADM1266_BLACKBOX_OFFSET		0x7F700
+#define ADM1266_BLACKBOX_SIZE		64
+
 #define ADM1266_PMBUS_BLOCK_MAX		255
 
 struct adm1266_data {
@@ -45,11 +55,22 @@ struct adm1266_data {
 	const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
 	struct i2c_client *client;
 	struct dentry *debugfs_dir;
+	struct nvmem_config nvmem_config;
+	struct nvmem_device *nvmem;
+	u8 *dev_mem;
 	struct mutex buf_mutex;
 	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
 	u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
 };
 
+static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
+	{
+		.name           = "blackbox",
+		.offset         = ADM1266_BLACKBOX_OFFSET,
+		.bytes          = 2048,
+	},
+};
+
 DECLARE_CRC8_TABLE(pmbus_crc_table);
 
 /*
@@ -320,6 +341,142 @@ static void adm1266_init_debugfs(struct adm1266_data *data)
 				    adm1266_state_read);
 }
 
+#if IS_ENABLED(CONFIG_NVMEM)
+static int adm1266_nvmem_read_blackbox(struct adm1266_data *data, u8 *read_buff)
+{
+	int record_count;
+	char index;
+	u8 buf[5];
+	int ret;
+
+	ret = i2c_smbus_read_block_data(data->client, ADM1266_BLACKBOX_INFO, buf);
+	if (ret < 0)
+		return ret;
+
+	if (ret != 4)
+		return -EIO;
+
+	record_count = buf[3];
+
+	for (index = 0; index < record_count; index++) {
+		ret = adm1266_pmbus_block_xfer(data, ADM1266_READ_BLACKBOX, 1, &index, read_buff);
+		if (ret < 0)
+			return ret;
+
+		if (ret != ADM1266_BLACKBOX_SIZE)
+			return -EIO;
+
+		read_buff += ADM1266_BLACKBOX_SIZE;
+	}
+
+	return 0;
+}
+
+static bool adm1266_cell_is_accessed(const struct nvmem_cell_info *mem_cell, unsigned int offset,
+				     size_t bytes)
+{
+	unsigned int start_addr = offset;
+	unsigned int end_addr = offset + bytes;
+	unsigned int cell_start = mem_cell->offset;
+	unsigned int cell_end = mem_cell->offset + mem_cell->bytes;
+
+	return start_addr <= cell_end && cell_start <= end_addr;
+}
+
+static int adm1266_read_mem_cell(struct adm1266_data *data, const struct nvmem_cell_info *mem_cell)
+{
+	u8 *mem_offset;
+	int ret;
+
+	switch (mem_cell->offset) {
+	case ADM1266_BLACKBOX_OFFSET:
+		mem_offset = data->dev_mem + mem_cell->offset;
+
+		memset(mem_offset, 0, ADM1266_BLACKBOX_SIZE);
+
+		ret = adm1266_nvmem_read_blackbox(data, mem_offset);
+		if (ret)
+			dev_err(&data->client->dev, "Could not read blackbox!");
+		return ret;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int adm1266_nvmem_read(void *priv, unsigned int offset, void *val,
+			      size_t bytes)
+{
+	const struct nvmem_cell_info *mem_cell;
+	struct adm1266_data *data = priv;
+	int ret;
+	int i;
+
+	for (i = 0; i < data->nvmem_config.ncells; i++) {
+		mem_cell = &adm1266_nvmem_cells[i];
+		if (!adm1266_cell_is_accessed(mem_cell, offset, bytes))
+			continue;
+
+		ret = adm1266_read_mem_cell(data, mem_cell);
+		if (ret < 0)
+			return ret;
+	}
+
+	memcpy(val, data->dev_mem + offset, bytes);
+
+	return 0;
+}
+
+static int adm1266_config_nvmem(struct adm1266_data *data)
+{
+	data->nvmem_config.name = dev_name(&data->client->dev);
+	data->nvmem_config.dev = &data->client->dev;
+	data->nvmem_config.root_only = true;
+	data->nvmem_config.read_only = true;
+	data->nvmem_config.owner = THIS_MODULE;
+	data->nvmem_config.reg_read = adm1266_nvmem_read;
+	data->nvmem_config.cells = adm1266_nvmem_cells;
+	data->nvmem_config.ncells = ARRAY_SIZE(adm1266_nvmem_cells);
+	data->nvmem_config.priv = data;
+	data->nvmem_config.stride = 1;
+	data->nvmem_config.word_size = 1;
+	data->nvmem_config.size = 0x80000;
+
+	data->dev_mem = devm_kzalloc(&data->client->dev, data->nvmem_config.size, GFP_KERNEL);
+	if (!data->dev_mem)
+		return -ENOMEM;
+
+	data->nvmem = devm_nvmem_register(&data->client->dev, &data->nvmem_config);
+	if (IS_ERR(data->nvmem)) {
+		dev_err(&data->client->dev, "Could not register nvmem!");
+		return PTR_ERR(data->nvmem);
+	}
+
+	return 0;
+}
+#else
+static int adm1266_config_nvmem(struct adm1266_data *data)
+{
+	return 0;
+}
+#endif /* CONFIG_NVMEM */
+
+static int adm1266_set_rtc(struct adm1266_data *data)
+{
+	time64_t kt;
+	char write_buf[6];
+	int i;
+
+	kt = ktime_get_seconds();
+
+	memset(write_buf, 0, sizeof(write_buf));
+
+	for (i = 0; i < 4; i++)
+		write_buf[2 + i] = (kt >> (i * 8)) & 0xFF;
+
+	return i2c_smbus_write_block_data(data->client, ADM1266_SET_RTC, sizeof(write_buf),
+					  write_buf);
+}
+
 static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct adm1266_data *data;
@@ -343,6 +500,14 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
 	if (ret < 0)
 		return ret;
 
+	ret = adm1266_set_rtc(data);
+	if (ret < 0)
+		return ret;
+
+	ret = adm1266_config_nvmem(data);
+	if (ret < 0)
+		return ret;
+
 	ret = pmbus_do_probe(client, id, &data->info);
 	if (ret)
 		return ret;
-- 
2.20.1

[PATCH v7 6/9] hwmon: pmbus: adm1266: Add group command support

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

The Group Command Protocol is used to send commands
to more than one PMBus device. Some devices working
together require that they must execute some commands
all at once.

The commands are sent in one continuous transmission.
When the devices detect the STOP condition that ends
the sending of commands, they all begin executing
the command they received.

This patch adds support for the group command protocol.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 50 +++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index b61a968d67f9..f571fe1ee35d 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -73,6 +73,56 @@ static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
 
 DECLARE_CRC8_TABLE(pmbus_crc_table);
 
+/* PMBus Group command. */
+static int adm1266_pmbus_group_command(struct adm1266_data *data, struct i2c_client **clients,
+				       u8 nr_clients, u8 cmd, u8 w_len, u8 *data_w)
+{
+	struct i2c_msg *msgs;
+	u8 addr;
+	int ret;
+	int i;
+
+	msgs = kcalloc(nr_clients, sizeof(struct i2c_msg), GFP_KERNEL);
+	if (!msgs)
+		return -ENOMEM;
+
+	for (i = 0; i < nr_clients; i++) {
+		msgs[i].addr = clients[i]->addr;
+		msgs[i].len = w_len + 1;
+
+		msgs[i].buf = kcalloc(ADM1266_PMBUS_BLOCK_MAX + 2, sizeof(u8), GFP_KERNEL);
+		if (!msgs[i].buf) {
+			ret = -ENOMEM;
+			goto cleanup;
+		}
+
+		msgs[i].buf[0] = cmd;
+		memcpy(&msgs[i].buf[1], data_w, w_len);
+
+		if (clients[i]->flags & I2C_CLIENT_PEC) {
+			u8 crc = 0;
+
+			addr = i2c_8bit_addr_from_msg(&msgs[i]);
+			crc = crc8(pmbus_crc_table, &addr, 1, crc);
+			crc = crc8(pmbus_crc_table, msgs[i].buf, msgs[i].len,
+				   crc);
+
+			msgs[i].buf[msgs[i].len] = crc;
+			msgs[i].len++;
+		}
+	};
+
+	ret = i2c_transfer(data->client->adapter, msgs, nr_clients);
+
+cleanup:
+	for (i = i - 1; i >= 0; i--)
+		kfree(msgs[i].buf);
+
+	kfree(msgs);
+
+	return ret;
+}
+
 /*
  * Different from Block Read as it sends data and waits for the slave to
  * return a value dependent on that data. The protocol is simply a Write Block
-- 
2.20.1

[PATCH v7 7/9] hwmon: pmbus: adm1266: program firmware

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Writing the firmware Intel hex file to the nvmem,
of the master adm1266,  with offset 0, will now
trigger the firmware programming of all cascaded
devices simultaneously through pmbus.

During this process all adm1266 sequencers will be
stopped and at the end will be issued a hard reset
(see AN-1453 Programming the firmware).

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 501 +++++++++++++++++++++++++++++++++-
 1 file changed, 500 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index f571fe1ee35d..f851c6617870 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -9,6 +9,7 @@
 #include <linux/bitfield.h>
 #include <linux/crc8.h>
 #include <linux/debugfs.h>
+#include <linux/delay.h>
 #include <linux/gpio/driver.h>
 #include <linux/i2c.h>
 #include <linux/i2c-smbus.h>
@@ -18,18 +19,31 @@
 #include <linux/nvmem-consumer.h>
 #include <linux/nvmem-provider.h>
 #include "pmbus.h"
+#include <linux/property.h>
 #include <linux/slab.h>
 #include <linux/timekeeping.h>
 
+#define ADM1266_STORE_USER_ALL	0x15
+#define ADM1266_STATUS_MFR	0x80
+#define ADM1266_IC_DEVICE_REV	0xAE
 #define ADM1266_BLACKBOX_CONFIG	0xD3
 #define ADM1266_PDIO_CONFIG	0xD4
+#define ADM1266_SEQUENCE_CONFIG	0xD6
+#define ADM1266_SYSTEM_CONFIG	0xD7
+#define ADM1266_GO_COMMAND	0xD8
 #define ADM1266_READ_STATE	0xD9
 #define ADM1266_READ_BLACKBOX	0xDE
 #define ADM1266_SET_RTC		0xDF
+#define ADM1266_LOGIC_CONFIG	0xE0
 #define ADM1266_GPIO_CONFIG	0xE1
+#define ADM1266_USER_DATA	0xE3
 #define ADM1266_BLACKBOX_INFO	0xE6
 #define ADM1266_PDIO_STATUS	0xE9
 #define ADM1266_GPIO_STATUS	0xEA
+#define ADM1266_MEMORY_CONFIG	0xF8
+#define ADM1266_SWITCH_MEMORY	0xFA
+#define ADM1266_UPDATE_FW	0xFC
+#define ADM1266_FW_PASSWORD	0xFD
 
 /* ADM1266 GPIO defines */
 #define ADM1266_GPIO_NR			9
@@ -44,10 +58,35 @@
 #define ADM1266_PDIO_GLITCH_FILT(x)	FIELD_GET(GENMASK(12, 9), x)
 #define ADM1266_PDIO_OUT_CFG(x)		FIELD_GET(GENMASK(2, 0), x)
 
+/* ADM1266 FW_PASSWORD defines*/
+#define ADM1266_PASSWD_CMD_LEN	17
+#define ADM1266_CHANGE_PASSWORD	1
+#define ADM1266_UNLOCK_DEV	2
+#define ADM1266_LOCK_DEV	3
+
+/* ADM1266 STATUS_MFR defines */
+#define ADM1266_STATUS_PART_LOCKED(x)	FIELD_GET(BIT(2), x)
+
+/* ADM1266 GO_COMMAND defines */
+#define ADM1266_GO_COMMAND_STOP		BIT(0)
+#define ADM1266_GO_COMMAND_SEQ_RES	BIT(1)
+#define ADM1266_GO_COMMAND_HARD_RES	BIT(2)
+
+#define ADM1266_FIRMWARE_OFFSET		0x00000
+#define ADM1266_FIRMWARE_SIZE		131072
 #define ADM1266_BLACKBOX_OFFSET		0x7F700
 #define ADM1266_BLACKBOX_SIZE		64
 
 #define ADM1266_PMBUS_BLOCK_MAX		255
+#define ADM1266_MAX_DEVICES		16
+
+static LIST_HEAD(registered_masters);
+static DEFINE_MUTEX(registered_masters_lock);
+
+struct adm1266_data_ref {
+	struct adm1266_data *data;
+	struct list_head list;
+};
 
 struct adm1266_data {
 	struct pmbus_driver_info info;
@@ -57,6 +96,10 @@ struct adm1266_data {
 	struct dentry *debugfs_dir;
 	struct nvmem_config nvmem_config;
 	struct nvmem_device *nvmem;
+	bool master_dev;
+	struct list_head cascaded_devices_list;
+	struct mutex cascaded_devices_mutex; /* lock cascaded_devices_list */
+	u8 nr_devices;
 	u8 *dev_mem;
 	struct mutex buf_mutex;
 	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
@@ -69,6 +112,11 @@ static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
 		.offset         = ADM1266_BLACKBOX_OFFSET,
 		.bytes          = 2048,
 	},
+	{
+		.name           = "firmware",
+		.offset         = ADM1266_FIRMWARE_OFFSET,
+		.bytes          = ADM1266_FIRMWARE_SIZE,
+	},
 };
 
 DECLARE_CRC8_TABLE(pmbus_crc_table);
@@ -123,6 +171,27 @@ static int adm1266_pmbus_group_command(struct adm1266_data *data, struct i2c_cli
 	return ret;
 }
 
+static int adm1266_group_cmd(struct adm1266_data *data, u8 cmd, u8 *write_data, u8 w_len,
+			     bool to_slaves)
+{
+	struct i2c_client *clients[ADM1266_MAX_DEVICES];
+	struct adm1266_data_ref *slave_ref;
+	int i = 0;
+
+	clients[i] = data->client;
+	i++;
+
+	if (!to_slaves)
+		return adm1266_pmbus_group_command(data, clients, 1, cmd, w_len, write_data);
+
+	list_for_each_entry(slave_ref, &data->cascaded_devices_list, list) {
+		clients[i] = slave_ref->data->client;
+		i++;
+	}
+
+	return adm1266_pmbus_group_command(data, clients, i, cmd, w_len, write_data);
+}
+
 /*
  * Different from Block Read as it sends data and waits for the slave to
  * return a value dependent on that data. The protocol is simply a Write Block
@@ -448,6 +517,9 @@ static int adm1266_read_mem_cell(struct adm1266_data *data, const struct nvmem_c
 		if (ret)
 			dev_err(&data->client->dev, "Could not read blackbox!");
 		return ret;
+	case ADM1266_FIRMWARE_OFFSET:
+		/* firmware is write-only */
+		return 0;
 	default:
 		return -EINVAL;
 	}
@@ -476,14 +548,411 @@ static int adm1266_nvmem_read(void *priv, unsigned int offset, void *val,
 	return 0;
 }
 
+static int adm1266_unlock_device(struct adm1266_data *data)
+{
+	struct i2c_client *client = data->client;
+	u8 passwd_cmd[ADM1266_PASSWD_CMD_LEN];
+	int reg_val;
+	int ret;
+	int i;
+
+	memset(passwd_cmd, 0xFF, ADM1266_PASSWD_CMD_LEN);
+	passwd_cmd[ADM1266_PASSWD_CMD_LEN - 1] = ADM1266_UNLOCK_DEV;
+
+	/* password needs to be written twice correctly*/
+	for (i = 0; i < 2; i++) {
+		ret = i2c_smbus_write_block_data(client, ADM1266_FW_PASSWORD,
+						 ADM1266_PASSWD_CMD_LEN, passwd_cmd);
+		if (ret < 0) {
+			dev_err(&client->dev, "Could not write password.");
+			return ret;
+		}
+
+		/* 50 ms delay between subsequent password writes are needed*/
+		msleep(50);
+	}
+
+	/* check if device is unlocked */
+	reg_val = pmbus_read_byte_data(client, 0, ADM1266_STATUS_MFR);
+	if (reg_val < 0) {
+		dev_err(&client->dev, "Could not read status.");
+		return reg_val;
+	}
+	if (ADM1266_STATUS_PART_LOCKED(reg_val)) {
+		dev_err(&client->dev, "Device locked.");
+		return -EBUSY;
+	}
+
+	return 0;
+}
+
+static int adm1266_unlock_all_dev(struct adm1266_data *data)
+{
+	struct adm1266_data_ref *slave_ref;
+	int ret;
+
+	ret = adm1266_unlock_device(data);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not unlock master.");
+		return ret;
+	}
+
+	list_for_each_entry(slave_ref, &data->cascaded_devices_list, list) {
+		ret = adm1266_unlock_device(slave_ref->data);
+		if (ret < 0) {
+			dev_err(&data->client->dev, "Could not unlock slave addr: %d.",
+				slave_ref->data->client->addr);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int adm1266_lock_device(struct adm1266_data *data)
+{
+	struct i2c_client *client = data->client;
+	u8 passwd_cmd[ADM1266_PASSWD_CMD_LEN];
+	int reg_val;
+	int ret;
+
+	memset(passwd_cmd, 0, ADM1266_PASSWD_CMD_LEN);
+	passwd_cmd[ADM1266_PASSWD_CMD_LEN - 1] = ADM1266_LOCK_DEV;
+
+	ret = i2c_smbus_write_block_data(client, ADM1266_FW_PASSWORD, ADM1266_PASSWD_CMD_LEN,
+					 passwd_cmd);
+	if (ret < 0)
+		return ret;
+
+	msleep(50);
+
+	/* check if device is now locked */
+	reg_val = pmbus_read_byte_data(client, 0, ADM1266_STATUS_MFR);
+	if (reg_val < 0)
+		return reg_val;
+
+	if (!ADM1266_STATUS_PART_LOCKED(reg_val))
+		return -EBUSY;
+
+	return 0;
+}
+
+static void adm1266_lock_all_dev(struct adm1266_data *data)
+{
+	struct adm1266_data_ref *slave_ref;
+	int ret;
+
+	ret = adm1266_lock_device(data);
+	if (ret < 0)
+		dev_warn(&data->client->dev, "Could not lock dev: %s.",
+			 dev_name(&data->client->dev));
+
+	list_for_each_entry(slave_ref, &data->cascaded_devices_list, list) {
+		ret = adm1266_lock_device(slave_ref->data);
+		if (ret < 0)
+			dev_warn(&slave_ref->data->client->dev, "Could not lock dev: %s.",
+				 dev_name(&slave_ref->data->client->dev));
+	}
+}
+
+static const int write_delays[][3] = {
+	{ADM1266_SYSTEM_CONFIG, 400, 1},
+	{ADM1266_USER_DATA, 100, 1},
+	{ADM1266_LOGIC_CONFIG, 200, 1},
+	{ADM1266_SEQUENCE_CONFIG, 2500, 1},
+	{ADM1266_UPDATE_FW, 2000, 1},
+	{ADM1266_MEMORY_CONFIG, 100, 0},
+	{ADM1266_STORE_USER_ALL, 300, 0},
+};
+
+static int adm1266_write_hex(struct adm1266_data *data,
+			     unsigned int offset, unsigned int size)
+{
+	const u8 *ending_str = ":00000001FF";
+	u8 *hex_cmd = data->dev_mem + offset;
+	u8 *fw_end = data->dev_mem + offset + size;
+	unsigned int write_delay;
+	u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
+	u8 first_writes[7];
+	u8 byte_count;
+	u8 reg_address;
+	int ret;
+	int i;
+
+	memset(first_writes, 1, 7);
+
+	while (hex_cmd < fw_end) {
+		hex_cmd = strnchr(hex_cmd, size, ':');
+
+		if (!hex_cmd || hex_cmd >= fw_end) {
+			dev_err(&data->client->dev, "Firmware ending missing.");
+			return -EINVAL;
+		}
+
+		if (!strncmp(hex_cmd, ending_str, strlen(ending_str)))
+			break;
+
+		hex_cmd++;
+
+		ret = hex2bin(&byte_count, hex_cmd, 1);
+		if (ret < 0)
+			return ret;
+
+		ret = hex2bin(&reg_address, hex_cmd + 4, 1);
+		if (ret < 0)
+			return ret;
+
+		ret = hex2bin(write_buf, hex_cmd + 8, byte_count);
+		if (ret < 0)
+			return ret;
+
+		ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, true);
+		if (ret < 0) {
+			dev_err(&data->client->dev, "Firmware write error: %d.", ret);
+			return ret;
+		}
+
+		/* write to eeprom with specified delays */
+		write_delay = 40;
+		for (i = 0; i < 7; i++) {
+			if (reg_address == write_delays[i][0]) {
+				if (write_delays[i][2] && first_writes[i]) {
+					first_writes[i] = 0;
+					write_delay = write_delays[i][1];
+				}
+
+				if (!write_delays[i][2])
+					write_delay = write_delays[i][1];
+			}
+		}
+		msleep(write_delay);
+	}
+
+	return 0;
+}
+
+static int adm1266_program_firmware(struct adm1266_data *data)
+{
+	u8 write_data[3];
+	int ret;
+
+	write_data[0] = ADM1266_GO_COMMAND_STOP | ADM1266_GO_COMMAND_SEQ_RES;
+	write_data[1] = 0x0;
+	ret = adm1266_group_cmd(data, ADM1266_GO_COMMAND, write_data, 2, true);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not stop all devs.");
+		return ret;
+	}
+
+	/* after issuing a stop command, wait 100 ms */
+	msleep(100);
+
+	ret = adm1266_unlock_all_dev(data);
+	if (ret < 0)
+		goto lock_all_devices;
+
+	write_data[0] = 0x2;
+	write_data[1] = 0x0;
+	write_data[2] = 0x0;
+	ret = adm1266_group_cmd(data, ADM1266_UPDATE_FW, write_data, 3, true);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not set bootloader mode.");
+		goto lock_all_devices;
+	}
+
+	/* wait for adm1266 to enter bootloader mode */
+	msleep(2000);
+
+	ret = adm1266_write_hex(data, ADM1266_FIRMWARE_OFFSET,
+				ADM1266_FIRMWARE_SIZE);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not write hex.");
+		goto lock_all_devices;
+	}
+
+	write_data[0] = ADM1266_GO_COMMAND_HARD_RES;
+	ret = adm1266_group_cmd(data, ADM1266_GO_COMMAND, write_data, 2, true);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not reset all devs.");
+		goto lock_all_devices;
+	}
+
+lock_all_devices:
+	adm1266_lock_all_dev(data);
+
+	return ret;
+}
+
+/* check if firmware/config write has ended */
+static bool adm1266_check_ending(struct adm1266_data *data, unsigned int offset,
+				 unsigned int size)
+{
+	const u8 *ending_str = ":00000001FF";
+	u8 *hex_cmd = data->dev_mem + offset;
+	u8 *fw_end = data->dev_mem + offset + size;
+
+	hex_cmd = strnchr(hex_cmd, size, ':');
+	for (; hex_cmd && hex_cmd < fw_end;
+	     hex_cmd = strnchr(hex_cmd, size, ':')) {
+		if (!strncmp(hex_cmd, ending_str, strlen(ending_str)))
+			return true;
+
+		hex_cmd++;
+	}
+
+	return false;
+}
+
+static int adm1266_write_mem_cell(struct adm1266_data *data,
+				  const struct nvmem_cell_info *mem_cell,
+				  unsigned int offset,
+				  u8 *val,
+				  size_t bytes)
+{
+	unsigned int cell_end = mem_cell->offset + mem_cell->bytes;
+	unsigned int cell_start = mem_cell->offset;
+	int (*program_func)(struct adm1266_data *data);
+	bool fw_writen;
+
+	switch (mem_cell->offset) {
+	case ADM1266_FIRMWARE_OFFSET:
+		if (!data->master_dev) {
+			dev_err(&data->client->dev,
+				"Only master programs the firmware.");
+			return -EINVAL;
+		}
+
+		program_func = &adm1266_program_firmware;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (offset < cell_start || offset + bytes >= cell_end)
+		return -EINVAL;
+
+	if (offset == mem_cell->offset)
+		memset(data->dev_mem + mem_cell->offset, 0, mem_cell->bytes);
+
+	memcpy(data->dev_mem + offset, val, bytes);
+
+	fw_writen = adm1266_check_ending(data, mem_cell->offset,
+					 mem_cell->bytes);
+
+	if (fw_writen)
+		return program_func(data);
+
+	return 0;
+}
+
+static int adm1266_nvmem_write(void *priv, unsigned int offset, void *val,
+			       size_t bytes)
+{
+	const struct nvmem_cell_info *mem_cell;
+	struct adm1266_data *data = priv;
+	int ret;
+	int i;
+
+	for (i = 0; i < data->nvmem_config.ncells; i++) {
+		mem_cell = &adm1266_nvmem_cells[i];
+
+		if (!adm1266_cell_is_accessed(mem_cell, offset, bytes))
+			continue;
+
+		ret = adm1266_write_mem_cell(data, mem_cell, offset,
+					     val, bytes);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int adm1266_register_slave(struct adm1266_data *slave,
+				  struct adm1266_data *master)
+{
+	struct adm1266_data_ref *slave_ref;
+
+	slave_ref = devm_kzalloc(&slave->client->dev,
+				 sizeof(*slave_ref), GFP_KERNEL);
+	if (!slave_ref)
+		return -ENOMEM;
+
+	slave_ref->data = slave;
+	INIT_LIST_HEAD(&slave_ref->list);
+
+	mutex_lock(&master->cascaded_devices_mutex);
+	list_add_tail(&slave_ref->list, &master->cascaded_devices_list);
+	mutex_unlock(&master->cascaded_devices_mutex);
+
+	return 0;
+}
+
+static int adm1266_register(struct adm1266_data *data)
+{
+	struct fwnode_reference_args master_fwnode_ref;
+	const struct fwnode_handle *fw;
+	const struct fwnode_handle *master_fw;
+	struct adm1266_data_ref *master_ref;
+	int ret;
+
+	fw = dev_fwnode(&data->client->dev);
+	INIT_LIST_HEAD(&data->cascaded_devices_list);
+
+	/* master devices do not have this property */
+	if (!fwnode_property_present(fw, "adi,master-adm1266")) {
+		data->master_dev = true;
+
+		master_ref = devm_kzalloc(&data->client->dev,
+					  sizeof(*master_ref), GFP_KERNEL);
+		if (!master_ref)
+			return -ENOMEM;
+
+		master_ref->data = data;
+		INIT_LIST_HEAD(&master_ref->list);
+
+		mutex_lock(&registered_masters_lock);
+		list_add(&master_ref->list, &registered_masters);
+		mutex_unlock(&registered_masters_lock);
+	}
+
+	if (data->master_dev)
+		return 0;
+
+	ret = fwnode_property_get_reference_args(fw, "adi,master-adm1266",
+						 NULL, 0, 0,
+						 &master_fwnode_ref);
+	if (ret < 0) {
+		dev_err(&data->client->dev,
+			"Could not read adi,master-adm1266 property");
+		return ret;
+	}
+
+	mutex_lock(&registered_masters_lock);
+
+	/* search for the corresponding master of this slave */
+	list_for_each_entry(master_ref, &registered_masters, list) {
+		master_fw = dev_fwnode(&master_ref->data->client->dev);
+
+		if (master_fw == master_fwnode_ref.fwnode) {
+			mutex_unlock(&registered_masters_lock);
+			return adm1266_register_slave(data, master_ref->data);
+		}
+	}
+
+	mutex_unlock(&registered_masters_lock);
+
+	return -EPROBE_DEFER;
+}
+
 static int adm1266_config_nvmem(struct adm1266_data *data)
 {
 	data->nvmem_config.name = dev_name(&data->client->dev);
 	data->nvmem_config.dev = &data->client->dev;
 	data->nvmem_config.root_only = true;
-	data->nvmem_config.read_only = true;
 	data->nvmem_config.owner = THIS_MODULE;
 	data->nvmem_config.reg_read = adm1266_nvmem_read;
+	data->nvmem_config.reg_write = adm1266_nvmem_write;
 	data->nvmem_config.cells = adm1266_nvmem_cells;
 	data->nvmem_config.ncells = ARRAY_SIZE(adm1266_nvmem_cells);
 	data->nvmem_config.priv = data;
@@ -527,6 +996,21 @@ static int adm1266_set_rtc(struct adm1266_data *data)
 					  write_buf);
 }
 
+static int adm1266_firmware_present(struct i2c_client *client)
+{
+	u8 read_buf[I2C_SMBUS_BLOCK_MAX];
+	int ret;
+
+	ret = i2c_smbus_read_i2c_block_data(client, ADM1266_IC_DEVICE_REV,
+					    8, read_buf);
+	if (ret < 0) {
+		dev_err(&client->dev, "Could not read firmware revision.");
+		return ret;
+	}
+
+	return !!(read_buf[0] | read_buf[1] | read_buf[2]);
+}
+
 static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
 	struct adm1266_data *data;
@@ -545,6 +1029,21 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
 
 	crc8_populate_msb(pmbus_crc_table, 0x7);
 	mutex_init(&data->buf_mutex);
+	mutex_init(&data->cascaded_devices_mutex);
+
+	ret = adm1266_register(data);
+	if (ret < 0)
+		return ret;
+
+	ret = adm1266_firmware_present(client);
+	if (ret < 0)
+		return ret;
+
+	if (!ret) {
+		dev_notice(&client->dev, "Chip firmware not written.");
+		return adm1266_config_nvmem(data);
+	}
+
 
 	ret = adm1266_config_gpio(data);
 	if (ret < 0)
-- 
2.20.1

[PATCH v7 8/9] hwmon: pmbus: adm1266: program configuration

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Writing the configuration Intel hex file to the nvmem,
of an adm1266, with offset 0x30000, will now
trigger the configuration programming.

During this process the adm1266 sequencer will be
stopped and at the end will be issued a seq reset
(see AN-1453 Programming the configuration).

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 drivers/hwmon/pmbus/adm1266.c | 179 +++++++++++++++++++++++++++++++++-
 1 file changed, 178 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index f851c6617870..50386c98d714 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -40,7 +40,10 @@
 #define ADM1266_BLACKBOX_INFO	0xE6
 #define ADM1266_PDIO_STATUS	0xE9
 #define ADM1266_GPIO_STATUS	0xEA
+#define ADM1266_STATUS_MFR_2	0xED
+#define ADM1266_REFRESH_FLASH	0xF5
 #define ADM1266_MEMORY_CONFIG	0xF8
+#define ADM1266_MEMORY_CRC	0xF9
 #define ADM1266_SWITCH_MEMORY	0xFA
 #define ADM1266_UPDATE_FW	0xFC
 #define ADM1266_FW_PASSWORD	0xFD
@@ -66,6 +69,11 @@
 
 /* ADM1266 STATUS_MFR defines */
 #define ADM1266_STATUS_PART_LOCKED(x)	FIELD_GET(BIT(2), x)
+#define ADM1266_RUNNING_REFRESH(x)	FIELD_GET(BIT(3), x)
+#define ADM1266_ALL_CRC_FAULT(x)	FIELD_GET(BIT(5), x)
+
+/* ADM1266 STATUS_MFR_2 defines */
+#define ADM1266_MAIN_CONFIG_FAULT(x)	FIELD_GET(GENMASK(9, 8), x)
 
 /* ADM1266 GO_COMMAND defines */
 #define ADM1266_GO_COMMAND_STOP		BIT(0)
@@ -74,6 +82,8 @@
 
 #define ADM1266_FIRMWARE_OFFSET		0x00000
 #define ADM1266_FIRMWARE_SIZE		131072
+#define ADM1266_CONFIG_OFFSET		0x30000
+#define ADM1266_CONFIG_SIZE		131072
 #define ADM1266_BLACKBOX_OFFSET		0x7F700
 #define ADM1266_BLACKBOX_SIZE		64
 
@@ -117,6 +127,11 @@ static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
 		.offset         = ADM1266_FIRMWARE_OFFSET,
 		.bytes          = ADM1266_FIRMWARE_SIZE,
 	},
+	{
+		.name           = "configuration",
+		.offset         = ADM1266_CONFIG_OFFSET,
+		.bytes          = ADM1266_CONFIG_SIZE,
+	},
 };
 
 DECLARE_CRC8_TABLE(pmbus_crc_table);
@@ -520,6 +535,9 @@ static int adm1266_read_mem_cell(struct adm1266_data *data, const struct nvmem_c
 	case ADM1266_FIRMWARE_OFFSET:
 		/* firmware is write-only */
 		return 0;
+	case ADM1266_CONFIG_OFFSET:
+		/* configuration is write-only */
+		return 0;
 	default:
 		return -EINVAL;
 	}
@@ -676,6 +694,7 @@ static int adm1266_write_hex(struct adm1266_data *data,
 	u8 first_writes[7];
 	u8 byte_count;
 	u8 reg_address;
+	bool to_slaves = false;
 	int ret;
 	int i;
 
@@ -706,7 +725,10 @@ static int adm1266_write_hex(struct adm1266_data *data,
 		if (ret < 0)
 			return ret;
 
-		ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, true);
+		if (offset == ADM1266_FIRMWARE_OFFSET)
+			to_slaves = true;
+
+		ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, to_slaves);
 		if (ret < 0) {
 			dev_err(&data->client->dev, "Firmware write error: %d.", ret);
 			return ret;
@@ -731,6 +753,87 @@ static int adm1266_write_hex(struct adm1266_data *data,
 	return 0;
 }
 
+static int adm1266_verify_memory(struct adm1266_data *data)
+{
+	char cmd[2];
+	int ret;
+	int reg;
+
+	cmd[0] = 0x1;
+	cmd[1] = 0x0;
+	ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
+				sizeof(cmd), true);
+	if (ret < 0)
+		return ret;
+
+	/* after issuing a memory recalculate crc command, wait 1000 ms */
+	msleep(1000);
+
+	reg = pmbus_read_word_data(data->client, 0, 0xFF, ADM1266_STATUS_MFR_2);
+	if (reg < 0)
+		return reg;
+
+	if (ADM1266_MAIN_CONFIG_FAULT(reg)) {
+		dev_err(&data->client->dev, "Main memory corrupted.");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static int adm1266_refresh_memory(struct adm1266_data *data)
+{
+	unsigned int timeout = 9000;
+	int ret;
+	u8 cmd[2];
+
+	cmd[0] = 0x2;
+	ret = adm1266_group_cmd(data, ADM1266_REFRESH_FLASH, cmd, 1, true);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not refresh flash.");
+		return ret;
+	}
+
+	/* after issuing a refresh flash command, wait 9000 ms */
+	msleep(9000);
+
+	do {
+		msleep(1000);
+		timeout -= 1000;
+
+		ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
+		if (ret < 0) {
+			dev_err(&data->client->dev, "Could not read status.");
+			return ret;
+		}
+
+	} while (ADM1266_RUNNING_REFRESH(ret) && timeout > 0);
+
+	if (timeout == 0)
+		return -ETIMEDOUT;
+
+	cmd[0] = 0x1;
+	cmd[1] = 0x0;
+	ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
+				sizeof(cmd), true);
+	if (ret < 0)
+		return ret;
+
+	/* after issuing a memory recalculate crc command, wait 1000 ms */
+	msleep(1000);
+
+	ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
+	if (ret < 0)
+		return ret;
+
+	if (ADM1266_ALL_CRC_FAULT(ret)) {
+		dev_err(&data->client->dev, "CRC checks failed.");
+		return ret;
+	}
+
+	return 0;
+}
+
 static int adm1266_program_firmware(struct adm1266_data *data)
 {
 	u8 write_data[3];
@@ -783,6 +886,77 @@ static int adm1266_program_firmware(struct adm1266_data *data)
 	return ret;
 }
 
+static int adm1266_program_config(struct adm1266_data *data)
+{
+	u8 cmd[2];
+	u8 value;
+	int ret;
+
+	value = ADM1266_GO_COMMAND_STOP | ADM1266_GO_COMMAND_SEQ_RES;
+	ret = pmbus_write_word_data(data->client, 0, ADM1266_GO_COMMAND, value);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not stop sequence.");
+		return ret;
+	}
+
+	/* after issuing a stop command, wait 100 ms */
+	msleep(100);
+
+	ret = adm1266_unlock_all_dev(data);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not unlock dev.");
+		goto lock_all_devices;
+	}
+
+	value = 0;
+	ret = i2c_smbus_write_block_data(data->client, ADM1266_SWITCH_MEMORY, 1, &value);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not switch to main mem.");
+		goto lock_all_devices;
+	}
+
+	/* after issuing a SWITCH_MEMORY command, wait 1000 ms */
+	msleep(1000);
+
+	ret = adm1266_write_hex(data, ADM1266_CONFIG_OFFSET, ADM1266_CONFIG_SIZE);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not write configuration.");
+		goto lock_all_devices;
+	}
+
+	ret = pmbus_write_byte(data->client, 0, ADM1266_STORE_USER_ALL);
+	if (ret < 0)
+		return ret;
+
+	/* after issuing a STORE_USER_ALL command, wait 300 ms */
+	msleep(300);
+
+	if (!data->master_dev)
+		goto lock_all_devices;
+
+	ret = adm1266_verify_memory(data);
+	if (ret < 0)
+		goto lock_all_devices;
+
+	cmd[0] = 0;
+	cmd[1] = 0;
+	ret = adm1266_group_cmd(data, ADM1266_GO_COMMAND, cmd, sizeof(cmd), true);
+	if (ret < 0) {
+		dev_err(&data->client->dev, "Could not restart sequence.");
+		goto lock_all_devices;
+	}
+
+	/* after issuing a restart sequence command, wait 350 ms */
+	msleep(350);
+
+	ret = adm1266_refresh_memory(data);
+
+lock_all_devices:
+	adm1266_lock_all_dev(data);
+
+	return ret;
+}
+
 /* check if firmware/config write has ended */
 static bool adm1266_check_ending(struct adm1266_data *data, unsigned int offset,
 				 unsigned int size)
@@ -824,6 +998,9 @@ static int adm1266_write_mem_cell(struct adm1266_data *data,
 
 		program_func = &adm1266_program_firmware;
 		break;
+	case ADM1266_CONFIG_OFFSET:
+		program_func = &adm1266_program_config;
+		break;
 	default:
 		return -EINVAL;
 	}
-- 
2.20.1

[PATCH v7 9/9] dt-bindings: hwmon: Add bindings for ADM1266

[alexandru.tachici]

From: Alexandru Tachici <alexandru.tachici@analog.com>

Add bindings for the Analog Devices ADM1266 sequencer.

Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
 .../bindings/hwmon/adi,adm1266.yaml           | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml

diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml
new file mode 100644
index 000000000000..ad92686e2ee6
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/adi,adm1266.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices ADM1266 Cascadable Super Sequencer with Margin
+  Control and Fault Recording
+
+maintainers:
+  - Alexandru Tachici <alexandru.tachici@analog.com>
+
+description: |
+  Analog Devices ADM1266 Cascadable Super Sequencer with Margin
+  Control and Fault Recording.
+  https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1266.pdf
+
+properties:
+  compatible:
+    enum:
+      - adi,adm1266
+
+  reg:
+    description: |
+      I2C address of slave device.
+    items:
+      minimum: 0x40
+      maximum: 0x4F
+
+  avcc-supply:
+    description: |
+      Phandle to the Avcc power supply.
+
+  adi,master-adm1266:
+    description: |
+      Represents phandle of a master ADM1266 device cascaded through the IDB.
+    $ref: "/schemas/types.yaml#/definitions/phandle"
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    i2c0 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adm1266@40 {
+                compatible = "adi,adm1266";
+                reg = <0x40>;
+        };
+    };
+...
-- 
2.20.1

Wrong list

[alexandru.tachici]

Please disregard this patch.
I used the wrong git send-email cmd.

Re: [PATCH v7 9/9] dt-bindings: hwmon: Add bindings for ADM1266

[Rob Herring]

On Mon, 27 Jul 2020 19:18:14 +0300, alexandru.tachici@analog.com wrote:
> From: Alexandru Tachici <alexandru.tachici@analog.com>
> 
> Add bindings for the Analog Devices ADM1266 sequencer.
> 
> Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
> ---
>  .../bindings/hwmon/adi,adm1266.yaml           | 56 +++++++++++++++++++
>  1 file changed, 56 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>