* [PATCH 0/2] iio: imu: add support for FXOS8700
@ 2019-09-18 1:28 Robert Jones
2019-09-18 1:28 ` [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
` (2 more replies)
0 siblings, 3 replies; 24+ messages in thread
From: Robert Jones @ 2019-09-18 1:28 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
- Document the FXOS8700 device tree binding.
- Implement basic iio driver support for FXOS8700
Robert Jones (2):
dt-bindings: iio: imu: add fxos8700 imu binding
io: imu: Add support for the FXOS8700 IMU
.../devicetree/bindings/iio/imu/fxos8700.txt | 15 +
drivers/iio/imu/Kconfig | 1 +
drivers/iio/imu/Makefile | 1 +
drivers/iio/imu/fxos8700/Kconfig | 32 ++
drivers/iio/imu/fxos8700/Makefile | 6 +
drivers/iio/imu/fxos8700/fxos8700.h | 183 ++++++++
drivers/iio/imu/fxos8700/fxos8700_core.c | 517 +++++++++++++++++++++
drivers/iio/imu/fxos8700/fxos8700_i2c.c | 75 +++
drivers/iio/imu/fxos8700/fxos8700_spi.c | 63 +++
9 files changed, 893 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.txt
create mode 100644 drivers/iio/imu/fxos8700/Kconfig
create mode 100644 drivers/iio/imu/fxos8700/Makefile
create mode 100644 drivers/iio/imu/fxos8700/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_spi.c
--
2.9.2
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-09-18 1:28 [PATCH 0/2] iio: imu: add support for FXOS8700 Robert Jones
@ 2019-09-18 1:28 ` Robert Jones
2019-10-01 11:39 ` Rob Herring
2019-09-18 1:28 ` [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-09-18 1:28 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
device-tree bindings.
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
Documentation/devicetree/bindings/iio/imu/fxos8700.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.txt
diff --git a/Documentation/devicetree/bindings/iio/imu/fxos8700.txt b/Documentation/devicetree/bindings/iio/imu/fxos8700.txt
new file mode 100644
index 0000000..770605d
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/imu/fxos8700.txt
@@ -0,0 +1,15 @@
+Freescale FXOS8700 - Inertial Measurement Unit with Accelerometer and Magnetometer
+
+https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
+
+Required properties:
+ - compatible : must be "fsl,fxos8700"
+ - reg : the I2C address or SPI chip select number of the device
+ - spi-max-frequency : set maximum clock frequency (only for SPI)
+
+Example:
+
+bmi160@1e {
+ compatible = "fsl,fxos8700";
+ reg = <0x1e>;
+};
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU
2019-09-18 1:28 [PATCH 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-09-18 1:28 ` [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-09-18 1:28 ` Robert Jones
2019-10-05 13:10 ` Jonathan Cameron
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-09-18 1:28 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
magnetometer combined into a single package. The device features a
selectable I2C or point-to-point SPI serial interface with 14-bit
accelerometer and 16-bit magnetometer ADC resolution along with
smart-embedded functions.
FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
for each sensor. Interleaved magnetic and acceleration data is available
at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
package and it is guaranteed to operate over the extended temperature
range of –40 °C to +85 °C.
TODO: Trigger and IRQ configuration support
Datasheet:
http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
drivers/iio/imu/Kconfig | 1 +
drivers/iio/imu/Makefile | 1 +
drivers/iio/imu/fxos8700/Kconfig | 32 ++
drivers/iio/imu/fxos8700/Makefile | 6 +
drivers/iio/imu/fxos8700/fxos8700.h | 183 +++++++++++
drivers/iio/imu/fxos8700/fxos8700_core.c | 517 +++++++++++++++++++++++++++++++
drivers/iio/imu/fxos8700/fxos8700_i2c.c | 75 +++++
drivers/iio/imu/fxos8700/fxos8700_spi.c | 63 ++++
8 files changed, 878 insertions(+)
create mode 100644 drivers/iio/imu/fxos8700/Kconfig
create mode 100644 drivers/iio/imu/fxos8700/Makefile
create mode 100644 drivers/iio/imu/fxos8700/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700/fxos8700_spi.c
diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
index f3c7282..acfc383 100644
--- a/drivers/iio/imu/Kconfig
+++ b/drivers/iio/imu/Kconfig
@@ -53,6 +53,7 @@ config KMX61
source "drivers/iio/imu/inv_mpu6050/Kconfig"
source "drivers/iio/imu/st_lsm6dsx/Kconfig"
+source "drivers/iio/imu/fxos8700/Kconfig"
endmenu
diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
index 4a69588..edf841a 100644
--- a/drivers/iio/imu/Makefile
+++ b/drivers/iio/imu/Makefile
@@ -19,3 +19,4 @@ obj-y += inv_mpu6050/
obj-$(CONFIG_KMX61) += kmx61.o
obj-y += st_lsm6dsx/
+obj-y += fxos8700/
diff --git a/drivers/iio/imu/fxos8700/Kconfig b/drivers/iio/imu/fxos8700/Kconfig
new file mode 100644
index 0000000..4b98c2b
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/Kconfig
@@ -0,0 +1,32 @@
+#
+# FXOS8700 IMU driver
+#
+
+config FXOS8700
+ tristate
+ select IIO_BUFFER
+ select IIO_TRIGGERED_BUFFER
+
+config FXOS8700_I2C
+ tristate "Freescale FXOS8700 I2C driver"
+ depends on I2C
+ select FXOS8700
+ select REGMAP_I2C
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on I2C.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_i2c.
+
+config FXOS8700_SPI
+ tristate "Freescale FXOS8700 SPI driver"
+ depends on SPI
+ select FXOS8700
+ select REGMAP_SPI
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on SPI.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_spi.
\ No newline at end of file
diff --git a/drivers/iio/imu/fxos8700/Makefile b/drivers/iio/imu/fxos8700/Makefile
new file mode 100644
index 0000000..43ae69e
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for Freescale FXOS8700 IMU
+#
+obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
\ No newline at end of file
diff --git a/drivers/iio/imu/fxos8700/fxos8700.h b/drivers/iio/imu/fxos8700/fxos8700.h
new file mode 100644
index 0000000..c3720e3
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/fxos8700.h
@@ -0,0 +1,183 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef FXOS8700_H_
+#define FXOS8700_H_
+
+extern const struct regmap_config fxos8700_regmap_config;
+
+struct fxos8700_data {
+ struct regmap *regmap;
+ struct iio_trigger *trig;
+};
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi);
+
+void fxos8700_core_remove(struct device *dev);
+
+/* Register Definitions */
+#define FXOS8700_STATUS 0x00
+#define FXOS8700_OUT_X_MSB 0x01
+#define FXOS8700_OUT_X_LSB 0x02
+#define FXOS8700_OUT_Y_MSB 0x03
+#define FXOS8700_OUT_Y_LSB 0x04
+#define FXOS8700_OUT_Z_MSB 0x05
+#define FXOS8700_OUT_Z_LSB 0x06
+#define FXOS8700_F_SETUP 0x09
+#define FXOS8700_TRIG_CFG 0x0a
+#define FXOS8700_SYSMOD 0x0b
+#define FXOS8700_INT_SOURCE 0x0c
+#define FXOS8700_WHO_AM_I 0x0d
+#define FXOS8700_XYZ_DATA_CFG 0x0e
+#define FXOS8700_HP_FILTER_CUTOFF 0x0f
+#define FXOS8700_PL_STATUS 0x10
+#define FXOS8700_PL_CFG 0x11
+#define FXOS8700_PL_COUNT 0x12
+#define FXOS8700_PL_BF_ZCOMP 0x13
+#define FXOS8700_PL_THS_REG 0x14
+#define FXOS8700_A_FFMT_CFG 0x15
+#define FXOS8700_A_FFMT_SRC 0x16
+#define FXOS8700_A_FFMT_THS 0x17
+#define FXOS8700_A_FFMT_COUNT 0x18
+#define FXOS8700_TRANSIENT_CFG 0x1d
+#define FXOS8700_TRANSIENT_SRC 0x1e
+#define FXOS8700_TRANSIENT_THS 0x1f
+#define FXOS8700_TRANSIENT_COUNT 0x20
+#define FXOS8700_PULSE_CFG 0x21
+#define FXOS8700_PULSE_SRC 0x22
+#define FXOS8700_PULSE_THSX 0x23
+#define FXOS8700_PULSE_THSY 0x24
+#define FXOS8700_PULSE_THSZ 0x25
+#define FXOS8700_PULSE_TMLT 0x26
+#define FXOS8700_PULSE_LTCY 0x27
+#define FXOS8700_PULSE_WIND 0x28
+#define FXOS8700_ASLP_COUNT 0x29
+#define FXOS8700_CTRL_REG1 0x2a
+#define FXOS8700_CTRL_REG2 0x2b
+#define FXOS8700_CTRL_REG3 0x2c
+#define FXOS8700_CTRL_REG4 0x2d
+#define FXOS8700_CTRL_REG5 0x2e
+#define FXOS8700_OFF_X 0x2f
+#define FXOS8700_OFF_Y 0x30
+#define FXOS8700_OFF_Z 0x31
+#define FXOS8700_M_DR_STATUS 0x32
+#define FXOS8700_M_OUT_X_MSB 0x33
+#define FXOS8700_M_OUT_X_LSB 0x34
+#define FXOS8700_M_OUT_Y_MSB 0x35
+#define FXOS8700_M_OUT_Y_LSB 0x36
+#define FXOS8700_M_OUT_Z_MSB 0x37
+#define FXOS8700_M_OUT_Z_LSB 0x38
+#define FXOS8700_CMP_X_MSB 0x39
+#define FXOS8700_CMP_X_LSB 0x3a
+#define FXOS8700_CMP_Y_MSB 0x3b
+#define FXOS8700_CMP_Y_LSB 0x3c
+#define FXOS8700_CMP_Z_MSB 0x3d
+#define FXOS8700_CMP_Z_LSB 0x3e
+#define FXOS8700_M_OFF_X_MSB 0x3f
+#define FXOS8700_M_OFF_X_LSB 0x40
+#define FXOS8700_M_OFF_Y_MSB 0x41
+#define FXOS8700_M_OFF_Y_LSB 0x42
+#define FXOS8700_M_OFF_Z_MSB 0x43
+#define FXOS8700_M_OFF_Z_LSB 0x44
+#define FXOS8700_MAX_X_MSB 0x45
+#define FXOS8700_MAX_X_LSB 0x46
+#define FXOS8700_MAX_Y_MSB 0x47
+#define FXOS8700_MAX_Y_LSB 0x48
+#define FXOS8700_MAX_Z_MSB 0x49
+#define FXOS8700_MAX_Z_LSB 0x4a
+#define FXOS8700_MIN_X_MSB 0x4b
+#define FXOS8700_MIN_X_LSB 0x4c
+#define FXOS8700_MIN_Y_MSB 0x4d
+#define FXOS8700_MIN_Y_LSB 0x4e
+#define FXOS8700_MIN_Z_MSB 0x4f
+#define FXOS8700_MIN_Z_LSB 0x50
+#define FXOS8700_TEMP 0x51
+#define FXOS8700_M_THS_CFG 0x52
+#define FXOS8700_M_THS_SRC 0x53
+#define FXOS8700_M_THS_X_MSB 0x54
+#define FXOS8700_M_THS_X_LSB 0x55
+#define FXOS8700_M_THS_Y_MSB 0x56
+#define FXOS8700_M_THS_Y_LSB 0x57
+#define FXOS8700_M_THS_Z_MSB 0x58
+#define FXOS8700_M_THS_Z_LSB 0x59
+#define FXOS8700_M_THS_COUNT 0x5a
+#define FXOS8700_M_CTRL_REG1 0x5b
+#define FXOS8700_M_CTRL_REG2 0x5c
+#define FXOS8700_M_CTRL_REG3 0x5d
+#define FXOS8700_M_INT_SRC 0x5e
+#define FXOS8700_A_VECM_CFG 0x5f
+#define FXOS8700_A_VECM_THS_MSB 0x60
+#define FXOS8700_A_VECM_THS_LSB 0x61
+#define FXOS8700_A_VECM_CNT 0x62
+#define FXOS8700_A_VECM_INITX_MSB 0x63
+#define FXOS8700_A_VECM_INITX_LSB 0x64
+#define FXOS8700_A_VECM_INITY_MSB 0x65
+#define FXOS8700_A_VECM_INITY_LSB 0x66
+#define FXOS8700_A_VECM_INITZ_MSB 0x67
+#define FXOS8700_A_VECM_INITZ_LSB 0x68
+#define FXOS8700_M_VECM_CFG 0x69
+#define FXOS8700_M_VECM_THS_MSB 0x6a
+#define FXOS8700_M_VECM_THS_LSB 0x6b
+#define FXOS8700_M_VECM_CNT 0x6c
+#define FXOS8700_M_VECM_INITX_MSB 0x6d
+#define FXOS8700_M_VECM_INITX_LSB 0x6e
+#define FXOS8700_M_VECM_INITY_MSB 0x6f
+#define FXOS8700_M_VECM_INITY_LSB 0x70
+#define FXOS8700_M_VECM_INITZ_MSB 0x71
+#define FXOS8700_M_VECM_INITZ_LSB 0x72
+#define FXOS8700_A_FFMT_THS_X_MSB 0x73
+#define FXOS8700_A_FFMT_THS_X_LSB 0x74
+#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
+#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
+#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
+#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
+#define FXOS8700_A_TRAN_INIT_MSB 0x79
+#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
+#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
+#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
+#define FXOS8700_TM_NVM_LOCK 0x7e
+#define FXOS8700_NVM_DATA0_35 0x80
+#define FXOS8700_NVM_DATA_BNK3 0xa4
+#define FXOS8700_NVM_DATA_BNK2 0xa5
+#define FXOS8700_NVM_DATA_BNK1 0xa6
+#define FXOS8700_NVM_DATA_BNK0 0xa7
+
+#define SENSOR_IOCTL_BASE 'S'
+#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
+#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
+#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
+#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
+#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
+#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
+
+#define FXOS8700_I2C_ADDR 0x1E
+#define FXOS8700_DEVICE_ID 0xC7
+#define FXOS8700_PRE_DEVICE_ID 0xC4
+#define FXOS8700_DATA_BUF_SIZE 6
+#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
+#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
+
+#define FXOS8700_TYPE_ACC 0x00
+#define FXOS8700_TYPE_MAG 0x01
+#define FXOS8700_STANDBY 0x00
+#define FXOS8700_ACTIVE 0x01
+#define FXOS8700_ACTIVE_MIN_USLEEP 4000 //from table 6 in datasheet
+
+#define ABS_STATUS ABS_WHEEL
+#define FXOS8700_DRIVER "fxos8700"
+
+#define ABSMAX_ACC_VAL 0x01FF
+#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
+#define FXOS8700_POLL_INTERVAL 400
+#define FXOS8700_POLL_MAX 800
+#define FXOS8700_POLL_MIN 100
+#define FXOS8700_CTRL_ODR_MSK 0x38
+#define FXOS8700_CTRL_ODR_MAX 0x00
+#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
+
+enum {
+ MODE_2G = 0,
+ MODE_4G,
+ MODE_8G,
+};
+
+#endif /* FXOS8700_H_ */
diff --git a/drivers/iio/imu/fxos8700/fxos8700_core.c b/drivers/iio/imu/fxos8700/fxos8700_core.c
new file mode 100644
index 0000000..9098980
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/fxos8700_core.c
@@ -0,0 +1,517 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU (accelerometer plus magnetometer)
+ *
+ * Copyright (c) 2019, Freescale Corporation.
+ *
+ * IIO core driver for FXOS8700, with support for I2C/SPI busses
+ *
+ * TODO: Trigger and IRQ support
+ */
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/acpi.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/of_irq.h>
+#include <linux/mutex.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/triggered_buffer.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/trigger.h>
+
+#include "fxos8700.h"
+
+/* Regmap info */
+static const struct regmap_range read_range[] = {
+ {
+ .range_min = 0x00,
+ .range_max = 0x18,
+ }, {
+ .range_min = 0x1d,
+ .range_max = 0x78,
+ },
+};
+
+static const struct regmap_range write_range[] = {
+ {
+ .range_min = 0x09,
+ .range_max = 0x0a,
+ }, {
+ .range_min = 0x0e,
+ .range_max = 0x0f,
+ }, {
+ .range_min = 0x11,
+ .range_max = 0x15,
+ }, {
+ .range_min = 0x17,
+ .range_max = 0x1d,
+ }, {
+ .range_min = 0x1f,
+ .range_max = 0x21,
+ }, {
+ .range_min = 0x23,
+ .range_max = 0x31,
+ }, {
+ .range_min = 0x3f,
+ .range_max = 0x44,
+ }, {
+ .range_min = 0x52,
+ .range_max = 0x52,
+ }, {
+ .range_min = 0x54,
+ .range_max = 0x5d,
+ }, {
+ .range_min = 0x5f,
+ .range_max = 0x78,
+ },
+};
+
+static const struct regmap_access_table driver_read_table = {
+ .yes_ranges = read_range,
+ .n_yes_ranges = ARRAY_SIZE(read_range),
+};
+
+static const struct regmap_access_table driver_write_table = {
+ .yes_ranges = write_range,
+ .n_yes_ranges = ARRAY_SIZE(write_range),
+};
+
+const struct regmap_config fxos8700_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = FXOS8700_NVM_DATA_BNK0,
+ .rd_table = &driver_read_table,
+ .wr_table = &driver_write_table,
+};
+EXPORT_SYMBOL(fxos8700_regmap_config);
+
+#define FXOS8700_CHANNEL(_type, _axis, _index) { \
+ .type = _type, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##_axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ), \
+ .scan_index = _index, \
+ .scan_type = { \
+ .sign = 's', \
+ .realbits = 16, \
+ .storagebits = 16, \
+ .endianness = IIO_LE, \
+ }, \
+}
+
+/* scan indexes follow DATA register order */
+enum fxos8700_scan_axis {
+ FXOS8700_SCAN_ACCEL_X = 0,
+ FXOS8700_SCAN_ACCEL_Y,
+ FXOS8700_SCAN_ACCEL_Z,
+ FXOS8700_SCAN_MAGN_X,
+ FXOS8700_SCAN_MAGN_Y,
+ FXOS8700_SCAN_MAGN_Z,
+ FXOS8700_SCAN_RHALL,
+ FXOS8700_SCAN_TIMESTAMP,
+};
+
+enum fxos8700_sensor {
+ FXOS8700_ACCEL = 0,
+ FXOS8700_MAGN,
+ FXOS8700_NUM_SENSORS /* must be last */
+};
+
+enum fxos8700_int_pin {
+ FXOS8700_PIN_INT1,
+ FXOS8700_PIN_INT2
+};
+
+struct fxos8700_scale {
+ u8 bits;
+ int uscale;
+};
+
+struct fxos8700_odr {
+ u8 bits;
+ int odr;
+ int uodr;
+};
+
+static const struct fxos8700_scale fxos8700_accel_scale[] = {
+ { MODE_2G, 244},
+ { MODE_4G, 488},
+ { MODE_8G, 976},
+};
+
+/* Accellerometer and magnetometer have the same ODR options, set in the
+ * CTRL_REG1 register. ODR is halved when using both sensors at once in
+ * hybrid mode.
+ */
+static const struct fxos8700_odr fxos8700_odr[] = {
+ {0x00, 800, 0},
+ {0x01, 400, 0},
+ {0x02, 200, 0},
+ {0x03, 100, 0},
+ {0x04, 50, 0},
+ {0x05, 12, 500000},
+ {0x06, 6, 250000},
+ {0x07, 1, 562500},
+};
+
+static const struct iio_chan_spec fxos8700_channels[] = {
+ FXOS8700_CHANNEL(IIO_ACCEL, X, FXOS8700_SCAN_ACCEL_X),
+ FXOS8700_CHANNEL(IIO_ACCEL, Y, FXOS8700_SCAN_ACCEL_Y),
+ FXOS8700_CHANNEL(IIO_ACCEL, Z, FXOS8700_SCAN_ACCEL_Z),
+ FXOS8700_CHANNEL(IIO_MAGN, X, FXOS8700_SCAN_MAGN_X),
+ FXOS8700_CHANNEL(IIO_MAGN, Y, FXOS8700_SCAN_MAGN_Y),
+ FXOS8700_CHANNEL(IIO_MAGN, Z, FXOS8700_SCAN_MAGN_Z),
+ IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
+};
+
+static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
+{
+ switch (iio_type) {
+ case IIO_ACCEL:
+ return FXOS8700_ACCEL;
+ case IIO_ANGL_VEL:
+ return FXOS8700_MAGN;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_set_active_mode(struct fxos8700_data *data,
+ enum fxos8700_sensor t, bool mode)
+{
+ int ret;
+
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
+ if (ret)
+ return ret;
+
+ usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
+ FXOS8700_ACTIVE_MIN_USLEEP + 1000);
+
+ return 0;
+}
+
+static int fxos8700_set_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int uscale)
+{
+ int i;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+ struct device *dev = regmap_get_device(data->regmap);
+
+ if (t == FXOS8700_MAGN) {
+ dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].uscale == uscale)
+ break;
+
+ if (i == scale_num)
+ return -EINVAL;
+
+ return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
+ fxos8700_accel_scale[i].bits);
+}
+
+static int fxos8700_get_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int *uscale)
+{
+ int i, ret, val;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+
+ if (t == FXOS8700_MAGN) {
+ *uscale = 1200; // Magnetometer is locked at 1200uT
+ return 0;
+ }
+
+ ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
+ *uscale = fxos8700_accel_scale[i].uscale;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
+ int axis, int *val)
+{
+ u8 base, reg;
+ int ret;
+ __le16 sample = 0;
+ enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
+ u8 tmp_data[FXOS8700_DATA_BUF_SIZE];
+
+ base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
+
+ ret = regmap_bulk_read(data->regmap, base, tmp_data,
+ FXOS8700_DATA_BUF_SIZE);
+ if (ret)
+ return ret;
+
+ reg = (axis - IIO_MOD_X) * sizeof(sample);
+ sample = ((tmp_data[reg] << 8) & 0xff00) | tmp_data[reg + 1];
+ *val = sign_extend32(le16_to_cpu(sample), 15);
+
+ return 0;
+}
+
+static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int odr, int uodr)
+{
+ int i, ret, val;
+ bool active_mode;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ active_mode = val & FXOS8700_ACTIVE;
+
+ if (active_mode) {
+ /* The device must be in standby mode to change any of the
+ * other fields within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ val & ~FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < odr_num; i++)
+ if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ return regmap_update_bits(data->regmap,
+ FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
+ fxos8700_odr[i].bits << 3 | active_mode);
+}
+
+static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int *odr, int *uodr)
+{
+ int i, val, ret;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ val &= FXOS8700_CTRL_ODR_MSK;
+
+ for (i = 0; i < odr_num; i++)
+ if (val == fxos8700_odr[i].bits)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ *odr = fxos8700_odr[i].odr;
+ *uodr = fxos8700_odr[i].uodr;
+
+ return 0;
+}
+
+static int fxos8700_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ int ret;
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fxos8700_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SCALE:
+ return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ break;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
+static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
+
+static struct attribute *fxos8700_attrs[] = {
+ &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_accel_scale_available.dev_attr.attr,
+ &iio_const_attr_in_magn_scale_available.dev_attr.attr,
+ NULL,
+};
+
+static const struct attribute_group fxos8700_attrs_group = {
+ .attrs = fxos8700_attrs,
+};
+
+static const struct iio_info fxos8700_info = {
+ .read_raw = fxos8700_read_raw,
+ .write_raw = fxos8700_write_raw,
+ .attrs = &fxos8700_attrs_group,
+};
+
+static const char *fxos8700_match_acpi_device(struct device *dev)
+{
+ const struct acpi_device_id *id;
+
+ id = acpi_match_device(dev->driver->acpi_match_table, dev);
+ if (!id)
+ return NULL;
+
+ return dev_name(dev);
+}
+
+static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
+{
+ int ret;
+ unsigned int val;
+ struct device *dev = regmap_get_device(data->regmap);
+
+ ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
+ if (ret) {
+ dev_err(dev, "Error reading chip id\n");
+ return ret;
+ }
+ if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
+ dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
+ val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
+ return -ENODEV;
+ }
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
+ if (ret)
+ return ret;
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
+ if (ret)
+ return ret;
+
+ /* The device must be in standby mode to change any of the other fields
+ * within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
+ if (ret)
+ return ret;
+ // Set max oversample ratio (OSR) and both devices active
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1, 0x1F);
+ if (ret)
+ return ret;
+ // Disable and rst min/max measurements & threshold
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2, 0x1c);
+ if (ret)
+ return ret;
+ // Max ODR (800Hz individual or 400Hz hybrid), active mode
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MAX + FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ // Set for max full-scale range (+/-8G)
+ ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
+ if (ret)
+ return ret;
+
+ dev_info(dev, "fxos8700 device driver init success\n");
+ return 0;
+}
+
+static void fxos8700_chip_uninit(void *data)
+{
+ struct fxos8700_data *fxos8700_data = data;
+
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
+}
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi)
+{
+ struct iio_dev *indio_dev;
+ struct fxos8700_data *data;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ dev_set_drvdata(dev, indio_dev);
+ data->regmap = regmap;
+
+ ret = fxos8700_chip_init(data, use_spi);
+ if (ret)
+ return ret;
+
+ ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
+ if (ret)
+ return ret;
+
+ if (!name && ACPI_HANDLE(dev))
+ name = fxos8700_match_acpi_device(dev);
+
+ indio_dev->dev.parent = dev;
+ indio_dev->channels = fxos8700_channels;
+ indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
+ indio_dev->name = name;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &fxos8700_info;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_GPL(fxos8700_core_probe);
+
+MODULE_AUTHOR("Gateworks, Inc.");
+MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700/fxos8700_i2c.c b/drivers/iio/imu/fxos8700/fxos8700_i2c.c
new file mode 100644
index 0000000..a1891d2
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/fxos8700_i2c.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU, I2C bits
+ *
+ * Copyright (c) 2016, Freescale Corporation. TODO
+ *
+ * 7-bit I2C slave address determined by SA1 and SA0 logic level
+ * inputs represented in the following table:
+ * SA1 | SA0 | Slave Address
+ * 0 | 0 | 0x1E
+ * 0 | 1 | 0x1D
+ * 1 | 0 | 0x1C
+ * 1 | 1 | 0x1F
+ */
+#include <linux/acpi.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct regmap *regmap;
+ const char *name = NULL;
+
+ regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&client->dev, "Failed to register i2c regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ if (id)
+ name = id->name;
+
+ return fxos8700_core_probe(&client->dev, regmap, name, false);
+}
+
+static const struct i2c_device_id fxos8700_i2c_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+#ifdef CONFIG_OF
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "fsl,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+#endif
+
+static struct i2c_driver fxos8700_i2c_driver = {
+ .driver = {
+ .name = "fxos8700_i2c",
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = of_match_ptr(fxos8700_of_match),
+ },
+ .probe = fxos8700_i2c_probe,
+ .id_table = fxos8700_i2c_id,
+};
+module_i2c_driver(fxos8700_i2c_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 I2C driver");
+MODULE_LICENSE("GPL v2"); //TODO
diff --git a/drivers/iio/imu/fxos8700/fxos8700_spi.c b/drivers/iio/imu/fxos8700/fxos8700_spi.c
new file mode 100644
index 0000000..c75ccb8
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/fxos8700_spi.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU, I2C bits
+ *
+ * Copyright (c) 2016, Freescale Corporation. TODO.
+ *
+ */
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_spi_probe(struct spi_device *spi)
+{
+ struct regmap *regmap;
+ const struct spi_device_id *id = spi_get_device_id(spi);
+
+ regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&spi->dev, "Failed to register spi regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+ return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
+}
+
+static const struct spi_device_id fxos8700_spi_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+#ifdef CONFIG_OF
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "fsl,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+#endif
+
+static struct spi_driver fxos8700_spi_driver = {
+ .probe = fxos8700_spi_probe,
+ .id_table = fxos8700_spi_id,
+ .driver = {
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = of_match_ptr(fxos8700_of_match),
+ .name = "fxos8700_spi",
+ },
+};
+module_spi_driver(fxos8700_spi_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 SPI driver");
+MODULE_LICENSE("GPL v2"); //TODO
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-09-18 1:28 ` [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-01 11:39 ` Rob Herring
0 siblings, 0 replies; 24+ messages in thread
From: Rob Herring @ 2019-10-01 11:39 UTC (permalink / raw)
To: Robert Jones
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland, linux-iio, devicetree
On Tue, Sep 17, 2019 at 06:28:55PM -0700, Robert Jones wrote:
> This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> device-tree bindings.
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
> ---
> Documentation/devicetree/bindings/iio/imu/fxos8700.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.txt
Please convert to a DT schema. See Documentation/devicetree/writing-schema.rst.
>
> diff --git a/Documentation/devicetree/bindings/iio/imu/fxos8700.txt b/Documentation/devicetree/bindings/iio/imu/fxos8700.txt
> new file mode 100644
> index 0000000..770605d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/imu/fxos8700.txt
> @@ -0,0 +1,15 @@
> +Freescale FXOS8700 - Inertial Measurement Unit with Accelerometer and Magnetometer
> +
> +https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
> +
> +Required properties:
> + - compatible : must be "fsl,fxos8700"
> + - reg : the I2C address or SPI chip select number of the device
> + - spi-max-frequency : set maximum clock frequency (only for SPI)
Looks like the device has 2 interrupts, 2 supplies, and a reset line.
Please make the binding complete even if the driver or you board doesn't
support some things yet.
Rob
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU
2019-09-18 1:28 ` [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-05 13:10 ` Jonathan Cameron
0 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron @ 2019-10-05 13:10 UTC (permalink / raw)
To: Robert Jones
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree
On Tue, 17 Sep 2019 18:28:56 -0700
Robert Jones <rjones@gateworks.com> wrote:
> FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
> magnetometer combined into a single package. The device features a
> selectable I2C or point-to-point SPI serial interface with 14-bit
> accelerometer and 16-bit magnetometer ADC resolution along with
> smart-embedded functions.
>
> FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
> ±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
> Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
> for each sensor. Interleaved magnetic and acceleration data is available
> at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
> package and it is guaranteed to operate over the extended temperature
> range of –40 °C to +85 °C.
>
> TODO: Trigger and IRQ configuration support
>
> Datasheet:
> http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
Looks pretty good. There are various bits in there you don't want until
you add buffered support and a few formatting bits and pieces but nothing
that should take long to tidy up.
One obscure issue in the regmap_bulk_read usage that will come back to
bite you if not fixed.
Thanks,
Jonathan
> ---
> drivers/iio/imu/Kconfig | 1 +
> drivers/iio/imu/Makefile | 1 +
> drivers/iio/imu/fxos8700/Kconfig | 32 ++
> drivers/iio/imu/fxos8700/Makefile | 6 +
> drivers/iio/imu/fxos8700/fxos8700.h | 183 +++++++++++
> drivers/iio/imu/fxos8700/fxos8700_core.c | 517 +++++++++++++++++++++++++++++++
> drivers/iio/imu/fxos8700/fxos8700_i2c.c | 75 +++++
> drivers/iio/imu/fxos8700/fxos8700_spi.c | 63 ++++
> 8 files changed, 878 insertions(+)
> create mode 100644 drivers/iio/imu/fxos8700/Kconfig
> create mode 100644 drivers/iio/imu/fxos8700/Makefile
> create mode 100644 drivers/iio/imu/fxos8700/fxos8700.h
> create mode 100644 drivers/iio/imu/fxos8700/fxos8700_core.c
> create mode 100644 drivers/iio/imu/fxos8700/fxos8700_i2c.c
> create mode 100644 drivers/iio/imu/fxos8700/fxos8700_spi.c
>
> diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
> index f3c7282..acfc383 100644
> --- a/drivers/iio/imu/Kconfig
> +++ b/drivers/iio/imu/Kconfig
> @@ -53,6 +53,7 @@ config KMX61
>
> source "drivers/iio/imu/inv_mpu6050/Kconfig"
> source "drivers/iio/imu/st_lsm6dsx/Kconfig"
> +source "drivers/iio/imu/fxos8700/Kconfig"
>
> endmenu
>
> diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
> index 4a69588..edf841a 100644
> --- a/drivers/iio/imu/Makefile
> +++ b/drivers/iio/imu/Makefile
> @@ -19,3 +19,4 @@ obj-y += inv_mpu6050/
> obj-$(CONFIG_KMX61) += kmx61.o
>
> obj-y += st_lsm6dsx/
> +obj-y += fxos8700/
> diff --git a/drivers/iio/imu/fxos8700/Kconfig b/drivers/iio/imu/fxos8700/Kconfig
> new file mode 100644
> index 0000000..4b98c2b
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/Kconfig
> @@ -0,0 +1,32 @@
> +#
> +# FXOS8700 IMU driver
> +#
> +
> +config FXOS8700
> + tristate
> + select IIO_BUFFER
> + select IIO_TRIGGERED_BUFFER
So far I don't think you actually support triggered buffers
so bring this in when you add it.
> +
> +config FXOS8700_I2C
> + tristate "Freescale FXOS8700 I2C driver"
> + depends on I2C
> + select FXOS8700
> + select REGMAP_I2C
> + help
> + Say yes here to build support for the Freescale FXOS8700 m+g combo
> + sensor on I2C.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_i2c.
> +
> +config FXOS8700_SPI
> + tristate "Freescale FXOS8700 SPI driver"
> + depends on SPI
> + select FXOS8700
> + select REGMAP_SPI
> + help
> + Say yes here to build support for the Freescale FXOS8700 m+g combo
> + sensor on SPI.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_spi.
> \ No newline at end of file
Fix that.
> diff --git a/drivers/iio/imu/fxos8700/Makefile b/drivers/iio/imu/fxos8700/Makefile
> new file mode 100644
> index 0000000..43ae69e
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/Makefile
> @@ -0,0 +1,6 @@
> +#
> +# Makefile for Freescale FXOS8700 IMU
> +#
> +obj-$(CONFIG_FXOS8700) += fxos8700_core.o
> +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
> +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
Hmm. I wonder. Is it worth a directory? If you keep to those 3 files, probably
not. For now at least I'd move it down in to the base imu directory.
We tend to only add the dir when things get really messy.
> \ No newline at end of file
Add one
> diff --git a/drivers/iio/imu/fxos8700/fxos8700.h b/drivers/iio/imu/fxos8700/fxos8700.h
> new file mode 100644
> index 0000000..c3720e3
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/fxos8700.h
> @@ -0,0 +1,183 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef FXOS8700_H_
> +#define FXOS8700_H_
> +
> +extern const struct regmap_config fxos8700_regmap_config;
> +
> +struct fxos8700_data {
> + struct regmap *regmap;
> + struct iio_trigger *trig;
> +};
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi);
> +
> +void fxos8700_core_remove(struct device *dev);
> +
> +/* Register Definitions */
Are any of these used except in the main file?
If not push them all down to the c file.
> +#define FXOS8700_STATUS 0x00
> +#define FXOS8700_OUT_X_MSB 0x01
> +#define FXOS8700_OUT_X_LSB 0x02
> +#define FXOS8700_OUT_Y_MSB 0x03
> +#define FXOS8700_OUT_Y_LSB 0x04
> +#define FXOS8700_OUT_Z_MSB 0x05
> +#define FXOS8700_OUT_Z_LSB 0x06
> +#define FXOS8700_F_SETUP 0x09
> +#define FXOS8700_TRIG_CFG 0x0a
> +#define FXOS8700_SYSMOD 0x0b
> +#define FXOS8700_INT_SOURCE 0x0c
> +#define FXOS8700_WHO_AM_I 0x0d
> +#define FXOS8700_XYZ_DATA_CFG 0x0e
> +#define FXOS8700_HP_FILTER_CUTOFF 0x0f
> +#define FXOS8700_PL_STATUS 0x10
> +#define FXOS8700_PL_CFG 0x11
> +#define FXOS8700_PL_COUNT 0x12
> +#define FXOS8700_PL_BF_ZCOMP 0x13
> +#define FXOS8700_PL_THS_REG 0x14
> +#define FXOS8700_A_FFMT_CFG 0x15
> +#define FXOS8700_A_FFMT_SRC 0x16
> +#define FXOS8700_A_FFMT_THS 0x17
> +#define FXOS8700_A_FFMT_COUNT 0x18
> +#define FXOS8700_TRANSIENT_CFG 0x1d
> +#define FXOS8700_TRANSIENT_SRC 0x1e
> +#define FXOS8700_TRANSIENT_THS 0x1f
> +#define FXOS8700_TRANSIENT_COUNT 0x20
> +#define FXOS8700_PULSE_CFG 0x21
> +#define FXOS8700_PULSE_SRC 0x22
> +#define FXOS8700_PULSE_THSX 0x23
> +#define FXOS8700_PULSE_THSY 0x24
> +#define FXOS8700_PULSE_THSZ 0x25
> +#define FXOS8700_PULSE_TMLT 0x26
> +#define FXOS8700_PULSE_LTCY 0x27
> +#define FXOS8700_PULSE_WIND 0x28
> +#define FXOS8700_ASLP_COUNT 0x29
> +#define FXOS8700_CTRL_REG1 0x2a
> +#define FXOS8700_CTRL_REG2 0x2b
> +#define FXOS8700_CTRL_REG3 0x2c
> +#define FXOS8700_CTRL_REG4 0x2d
> +#define FXOS8700_CTRL_REG5 0x2e
> +#define FXOS8700_OFF_X 0x2f
> +#define FXOS8700_OFF_Y 0x30
> +#define FXOS8700_OFF_Z 0x31
> +#define FXOS8700_M_DR_STATUS 0x32
> +#define FXOS8700_M_OUT_X_MSB 0x33
> +#define FXOS8700_M_OUT_X_LSB 0x34
> +#define FXOS8700_M_OUT_Y_MSB 0x35
> +#define FXOS8700_M_OUT_Y_LSB 0x36
> +#define FXOS8700_M_OUT_Z_MSB 0x37
> +#define FXOS8700_M_OUT_Z_LSB 0x38
> +#define FXOS8700_CMP_X_MSB 0x39
> +#define FXOS8700_CMP_X_LSB 0x3a
> +#define FXOS8700_CMP_Y_MSB 0x3b
> +#define FXOS8700_CMP_Y_LSB 0x3c
> +#define FXOS8700_CMP_Z_MSB 0x3d
> +#define FXOS8700_CMP_Z_LSB 0x3e
> +#define FXOS8700_M_OFF_X_MSB 0x3f
> +#define FXOS8700_M_OFF_X_LSB 0x40
> +#define FXOS8700_M_OFF_Y_MSB 0x41
> +#define FXOS8700_M_OFF_Y_LSB 0x42
> +#define FXOS8700_M_OFF_Z_MSB 0x43
> +#define FXOS8700_M_OFF_Z_LSB 0x44
> +#define FXOS8700_MAX_X_MSB 0x45
> +#define FXOS8700_MAX_X_LSB 0x46
> +#define FXOS8700_MAX_Y_MSB 0x47
> +#define FXOS8700_MAX_Y_LSB 0x48
> +#define FXOS8700_MAX_Z_MSB 0x49
> +#define FXOS8700_MAX_Z_LSB 0x4a
> +#define FXOS8700_MIN_X_MSB 0x4b
> +#define FXOS8700_MIN_X_LSB 0x4c
> +#define FXOS8700_MIN_Y_MSB 0x4d
> +#define FXOS8700_MIN_Y_LSB 0x4e
> +#define FXOS8700_MIN_Z_MSB 0x4f
> +#define FXOS8700_MIN_Z_LSB 0x50
> +#define FXOS8700_TEMP 0x51
> +#define FXOS8700_M_THS_CFG 0x52
> +#define FXOS8700_M_THS_SRC 0x53
> +#define FXOS8700_M_THS_X_MSB 0x54
> +#define FXOS8700_M_THS_X_LSB 0x55
> +#define FXOS8700_M_THS_Y_MSB 0x56
> +#define FXOS8700_M_THS_Y_LSB 0x57
> +#define FXOS8700_M_THS_Z_MSB 0x58
> +#define FXOS8700_M_THS_Z_LSB 0x59
> +#define FXOS8700_M_THS_COUNT 0x5a
> +#define FXOS8700_M_CTRL_REG1 0x5b
> +#define FXOS8700_M_CTRL_REG2 0x5c
> +#define FXOS8700_M_CTRL_REG3 0x5d
> +#define FXOS8700_M_INT_SRC 0x5e
> +#define FXOS8700_A_VECM_CFG 0x5f
> +#define FXOS8700_A_VECM_THS_MSB 0x60
> +#define FXOS8700_A_VECM_THS_LSB 0x61
> +#define FXOS8700_A_VECM_CNT 0x62
> +#define FXOS8700_A_VECM_INITX_MSB 0x63
> +#define FXOS8700_A_VECM_INITX_LSB 0x64
> +#define FXOS8700_A_VECM_INITY_MSB 0x65
> +#define FXOS8700_A_VECM_INITY_LSB 0x66
> +#define FXOS8700_A_VECM_INITZ_MSB 0x67
> +#define FXOS8700_A_VECM_INITZ_LSB 0x68
> +#define FXOS8700_M_VECM_CFG 0x69
> +#define FXOS8700_M_VECM_THS_MSB 0x6a
> +#define FXOS8700_M_VECM_THS_LSB 0x6b
> +#define FXOS8700_M_VECM_CNT 0x6c
> +#define FXOS8700_M_VECM_INITX_MSB 0x6d
> +#define FXOS8700_M_VECM_INITX_LSB 0x6e
> +#define FXOS8700_M_VECM_INITY_MSB 0x6f
> +#define FXOS8700_M_VECM_INITY_LSB 0x70
> +#define FXOS8700_M_VECM_INITZ_MSB 0x71
> +#define FXOS8700_M_VECM_INITZ_LSB 0x72
> +#define FXOS8700_A_FFMT_THS_X_MSB 0x73
> +#define FXOS8700_A_FFMT_THS_X_LSB 0x74
> +#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
> +#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
> +#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
> +#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
> +#define FXOS8700_A_TRAN_INIT_MSB 0x79
> +#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
> +#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
> +#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
> +#define FXOS8700_TM_NVM_LOCK 0x7e
> +#define FXOS8700_NVM_DATA0_35 0x80
> +#define FXOS8700_NVM_DATA_BNK3 0xa4
> +#define FXOS8700_NVM_DATA_BNK2 0xa5
> +#define FXOS8700_NVM_DATA_BNK1 0xa6
> +#define FXOS8700_NVM_DATA_BNK0 0xa7
> +
> +#define SENSOR_IOCTL_BASE 'S'
> +#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
> +#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
> +#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
> +#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
> +#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
> +#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
> +
> +#define FXOS8700_I2C_ADDR 0x1E
> +#define FXOS8700_DEVICE_ID 0xC7
> +#define FXOS8700_PRE_DEVICE_ID 0xC4
> +#define FXOS8700_DATA_BUF_SIZE 6
> +#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
> +#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
> +
> +#define FXOS8700_TYPE_ACC 0x00
> +#define FXOS8700_TYPE_MAG 0x01
> +#define FXOS8700_STANDBY 0x00
> +#define FXOS8700_ACTIVE 0x01
> +#define FXOS8700_ACTIVE_MIN_USLEEP 4000 //from table 6 in datasheet
> +
> +#define ABS_STATUS ABS_WHEEL
> +#define FXOS8700_DRIVER "fxos8700"
> +
> +#define ABSMAX_ACC_VAL 0x01FF
> +#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
> +#define FXOS8700_POLL_INTERVAL 400
> +#define FXOS8700_POLL_MAX 800
> +#define FXOS8700_POLL_MIN 100
> +#define FXOS8700_CTRL_ODR_MSK 0x38
> +#define FXOS8700_CTRL_ODR_MAX 0x00
> +#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
> +
> +enum {
> + MODE_2G = 0,
> + MODE_4G,
> + MODE_8G,
> +};
> +
> +#endif /* FXOS8700_H_ */
> diff --git a/drivers/iio/imu/fxos8700/fxos8700_core.c b/drivers/iio/imu/fxos8700/fxos8700_core.c
> new file mode 100644
> index 0000000..9098980
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/fxos8700_core.c
> @@ -0,0 +1,517 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - Freescale IMU (accelerometer plus magnetometer)
> + *
> + * Copyright (c) 2019, Freescale Corporation.
> + *
> + * IIO core driver for FXOS8700, with support for I2C/SPI busses
> + *
> + * TODO: Trigger and IRQ support
> + */
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <linux/acpi.h>
> +#include <linux/delay.h>
> +#include <linux/irq.h>
> +#include <linux/of_irq.h>
> +#include <linux/mutex.h>
> +
> +#include <linux/iio/iio.h>
> +#include <linux/iio/triggered_buffer.h>
> +#include <linux/iio/trigger_consumer.h>
> +#include <linux/iio/buffer.h>
Quite a few of these aren't yet used. Drop them until you add
buffer / trigger support.
> +#include <linux/iio/sysfs.h>
> +#include <linux/iio/trigger.h>
> +
> +#include "fxos8700.h"
> +
> +/* Regmap info */
> +static const struct regmap_range read_range[] = {
> + {
> + .range_min = 0x00,
> + .range_max = 0x18,
> + }, {
> + .range_min = 0x1d,
> + .range_max = 0x78,
> + },
> +};
> +
> +static const struct regmap_range write_range[] = {
> + {
> + .range_min = 0x09,
Use the defines for these rather than register addresses.
It might be easier to just use a big switch statement...
> + .range_max = 0x0a,
> + }, {
> + .range_min = 0x0e,
> + .range_max = 0x0f,
> + }, {
> + .range_min = 0x11,
> + .range_max = 0x15,
> + }, {
> + .range_min = 0x17,
> + .range_max = 0x1d,
> + }, {
> + .range_min = 0x1f,
> + .range_max = 0x21,
> + }, {
> + .range_min = 0x23,
> + .range_max = 0x31,
> + }, {
> + .range_min = 0x3f,
> + .range_max = 0x44,
> + }, {
> + .range_min = 0x52,
> + .range_max = 0x52,
> + }, {
> + .range_min = 0x54,
> + .range_max = 0x5d,
> + }, {
> + .range_min = 0x5f,
> + .range_max = 0x78,
> + },
> +};
> +
> +static const struct regmap_access_table driver_read_table = {
> + .yes_ranges = read_range,
> + .n_yes_ranges = ARRAY_SIZE(read_range),
> +};
> +
> +static const struct regmap_access_table driver_write_table = {
> + .yes_ranges = write_range,
> + .n_yes_ranges = ARRAY_SIZE(write_range),
> +};
> +
> +const struct regmap_config fxos8700_regmap_config = {
> + .reg_bits = 8,
> + .val_bits = 8,
> + .max_register = FXOS8700_NVM_DATA_BNK0,
> + .rd_table = &driver_read_table,
> + .wr_table = &driver_write_table,
> +};
> +EXPORT_SYMBOL(fxos8700_regmap_config);
> +
> +#define FXOS8700_CHANNEL(_type, _axis, _index) { \
> + .type = _type, \
> + .modified = 1, \
> + .channel2 = IIO_MOD_##_axis, \
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
> + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> + .scan_index = _index, \
So far you haven't added buffered support to the driver, so scan_*
should only be added when you do.
> + .scan_type = { \
> + .sign = 's', \
> + .realbits = 16, \
> + .storagebits = 16, \
> + .endianness = IIO_LE, \
> + }, \
> +}
> +
> +/* scan indexes follow DATA register order */
> +enum fxos8700_scan_axis {
> + FXOS8700_SCAN_ACCEL_X = 0,
> + FXOS8700_SCAN_ACCEL_Y,
> + FXOS8700_SCAN_ACCEL_Z,
> + FXOS8700_SCAN_MAGN_X,
> + FXOS8700_SCAN_MAGN_Y,
> + FXOS8700_SCAN_MAGN_Z,
> + FXOS8700_SCAN_RHALL,
> + FXOS8700_SCAN_TIMESTAMP,
> +};
> +
> +enum fxos8700_sensor {
> + FXOS8700_ACCEL = 0,
> + FXOS8700_MAGN,
> + FXOS8700_NUM_SENSORS /* must be last */
> +};
> +
> +enum fxos8700_int_pin {
> + FXOS8700_PIN_INT1,
> + FXOS8700_PIN_INT2
> +};
> +
> +struct fxos8700_scale {
> + u8 bits;
> + int uscale;
> +};
> +
> +struct fxos8700_odr {
> + u8 bits;
> + int odr;
> + int uodr;
> +};
> +
> +static const struct fxos8700_scale fxos8700_accel_scale[] = {
> + { MODE_2G, 244},
> + { MODE_4G, 488},
> + { MODE_8G, 976},
> +};
> +
> +/* Accellerometer and magnetometer have the same ODR options, set in the
> + * CTRL_REG1 register. ODR is halved when using both sensors at once in
> + * hybrid mode.
> + */
> +static const struct fxos8700_odr fxos8700_odr[] = {
> + {0x00, 800, 0},
> + {0x01, 400, 0},
> + {0x02, 200, 0},
> + {0x03, 100, 0},
> + {0x04, 50, 0},
> + {0x05, 12, 500000},
> + {0x06, 6, 250000},
> + {0x07, 1, 562500},
> +};
> +
> +static const struct iio_chan_spec fxos8700_channels[] = {
> + FXOS8700_CHANNEL(IIO_ACCEL, X, FXOS8700_SCAN_ACCEL_X),
> + FXOS8700_CHANNEL(IIO_ACCEL, Y, FXOS8700_SCAN_ACCEL_Y),
> + FXOS8700_CHANNEL(IIO_ACCEL, Z, FXOS8700_SCAN_ACCEL_Z),
> + FXOS8700_CHANNEL(IIO_MAGN, X, FXOS8700_SCAN_MAGN_X),
> + FXOS8700_CHANNEL(IIO_MAGN, Y, FXOS8700_SCAN_MAGN_Y),
> + FXOS8700_CHANNEL(IIO_MAGN, Z, FXOS8700_SCAN_MAGN_Z),
> + IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
> +};
> +
> +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
> +{
> + switch (iio_type) {
> + case IIO_ACCEL:
> + return FXOS8700_ACCEL;
> + case IIO_ANGL_VEL:
> + return FXOS8700_MAGN;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int fxos8700_set_active_mode(struct fxos8700_data *data,
> + enum fxos8700_sensor t, bool mode)
> +{
> + int ret;
> +
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
> + if (ret)
> + return ret;
> +
> + usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
> + FXOS8700_ACTIVE_MIN_USLEEP + 1000);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int uscale)
> +{
> + int i;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + if (t == FXOS8700_MAGN) {
> + dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
> + return -EINVAL;
> + }
> +
> + for (i = 0; i < scale_num; i++)
> + if (fxos8700_accel_scale[i].uscale == uscale)
> + break;
> +
> + if (i == scale_num)
> + return -EINVAL;
> +
> + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
> + fxos8700_accel_scale[i].bits);
> +}
> +
> +static int fxos8700_get_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int *uscale)
> +{
> + int i, ret, val;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> +
> + if (t == FXOS8700_MAGN) {
> + *uscale = 1200; // Magnetometer is locked at 1200uT
> + return 0;
> + }
> +
> + ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
> + if (ret)
> + return ret;
> +
> + for (i = 0; i < scale_num; i++)
> + if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
> + *uscale = fxos8700_accel_scale[i].uscale;
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
> + int axis, int *val)
> +{
> + u8 base, reg;
> + int ret;
> + __le16 sample = 0;
> + enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
> + u8 tmp_data[FXOS8700_DATA_BUF_SIZE];
regmap_bulk_read can cause dma to occur directly using the buffers
provided. That can lead into the fun of cacheline corruption if
the buffer shares a cacheline with any other data.
Upshot you can't use it with a buffer on the stack. Best solution
is normally to use __cacheline_aligned magic and put it in
private data structure for your driver (at the end so you don't
waste space by having to force following elements to yet another
cacheline).
If you don't do that you can look forward to extremely hard to
diagnose intermittent errors on some hosts. It's one of those
nightmare issues to debug :)
> +
> + base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
> +
> + ret = regmap_bulk_read(data->regmap, base, tmp_data,
> + FXOS8700_DATA_BUF_SIZE);
> + if (ret)
> + return ret;
> +
> + reg = (axis - IIO_MOD_X) * sizeof(sample);
> + sample = ((tmp_data[reg] << 8) & 0xff00) | tmp_data[reg + 1];
Superficially this looks like a endian conversion, so I'm a little
confused how we end up with another one below. Should be able to
do that directly on tmp_data. If it's actually an array of
__le16 then make the data type say that rather than u8.
> + *val = sign_extend32(le16_to_cpu(sample), 15);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int odr, int uodr)
> +{
> + int i, ret, val;
> + bool active_mode;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + active_mode = val & FXOS8700_ACTIVE;
> +
> + if (active_mode) {
> + /* The device must be in standby mode to change any of the
> + * other fields within CTRL_REG1
Multiline comment syntax - see below.
> + */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + val & ~FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + }
> +
> + for (i = 0; i < odr_num; i++)
> + if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + return regmap_update_bits(data->regmap,
> + FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
> + fxos8700_odr[i].bits << 3 | active_mode);
> +}
> +
> +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int *odr, int *uodr)
> +{
> + int i, val, ret;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + val &= FXOS8700_CTRL_ODR_MSK;
> +
> + for (i = 0; i < odr_num; i++)
> + if (val == fxos8700_odr[i].bits)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + *odr = fxos8700_odr[i].odr;
> + *uodr = fxos8700_odr[i].uodr;
> +
> + return 0;
> +}
> +
> +static int fxos8700_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> + int ret;
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
> + if (ret)
> + return ret;
> + return IIO_VAL_INT;
> + case IIO_CHAN_INFO_SCALE:
> + *val = 0;
> + ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
Don't think you can get here so remove the return 0.
> +}
> +
> +static int fxos8700_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int val, int val2, long mask)
> +{
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_SCALE:
> + return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + break;
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + default:
> + return -EINVAL;
> + }
> +
Can't get here so remove the return 0.
> + return 0;
> +}
> +
> +static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
> +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
> +
> +static struct attribute *fxos8700_attrs[] = {
> + &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_accel_scale_available.dev_attr.attr,
> + &iio_const_attr_in_magn_scale_available.dev_attr.attr,
> + NULL,
> +};
> +
> +static const struct attribute_group fxos8700_attrs_group = {
> + .attrs = fxos8700_attrs,
> +};
> +
> +static const struct iio_info fxos8700_info = {
> + .read_raw = fxos8700_read_raw,
> + .write_raw = fxos8700_write_raw,
> + .attrs = &fxos8700_attrs_group,
> +};
> +
> +static const char *fxos8700_match_acpi_device(struct device *dev)
> +{
> + const struct acpi_device_id *id;
> +
> + id = acpi_match_device(dev->driver->acpi_match_table, dev);
> + if (!id)
> + return NULL;
> +
> + return dev_name(dev);
> +}
> +
> +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
> +{
> + int ret;
> + unsigned int val;
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
> + if (ret) {
> + dev_err(dev, "Error reading chip id\n");
> + return ret;
> + }
> + if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
> + dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
> + val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
> + return -ENODEV;
> + }
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
> + if (ret)
> + return ret;
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
> + if (ret)
> + return ret;
> +
> + /* The device must be in standby mode to change any of the other fields
> + * within CTRL_REG1
> + */
Most of the kernel, including IIO, uses
/*
* The device...
* ...
*/
For multiline comments.
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
> + if (ret)
> + return ret;
> + // Set max oversample ratio (OSR) and both devices active
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1, 0x1F);
If you can, please specify these register values as | combinations of
the bits that make them up.
> + if (ret)
> + return ret;
> + // Disable and rst min/max measurements & threshold
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2, 0x1c);
> + if (ret)
> + return ret;
> + // Max ODR (800Hz individual or 400Hz hybrid), active mode
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MAX + FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + // Set for max full-scale range (+/-8G)
Kernel uses /* .. */ C style comments except in very specific cases
so please swap to that throughout. Careful with SPDX though as some
of those should use //
> + ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
> + if (ret)
> + return ret;
> +
> + dev_info(dev, "fxos8700 device driver init success\n");
Easy to tell this anyway as the device won't be created if it isn't.
Hence either dev_dbg or (better still) get rid of this log noise entirely.
> + return 0;
> +}
> +
> +static void fxos8700_chip_uninit(void *data)
> +{
> + struct fxos8700_data *fxos8700_data = data;
> +
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
> +}
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi)
> +{
> + struct iio_dev *indio_dev;
> + struct fxos8700_data *data;
> + int ret;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + data = iio_priv(indio_dev);
> + dev_set_drvdata(dev, indio_dev);
> + data->regmap = regmap;
> +
> + ret = fxos8700_chip_init(data, use_spi);
> + if (ret)
> + return ret;
> +
> + ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
> + if (ret)
> + return ret;
> +
> + if (!name && ACPI_HANDLE(dev))
> + name = fxos8700_match_acpi_device(dev);
name is supposed to end up as the part number. Can we not establish
that via a more direct means?
IIRC we recently added a label attribute to provide a 'unique' id if
that is what you are after here.
> +
> + indio_dev->dev.parent = dev;
> + indio_dev->channels = fxos8700_channels;
> + indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
> + indio_dev->name = name;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &fxos8700_info;
> +
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +EXPORT_SYMBOL_GPL(fxos8700_core_probe);
> +
> +MODULE_AUTHOR("Gateworks, Inc.");
> +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/iio/imu/fxos8700/fxos8700_i2c.c b/drivers/iio/imu/fxos8700/fxos8700_i2c.c
> new file mode 100644
> index 0000000..a1891d2
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/fxos8700_i2c.c
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - Freescale IMU, I2C bits
> + *
> + * Copyright (c) 2016, Freescale Corporation. TODO
> + *
> + * 7-bit I2C slave address determined by SA1 and SA0 logic level
> + * inputs represented in the following table:
> + * SA1 | SA0 | Slave Address
> + * 0 | 0 | 0x1E
> + * 0 | 1 | 0x1D
> + * 1 | 0 | 0x1C
> + * 1 | 1 | 0x1F
> + */
> +#include <linux/acpi.h>
> +#include <linux/i2c.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_i2c_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct regmap *regmap;
> + const char *name = NULL;
> +
> + regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&client->dev, "Failed to register i2c regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> + if (id)
> + name = id->name;
> +
> + return fxos8700_core_probe(&client->dev, regmap, name, false);
> +}
> +
> +static const struct i2c_device_id fxos8700_i2c_id[] = {
> + {"fxos8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "fsl,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +#endif
> +
> +static struct i2c_driver fxos8700_i2c_driver = {
> + .driver = {
> + .name = "fxos8700_i2c",
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = of_match_ptr(fxos8700_of_match),
As for spi driver, don't do this with the of_match_ptr trickery.
Breaks use of PRP001 ACPI ids. Slowly but surely it's getting
phased on in new drivers and old ones where anyone actually
wants to use that approach to the binding.
> + },
> + .probe = fxos8700_i2c_probe,
> + .id_table = fxos8700_i2c_id,
> +};
> +module_i2c_driver(fxos8700_i2c_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 I2C driver");
> +MODULE_LICENSE("GPL v2"); //TODO
> diff --git a/drivers/iio/imu/fxos8700/fxos8700_spi.c b/drivers/iio/imu/fxos8700/fxos8700_spi.c
> new file mode 100644
> index 0000000..c75ccb8
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700/fxos8700_spi.c
> @@ -0,0 +1,63 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - Freescale IMU, I2C bits
> + *
> + * Copyright (c) 2016, Freescale Corporation. TODO.
> + *
> + */
> +#include <linux/acpi.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/spi/spi.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_spi_probe(struct spi_device *spi)
> +{
> + struct regmap *regmap;
> + const struct spi_device_id *id = spi_get_device_id(spi);
> +
> + regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&spi->dev, "Failed to register spi regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> + return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
> +}
> +
> +static const struct spi_device_id fxos8700_spi_id[] = {
> + {"fxos8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + { },
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +#ifdef CONFIG_OF
Given the magic that allows us to use dt bindings from ACPI
these days, we no longer protect these with such an ifdef.
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "fsl,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +#endif
> +
> +static struct spi_driver fxos8700_spi_driver = {
Nitpick: Personally I'm usually anti doing tab indents for simple cases like this.
The reason is the amount of noise it generates when we then get another
entry added that happens to need everything realigned.
In cases where it is a table of values it can help readability.
Here not so much...
> + .probe = fxos8700_spi_probe,
> + .id_table = fxos8700_spi_id,
> + .driver = {
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = of_match_ptr(fxos8700_of_match),
Don't use that macro. It stops the magic PRP001 ACPI id working.
.of_match_table = fxos8700_of_match,
> + .name = "fxos8700_spi",
> + },
> +};
> +module_spi_driver(fxos8700_spi_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 SPI driver");
> +MODULE_LICENSE("GPL v2"); //TODO
You want to fix that TODO :)
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 0/2] iio: imu: add support for FXOS8700
2019-09-18 1:28 [PATCH 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-09-18 1:28 ` [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-09-18 1:28 ` [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-10 1:25 ` Robert Jones
2019-10-10 1:25 ` [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
` (2 more replies)
2 siblings, 3 replies; 24+ messages in thread
From: Robert Jones @ 2019-10-10 1:25 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
- Document the FXOS8700 device tree binding.
- Implement basic iio driver support for FXOS8700
Changes in v2:
- Reorganized files to base imu directory
- Converted devicetree bindings doc to schema
- Moved single use function definitions out of header
- Added bit definitions and #define usages
- Moved buffer for regmap_bulk_read to private data struct
- Clarified get_data operations
- Remove unreachable code
- Remove log noise
- Remove of_match_ptr() macro usage
- Various style and whitespace changes
Robert Jones (2):
dt-bindings: iio: imu: add fxos8700 imu binding
iio: imu: Add support for the FXOS8700 IMU
.../devicetree/bindings/iio/imu/fxos8700.yaml | 54 +++
drivers/iio/imu/Kconfig | 28 ++
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 185 ++++++++
drivers/iio/imu/fxos8700/Kconfig | 30 ++
drivers/iio/imu/fxos8700/Makefile | 6 +
drivers/iio/imu/fxos8700_core.c | 501 +++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 73 +++
drivers/iio/imu/fxos8700_spi.c | 61 +++
9 files changed, 943 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700/Kconfig
create mode 100644 drivers/iio/imu/fxos8700/Makefile
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
--
2.9.2
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
@ 2019-10-10 1:25 ` Robert Jones
2019-10-10 13:23 ` Rob Herring
2019-10-10 1:25 ` [PATCH v2 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-10-10 1:25 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
device-tree bindings.
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
.../devicetree/bindings/iio/imu/fxos8700.yaml | 54 ++++++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
diff --git a/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
new file mode 100644
index 0000000..f0dbf4b
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale FXOS8700 Inertial Measurement Unit
+
+maintainers:
+ - Robert Jones <rjones@gateworks.com>
+
+description: |
+ Accelerometer and magnetometer combo device with an i2c interface.
+ https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
+
+properties:
+ compatible:
+ enum:
+ - fsl,fxos8700
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ drive-open-drain:
+ maxItems: 1
+
+ spi-max-frequency:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fxos8700@1e {
+ compatible = "fsl,fxos8700";
+ reg = <0x1e>;
+
+ interrupt-parent = <&gpio2>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "INT1";
+ };
+ };
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v2 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 1:25 ` [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-10 1:25 ` Robert Jones
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 0 replies; 24+ messages in thread
From: Robert Jones @ 2019-10-10 1:25 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
magnetometer combined into a single package. The device features a
selectable I2C or point-to-point SPI serial interface with 14-bit
accelerometer and 16-bit magnetometer ADC resolution along with
smart-embedded functions.
FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
for each sensor. Interleaved magnetic and acceleration data is available
at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
package and it is guaranteed to operate over the extended temperature
range of –40 °C to +85 °C.
TODO: Trigger and IRQ configuration support
Datasheet:
http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
drivers/iio/imu/Kconfig | 28 +++
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 185 ++++++++++++++
drivers/iio/imu/fxos8700/Kconfig | 30 +++
drivers/iio/imu/fxos8700/Makefile | 6 +
drivers/iio/imu/fxos8700_core.c | 501 ++++++++++++++++++++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 73 ++++++
drivers/iio/imu/fxos8700_spi.c | 61 +++++
8 files changed, 889 insertions(+)
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700/Kconfig
create mode 100644 drivers/iio/imu/fxos8700/Makefile
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
index f3c7282..adadfa0 100644
--- a/drivers/iio/imu/Kconfig
+++ b/drivers/iio/imu/Kconfig
@@ -40,6 +40,33 @@ config ADIS16480
source "drivers/iio/imu/bmi160/Kconfig"
+config FXOS8700
+ tristate
+
+config FXOS8700_I2C
+ tristate "Freescale FXOS8700 I2C driver"
+ depends on I2C
+ select FXOS8700
+ select REGMAP_I2C
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on I2C.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_i2c.
+
+config FXOS8700_SPI
+ tristate "Freescale FXOS8700 SPI driver"
+ depends on SPI
+ select FXOS8700
+ select REGMAP_SPI
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on SPI.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_spi.
+
config KMX61
tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
depends on I2C
@@ -53,6 +80,7 @@ config KMX61
source "drivers/iio/imu/inv_mpu6050/Kconfig"
source "drivers/iio/imu/st_lsm6dsx/Kconfig"
+source "drivers/iio/imu/fxos8700/Kconfig"
endmenu
diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
index 4a69588..5237fd4 100644
--- a/drivers/iio/imu/Makefile
+++ b/drivers/iio/imu/Makefile
@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
obj-y += bmi160/
+
+obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
+
obj-y += inv_mpu6050/
obj-$(CONFIG_KMX61) += kmx61.o
diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
new file mode 100644
index 0000000..92499a2
--- /dev/null
+++ b/drivers/iio/imu/fxos8700.h
@@ -0,0 +1,185 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef FXOS8700_H_
+#define FXOS8700_H_
+
+extern const struct regmap_config fxos8700_regmap_config;
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi);
+
+/* Register Definitions */
+#define FXOS8700_STATUS 0x00
+#define FXOS8700_OUT_X_MSB 0x01
+#define FXOS8700_OUT_X_LSB 0x02
+#define FXOS8700_OUT_Y_MSB 0x03
+#define FXOS8700_OUT_Y_LSB 0x04
+#define FXOS8700_OUT_Z_MSB 0x05
+#define FXOS8700_OUT_Z_LSB 0x06
+#define FXOS8700_F_SETUP 0x09
+#define FXOS8700_TRIG_CFG 0x0a
+#define FXOS8700_SYSMOD 0x0b
+#define FXOS8700_INT_SOURCE 0x0c
+#define FXOS8700_WHO_AM_I 0x0d
+#define FXOS8700_XYZ_DATA_CFG 0x0e
+#define FXOS8700_HP_FILTER_CUTOFF 0x0f
+#define FXOS8700_PL_STATUS 0x10
+#define FXOS8700_PL_CFG 0x11
+#define FXOS8700_PL_COUNT 0x12
+#define FXOS8700_PL_BF_ZCOMP 0x13
+#define FXOS8700_PL_THS_REG 0x14
+#define FXOS8700_A_FFMT_CFG 0x15
+#define FXOS8700_A_FFMT_SRC 0x16
+#define FXOS8700_A_FFMT_THS 0x17
+#define FXOS8700_A_FFMT_COUNT 0x18
+#define FXOS8700_TRANSIENT_CFG 0x1d
+#define FXOS8700_TRANSIENT_SRC 0x1e
+#define FXOS8700_TRANSIENT_THS 0x1f
+#define FXOS8700_TRANSIENT_COUNT 0x20
+#define FXOS8700_PULSE_CFG 0x21
+#define FXOS8700_PULSE_SRC 0x22
+#define FXOS8700_PULSE_THSX 0x23
+#define FXOS8700_PULSE_THSY 0x24
+#define FXOS8700_PULSE_THSZ 0x25
+#define FXOS8700_PULSE_TMLT 0x26
+#define FXOS8700_PULSE_LTCY 0x27
+#define FXOS8700_PULSE_WIND 0x28
+#define FXOS8700_ASLP_COUNT 0x29
+#define FXOS8700_CTRL_REG1 0x2a
+#define FXOS8700_CTRL_REG2 0x2b
+#define FXOS8700_CTRL_REG3 0x2c
+#define FXOS8700_CTRL_REG4 0x2d
+#define FXOS8700_CTRL_REG5 0x2e
+#define FXOS8700_OFF_X 0x2f
+#define FXOS8700_OFF_Y 0x30
+#define FXOS8700_OFF_Z 0x31
+#define FXOS8700_M_DR_STATUS 0x32
+#define FXOS8700_M_OUT_X_MSB 0x33
+#define FXOS8700_M_OUT_X_LSB 0x34
+#define FXOS8700_M_OUT_Y_MSB 0x35
+#define FXOS8700_M_OUT_Y_LSB 0x36
+#define FXOS8700_M_OUT_Z_MSB 0x37
+#define FXOS8700_M_OUT_Z_LSB 0x38
+#define FXOS8700_CMP_X_MSB 0x39
+#define FXOS8700_CMP_X_LSB 0x3a
+#define FXOS8700_CMP_Y_MSB 0x3b
+#define FXOS8700_CMP_Y_LSB 0x3c
+#define FXOS8700_CMP_Z_MSB 0x3d
+#define FXOS8700_CMP_Z_LSB 0x3e
+#define FXOS8700_M_OFF_X_MSB 0x3f
+#define FXOS8700_M_OFF_X_LSB 0x40
+#define FXOS8700_M_OFF_Y_MSB 0x41
+#define FXOS8700_M_OFF_Y_LSB 0x42
+#define FXOS8700_M_OFF_Z_MSB 0x43
+#define FXOS8700_M_OFF_Z_LSB 0x44
+#define FXOS8700_MAX_X_MSB 0x45
+#define FXOS8700_MAX_X_LSB 0x46
+#define FXOS8700_MAX_Y_MSB 0x47
+#define FXOS8700_MAX_Y_LSB 0x48
+#define FXOS8700_MAX_Z_MSB 0x49
+#define FXOS8700_MAX_Z_LSB 0x4a
+#define FXOS8700_MIN_X_MSB 0x4b
+#define FXOS8700_MIN_X_LSB 0x4c
+#define FXOS8700_MIN_Y_MSB 0x4d
+#define FXOS8700_MIN_Y_LSB 0x4e
+#define FXOS8700_MIN_Z_MSB 0x4f
+#define FXOS8700_MIN_Z_LSB 0x50
+#define FXOS8700_TEMP 0x51
+#define FXOS8700_M_THS_CFG 0x52
+#define FXOS8700_M_THS_SRC 0x53
+#define FXOS8700_M_THS_X_MSB 0x54
+#define FXOS8700_M_THS_X_LSB 0x55
+#define FXOS8700_M_THS_Y_MSB 0x56
+#define FXOS8700_M_THS_Y_LSB 0x57
+#define FXOS8700_M_THS_Z_MSB 0x58
+#define FXOS8700_M_THS_Z_LSB 0x59
+#define FXOS8700_M_THS_COUNT 0x5a
+#define FXOS8700_M_CTRL_REG1 0x5b
+#define FXOS8700_M_CTRL_REG2 0x5c
+#define FXOS8700_M_CTRL_REG3 0x5d
+#define FXOS8700_M_INT_SRC 0x5e
+#define FXOS8700_A_VECM_CFG 0x5f
+#define FXOS8700_A_VECM_THS_MSB 0x60
+#define FXOS8700_A_VECM_THS_LSB 0x61
+#define FXOS8700_A_VECM_CNT 0x62
+#define FXOS8700_A_VECM_INITX_MSB 0x63
+#define FXOS8700_A_VECM_INITX_LSB 0x64
+#define FXOS8700_A_VECM_INITY_MSB 0x65
+#define FXOS8700_A_VECM_INITY_LSB 0x66
+#define FXOS8700_A_VECM_INITZ_MSB 0x67
+#define FXOS8700_A_VECM_INITZ_LSB 0x68
+#define FXOS8700_M_VECM_CFG 0x69
+#define FXOS8700_M_VECM_THS_MSB 0x6a
+#define FXOS8700_M_VECM_THS_LSB 0x6b
+#define FXOS8700_M_VECM_CNT 0x6c
+#define FXOS8700_M_VECM_INITX_MSB 0x6d
+#define FXOS8700_M_VECM_INITX_LSB 0x6e
+#define FXOS8700_M_VECM_INITY_MSB 0x6f
+#define FXOS8700_M_VECM_INITY_LSB 0x70
+#define FXOS8700_M_VECM_INITZ_MSB 0x71
+#define FXOS8700_M_VECM_INITZ_LSB 0x72
+#define FXOS8700_A_FFMT_THS_X_MSB 0x73
+#define FXOS8700_A_FFMT_THS_X_LSB 0x74
+#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
+#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
+#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
+#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
+#define FXOS8700_A_TRAN_INIT_MSB 0x79
+#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
+#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
+#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
+#define FXOS8700_TM_NVM_LOCK 0x7e
+#define FXOS8700_NVM_DATA0_35 0x80
+#define FXOS8700_NVM_DATA_BNK3 0xa4
+#define FXOS8700_NVM_DATA_BNK2 0xa5
+#define FXOS8700_NVM_DATA_BNK1 0xa6
+#define FXOS8700_NVM_DATA_BNK0 0xa7
+
+/* Bit definitions for FXOS8700_M_CTRL_REG1 */
+#define FXOS8700_HMS_MASK GENMASK(1, 0)
+#define FXOS8700_OS_MASK GENMASK(4, 2)
+
+/* Bit definitions for FXOS8700_M_CTRL_REG2 */
+#define FXOS8700_MAXMIN_RST BIT(2)
+#define FXOS8700_MAXMIN_DIS_THS BIT(3)
+#define FXOS8700_MAXMIN_DIS BIT(4)
+
+#define SENSOR_IOCTL_BASE 'S'
+#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
+#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
+#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
+#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
+#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
+#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
+
+#define FXOS8700_I2C_ADDR 0x1E
+#define FXOS8700_DEVICE_ID 0xC7
+#define FXOS8700_PRE_DEVICE_ID 0xC4
+#define FXOS8700_DATA_BUF_SIZE 6
+#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
+#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
+
+#define FXOS8700_TYPE_ACC 0x00
+#define FXOS8700_TYPE_MAG 0x01
+#define FXOS8700_STANDBY 0x00
+#define FXOS8700_ACTIVE 0x01
+#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
+
+#define ABS_STATUS ABS_WHEEL
+#define FXOS8700_DRIVER "fxos8700"
+
+#define ABSMAX_ACC_VAL 0x01FF
+#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
+#define FXOS8700_POLL_INTERVAL 400
+#define FXOS8700_POLL_MAX 800
+#define FXOS8700_POLL_MIN 100
+#define FXOS8700_CTRL_ODR_MSK 0x38
+#define FXOS8700_CTRL_ODR_MAX 0x00
+#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
+
+enum {
+ MODE_2G = 0,
+ MODE_4G,
+ MODE_8G,
+};
+
+#endif /* FXOS8700_H_ */
diff --git a/drivers/iio/imu/fxos8700/Kconfig b/drivers/iio/imu/fxos8700/Kconfig
new file mode 100644
index 0000000..1c7dbfd
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/Kconfig
@@ -0,0 +1,30 @@
+#
+# FXOS8700 IMU driver
+#
+
+config FXOS8700
+ tristate
+
+config FXOS8700_I2C
+ tristate "Freescale FXOS8700 I2C driver"
+ depends on I2C
+ select FXOS8700
+ select REGMAP_I2C
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on I2C.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_i2c.
+
+config FXOS8700_SPI
+ tristate "Freescale FXOS8700 SPI driver"
+ depends on SPI
+ select FXOS8700
+ select REGMAP_SPI
+ help
+ Say yes here to build support for the Freescale FXOS8700 m+g combo
+ sensor on SPI.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_spi.
diff --git a/drivers/iio/imu/fxos8700/Makefile b/drivers/iio/imu/fxos8700/Makefile
new file mode 100644
index 0000000..43ae69e
--- /dev/null
+++ b/drivers/iio/imu/fxos8700/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for Freescale FXOS8700 IMU
+#
+obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
\ No newline at end of file
diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
new file mode 100644
index 0000000..147e486
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -0,0 +1,501 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU (accelerometer plus magnetometer)
+ *
+ * Copyright (c) 2019, Freescale Corporation.
+ *
+ * IIO core driver for FXOS8700, with support for I2C/SPI busses
+ *
+ * TODO: Buffer, trigger, and IRQ support
+ */
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/acpi.h>
+#include <linux/bitops.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+
+#include "fxos8700.h"
+
+struct fxos8700_data {
+ struct regmap *regmap;
+ struct iio_trigger *trig;
+ u8 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
+};
+
+/* Regmap info */
+static const struct regmap_range read_range[] = {
+ {
+ .range_min = FXOS8700_STATUS,
+ .range_max = FXOS8700_A_FFMT_COUNT,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_range write_range[] = {
+ {
+ .range_min = FXOS8700_F_SETUP,
+ .range_max = FXOS8700_TRIG_CFG,
+ }, {
+ .range_min = FXOS8700_XYZ_DATA_CFG,
+ .range_max = FXOS8700_HP_FILTER_CUTOFF,
+ }, {
+ .range_min = FXOS8700_PL_CFG,
+ .range_max = FXOS8700_A_FFMT_CFG,
+ }, {
+ .range_min = FXOS8700_A_FFMT_THS,
+ .range_max = FXOS8700_TRANSIENT_CFG,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_THS,
+ .range_max = FXOS8700_PULSE_CFG,
+ }, {
+ .range_min = FXOS8700_PULSE_THSX,
+ .range_max = FXOS8700_OFF_Z,
+ }, {
+ .range_min = FXOS8700_M_OFF_X_MSB,
+ .range_max = FXOS8700_M_OFF_Z_LSB,
+ }, {
+ .range_min = FXOS8700_M_THS_CFG,
+ .range_max = FXOS8700_M_THS_CFG,
+ }, {
+ .range_min = FXOS8700_M_THS_X_MSB,
+ .range_max = FXOS8700_M_CTRL_REG3,
+ }, {
+ .range_min = FXOS8700_A_VECM_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_access_table driver_read_table = {
+ .yes_ranges = read_range,
+ .n_yes_ranges = ARRAY_SIZE(read_range),
+};
+
+static const struct regmap_access_table driver_write_table = {
+ .yes_ranges = write_range,
+ .n_yes_ranges = ARRAY_SIZE(write_range),
+};
+
+const struct regmap_config fxos8700_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = FXOS8700_NVM_DATA_BNK0,
+ .rd_table = &driver_read_table,
+ .wr_table = &driver_write_table,
+};
+EXPORT_SYMBOL(fxos8700_regmap_config);
+
+#define FXOS8700_CHANNEL(_type, _axis) { \
+ .type = _type, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##_axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ), \
+}
+
+/* scan indexes follow DATA register order */
+enum fxos8700_scan_axis {
+ FXOS8700_SCAN_ACCEL_X = 0,
+ FXOS8700_SCAN_ACCEL_Y,
+ FXOS8700_SCAN_ACCEL_Z,
+ FXOS8700_SCAN_MAGN_X,
+ FXOS8700_SCAN_MAGN_Y,
+ FXOS8700_SCAN_MAGN_Z,
+ FXOS8700_SCAN_RHALL,
+ FXOS8700_SCAN_TIMESTAMP,
+};
+
+enum fxos8700_sensor {
+ FXOS8700_ACCEL = 0,
+ FXOS8700_MAGN,
+ FXOS8700_NUM_SENSORS /* must be last */
+};
+
+enum fxos8700_int_pin {
+ FXOS8700_PIN_INT1,
+ FXOS8700_PIN_INT2
+};
+
+struct fxos8700_scale {
+ u8 bits;
+ int uscale;
+};
+
+struct fxos8700_odr {
+ u8 bits;
+ int odr;
+ int uodr;
+};
+
+static const struct fxos8700_scale fxos8700_accel_scale[] = {
+ { MODE_2G, 244},
+ { MODE_4G, 488},
+ { MODE_8G, 976},
+};
+
+/*
+ * Accellerometer and magnetometer have the same ODR options, set in the
+ * CTRL_REG1 register. ODR is halved when using both sensors at once in
+ * hybrid mode.
+ */
+static const struct fxos8700_odr fxos8700_odr[] = {
+ {0x00, 800, 0},
+ {0x01, 400, 0},
+ {0x02, 200, 0},
+ {0x03, 100, 0},
+ {0x04, 50, 0},
+ {0x05, 12, 500000},
+ {0x06, 6, 250000},
+ {0x07, 1, 562500},
+};
+
+static const struct iio_chan_spec fxos8700_channels[] = {
+ FXOS8700_CHANNEL(IIO_ACCEL, X),
+ FXOS8700_CHANNEL(IIO_ACCEL, Y),
+ FXOS8700_CHANNEL(IIO_ACCEL, Z),
+ FXOS8700_CHANNEL(IIO_MAGN, X),
+ FXOS8700_CHANNEL(IIO_MAGN, Y),
+ FXOS8700_CHANNEL(IIO_MAGN, Z),
+ IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
+};
+
+static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
+{
+ switch (iio_type) {
+ case IIO_ACCEL:
+ return FXOS8700_ACCEL;
+ case IIO_ANGL_VEL:
+ return FXOS8700_MAGN;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_set_active_mode(struct fxos8700_data *data,
+ enum fxos8700_sensor t, bool mode)
+{
+ int ret;
+
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
+ if (ret)
+ return ret;
+
+ usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
+ FXOS8700_ACTIVE_MIN_USLEEP + 1000);
+
+ return 0;
+}
+
+static int fxos8700_set_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int uscale)
+{
+ int i;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+ struct device *dev = regmap_get_device(data->regmap);
+
+ if (t == FXOS8700_MAGN) {
+ dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].uscale == uscale)
+ break;
+
+ if (i == scale_num)
+ return -EINVAL;
+
+ return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
+ fxos8700_accel_scale[i].bits);
+}
+
+static int fxos8700_get_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int *uscale)
+{
+ int i, ret, val;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+
+ if (t == FXOS8700_MAGN) {
+ *uscale = 1200; /* Magnetometer is locked at 1200uT */
+ return 0;
+ }
+
+ ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
+ *uscale = fxos8700_accel_scale[i].uscale;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
+ int axis, int *val)
+{
+ u8 base, reg;
+ int ret;
+ __le16 sample = 0;
+ enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
+
+ base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
+
+ /* Block read 6 bytes of device output registers to avoid data loss */
+ ret = regmap_bulk_read(data->regmap, base, data->buf,
+ FXOS8700_DATA_BUF_SIZE);
+ if (ret)
+ return ret;
+
+ /* Convert axis to buffer index */
+ reg = axis - IIO_MOD_X;
+
+ /* Composite individual axis MSB/LSB registers */
+ sample = ((u16 *)data->buf)[reg];
+
+ /* Convert to native endianness */
+ *val = sign_extend32(be16_to_cpu(sample), 15);
+
+ return 0;
+}
+
+static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int odr, int uodr)
+{
+ int i, ret, val;
+ bool active_mode;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ active_mode = val & FXOS8700_ACTIVE;
+
+ if (active_mode) {
+ /*
+ * The device must be in standby mode to change any of the
+ * other fields within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ val & ~FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < odr_num; i++)
+ if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ return regmap_update_bits(data->regmap,
+ FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
+ fxos8700_odr[i].bits << 3 | active_mode);
+}
+
+static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int *odr, int *uodr)
+{
+ int i, val, ret;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ val &= FXOS8700_CTRL_ODR_MSK;
+
+ for (i = 0; i < odr_num; i++)
+ if (val == fxos8700_odr[i].bits)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ *odr = fxos8700_odr[i].odr;
+ *uodr = fxos8700_odr[i].uodr;
+
+ return 0;
+}
+
+static int fxos8700_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ int ret;
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SCALE:
+ return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ break;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ default:
+ return -EINVAL;
+ }
+}
+
+static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
+static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
+
+static struct attribute *fxos8700_attrs[] = {
+ &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_accel_scale_available.dev_attr.attr,
+ &iio_const_attr_in_magn_scale_available.dev_attr.attr,
+ NULL,
+};
+
+static const struct attribute_group fxos8700_attrs_group = {
+ .attrs = fxos8700_attrs,
+};
+
+static const struct iio_info fxos8700_info = {
+ .read_raw = fxos8700_read_raw,
+ .write_raw = fxos8700_write_raw,
+ .attrs = &fxos8700_attrs_group,
+};
+
+static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
+{
+ int ret;
+ unsigned int val;
+ struct device *dev = regmap_get_device(data->regmap);
+
+ ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
+ if (ret) {
+ dev_err(dev, "Error reading chip id\n");
+ return ret;
+ }
+ if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
+ dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
+ val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
+ return -ENODEV;
+ }
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
+ if (ret)
+ return ret;
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
+ if (ret)
+ return ret;
+
+ /*
+ * The device must be in standby mode to change any of the other fields
+ * within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
+ if (ret)
+ return ret;
+ /* Set max oversample ratio (OSR) and both devices active */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
+ FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
+ if (ret)
+ return ret;
+ /* Disable and rst min/max measurements & threshold */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
+ FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
+ FXOS8700_MAXMIN_DIS);
+ if (ret)
+ return ret;
+ /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ /* Set for max full-scale range (+/-8G) */
+ ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static void fxos8700_chip_uninit(void *data)
+{
+ struct fxos8700_data *fxos8700_data = data;
+
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
+}
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi)
+{
+ struct iio_dev *indio_dev;
+ struct fxos8700_data *data;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ dev_set_drvdata(dev, indio_dev);
+ data->regmap = regmap;
+
+ ret = fxos8700_chip_init(data, use_spi);
+ if (ret)
+ return ret;
+
+ ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
+ if (ret)
+ return ret;
+
+ indio_dev->dev.parent = dev;
+ indio_dev->channels = fxos8700_channels;
+ indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
+ indio_dev->name = name ? name : "fxos8700";
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &fxos8700_info;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_GPL(fxos8700_core_probe);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
new file mode 100644
index 0000000..78ce2f9
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_i2c.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU, I2C bits
+ *
+ * Copyright (c) 2016, Freescale Corporation. TODO
+ *
+ * 7-bit I2C slave address determined by SA1 and SA0 logic level
+ * inputs represented in the following table:
+ * SA1 | SA0 | Slave Address
+ * 0 | 0 | 0x1E
+ * 0 | 1 | 0x1D
+ * 1 | 0 | 0x1C
+ * 1 | 1 | 0x1F
+ */
+#include <linux/acpi.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct regmap *regmap;
+ const char *name = NULL;
+
+ regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&client->dev, "Failed to register i2c regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ if (id)
+ name = id->name;
+
+ return fxos8700_core_probe(&client->dev, regmap, name, false);
+}
+
+static const struct i2c_device_id fxos8700_i2c_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "fsl,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct i2c_driver fxos8700_i2c_driver = {
+ .driver = {
+ .name = "fxos8700_i2c",
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = of_match_ptr(fxos8700_of_match),
+ },
+ .probe = fxos8700_i2c_probe,
+ .id_table = fxos8700_i2c_id,
+};
+module_i2c_driver(fxos8700_i2c_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 I2C driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
new file mode 100644
index 0000000..a35587a
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_spi.c
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - Freescale IMU, I2C bits
+ *
+ * Copyright (c) 2016, Freescale Corporation. TODO.
+ *
+ */
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_spi_probe(struct spi_device *spi)
+{
+ struct regmap *regmap;
+ const struct spi_device_id *id = spi_get_device_id(spi);
+
+ regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&spi->dev, "Failed to register spi regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+ return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
+}
+
+static const struct spi_device_id fxos8700_spi_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "fsl,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct spi_driver fxos8700_spi_driver = {
+ .probe = fxos8700_spi_probe,
+ .id_table = fxos8700_spi_id,
+ .driver = {
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = fxos8700_of_match,
+ .name = "fxos8700_spi",
+ },
+};
+module_spi_driver(fxos8700_spi_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 SPI driver");
+MODULE_LICENSE("GPL v2");
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-10 1:25 ` [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-10 13:23 ` Rob Herring
0 siblings, 0 replies; 24+ messages in thread
From: Rob Herring @ 2019-10-10 13:23 UTC (permalink / raw)
To: Robert Jones
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland,
open list:IIO SUBSYSTEM AND DRIVERS, devicetree
On Wed, Oct 9, 2019 at 8:25 PM Robert Jones <rjones@gateworks.com> wrote:
>
> This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> device-tree bindings.
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
> ---
> .../devicetree/bindings/iio/imu/fxos8700.yaml | 54 ++++++++++++++++++++++
Follow the compatible string name, so fsl,fxos8700.yaml.
> 1 file changed, 54 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
> new file mode 100644
> index 0000000..f0dbf4b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/imu/fxos8700.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale FXOS8700 Inertial Measurement Unit
> +
> +maintainers:
> + - Robert Jones <rjones@gateworks.com>
> +
> +description: |
> + Accelerometer and magnetometer combo device with an i2c interface.
Also has a SPI interface.
> + https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,fxos8700
For a new binding, shouldn't this be nxp instead of fsl?
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + maxItems: 1
'const: INT1' instead. However, having '-names' doesn't really buy
much when there is only 1 entry, so I'd just drop it.
But then I read the datasheet and there are 2 interrupts, so you need
to describe 2 interrupts.
> +
> + drive-open-drain:
> + maxItems: 1
Should be boolean.
> +
> + spi-max-frequency:
> + maxItems: 1
spi-max-frequency is not an array. You should define the maximum for it.
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fxos8700@1e {
> + compatible = "fsl,fxos8700";
> + reg = <0x1e>;
> +
> + interrupt-parent = <&gpio2>;
> + interrupts = <7 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "INT1";
> + };
> + };
> --
> 2.9.2
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/2] iio: imu: add support for FXOS8700
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 1:25 ` [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-10 1:25 ` [PATCH v2 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-10 17:56 ` Robert Jones
2019-10-10 17:56 ` [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
` (2 more replies)
2 siblings, 3 replies; 24+ messages in thread
From: Robert Jones @ 2019-10-10 17:56 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
- Document the FXOS8700 device tree binding.
- Implement basic iio driver support for FXOS8700
Changes in v2:
- Reorganized files to base imu directory
- Converted devicetree bindings doc to schema
- Moved single use function definitions out of header
- Added bit definitions and #define usages
- Moved buffer for regmap_bulk_read to private data struct
- Clarified get_data operations
- Remove unreachable code
- Remove log noise
- Remove of_match_ptr() macro usage
- Various style and whitespace changes
Changes in v3:
- Refactored Freescale mentions to NXP, including compatible string
- Removed missed files from reorganization to base imu directory
- Removed Kconfig source command to now nonexistent directory
- Fixed devicetree binding properties definitions
- Added SPI example to devicetree documentation
Robert Jones (2):
dt-bindings: iio: imu: add fxos8700 imu binding
iio: imu: Add support for the FXOS8700 IMU
.../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 69 +++
drivers/iio/imu/Kconfig | 27 ++
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 185 ++++++++
drivers/iio/imu/fxos8700_core.c | 499 +++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 71 +++
drivers/iio/imu/fxos8700_spi.c | 59 +++
7 files changed, 915 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
--
2.9.2
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
@ 2019-10-10 17:56 ` Robert Jones
2019-10-11 13:58 ` Rob Herring
2019-10-10 17:56 ` [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-14 18:49 ` [PATCH v4 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-10-10 17:56 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
device-tree bindings.
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
.../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 69 ++++++++++++++++++++++
1 file changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
new file mode 100644
index 0000000..d33a1cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale FXOS8700 Inertial Measurement Unit
+
+maintainers:
+ - Robert Jones <rjones@gateworks.com>
+
+description: |
+ Accelerometer and magnetometer combo device with an i2c and SPI interface.
+ https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
+
+properties:
+ compatible:
+ enum:
+ - nxp,fxos8700
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 2
+
+ interrupt-names:
+ maxItems: 2
+ items:
+ - const: INT1
+ - const: INT2
+
+ drive-open-drain:
+ type: boolean
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fxos8700@1e {
+ compatible = "nxp,fxos8700";
+ reg = <0x1e>;
+
+ interrupt-parent = <&gpio2>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "INT1";
+ };
+ };
+ - |
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fxos8700@1e {
+ compatible = "nxp,fxos8700";
+ reg = <0x1e>;
+
+ interrupt-parent = <&gpio2>;
+ spi-max-frequency = <1000000>
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "INT1";
+ };
+ };
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 17:56 ` [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-10 17:56 ` Robert Jones
2019-10-12 13:53 ` Jonathan Cameron
2019-10-14 18:49 ` [PATCH v4 0/2] iio: imu: add support for FXOS8700 Robert Jones
2 siblings, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-10-10 17:56 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
magnetometer combined into a single package. The device features a
selectable I2C or point-to-point SPI serial interface with 14-bit
accelerometer and 16-bit magnetometer ADC resolution along with
smart-embedded functions.
FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
for each sensor. Interleaved magnetic and acceleration data is available
at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
package and it is guaranteed to operate over the extended temperature
range of –40 °C to +85 °C.
TODO: Trigger and IRQ configuration support
Datasheet:
http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
drivers/iio/imu/Kconfig | 27 +++
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 185 +++++++++++++++
drivers/iio/imu/fxos8700_core.c | 499 ++++++++++++++++++++++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 71 ++++++
drivers/iio/imu/fxos8700_spi.c | 59 +++++
6 files changed, 846 insertions(+)
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
index f3c7282..60bb102 100644
--- a/drivers/iio/imu/Kconfig
+++ b/drivers/iio/imu/Kconfig
@@ -40,6 +40,33 @@ config ADIS16480
source "drivers/iio/imu/bmi160/Kconfig"
+config FXOS8700
+ tristate
+
+config FXOS8700_I2C
+ tristate "NXP FXOS8700 I2C driver"
+ depends on I2C
+ select FXOS8700
+ select REGMAP_I2C
+ help
+ Say yes here to build support for the NXP FXOS8700 m+g combo
+ sensor on I2C.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_i2c.
+
+config FXOS8700_SPI
+ tristate "NXP FXOS8700 SPI driver"
+ depends on SPI
+ select FXOS8700
+ select REGMAP_SPI
+ help
+ Say yes here to build support for the NXP FXOS8700 m+g combo
+ sensor on SPI.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_spi.
+
config KMX61
tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
depends on I2C
diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
index 4a69588..5237fd4 100644
--- a/drivers/iio/imu/Makefile
+++ b/drivers/iio/imu/Makefile
@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
obj-y += bmi160/
+
+obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
+
obj-y += inv_mpu6050/
obj-$(CONFIG_KMX61) += kmx61.o
diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
new file mode 100644
index 0000000..92499a2
--- /dev/null
+++ b/drivers/iio/imu/fxos8700.h
@@ -0,0 +1,185 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef FXOS8700_H_
+#define FXOS8700_H_
+
+extern const struct regmap_config fxos8700_regmap_config;
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi);
+
+/* Register Definitions */
+#define FXOS8700_STATUS 0x00
+#define FXOS8700_OUT_X_MSB 0x01
+#define FXOS8700_OUT_X_LSB 0x02
+#define FXOS8700_OUT_Y_MSB 0x03
+#define FXOS8700_OUT_Y_LSB 0x04
+#define FXOS8700_OUT_Z_MSB 0x05
+#define FXOS8700_OUT_Z_LSB 0x06
+#define FXOS8700_F_SETUP 0x09
+#define FXOS8700_TRIG_CFG 0x0a
+#define FXOS8700_SYSMOD 0x0b
+#define FXOS8700_INT_SOURCE 0x0c
+#define FXOS8700_WHO_AM_I 0x0d
+#define FXOS8700_XYZ_DATA_CFG 0x0e
+#define FXOS8700_HP_FILTER_CUTOFF 0x0f
+#define FXOS8700_PL_STATUS 0x10
+#define FXOS8700_PL_CFG 0x11
+#define FXOS8700_PL_COUNT 0x12
+#define FXOS8700_PL_BF_ZCOMP 0x13
+#define FXOS8700_PL_THS_REG 0x14
+#define FXOS8700_A_FFMT_CFG 0x15
+#define FXOS8700_A_FFMT_SRC 0x16
+#define FXOS8700_A_FFMT_THS 0x17
+#define FXOS8700_A_FFMT_COUNT 0x18
+#define FXOS8700_TRANSIENT_CFG 0x1d
+#define FXOS8700_TRANSIENT_SRC 0x1e
+#define FXOS8700_TRANSIENT_THS 0x1f
+#define FXOS8700_TRANSIENT_COUNT 0x20
+#define FXOS8700_PULSE_CFG 0x21
+#define FXOS8700_PULSE_SRC 0x22
+#define FXOS8700_PULSE_THSX 0x23
+#define FXOS8700_PULSE_THSY 0x24
+#define FXOS8700_PULSE_THSZ 0x25
+#define FXOS8700_PULSE_TMLT 0x26
+#define FXOS8700_PULSE_LTCY 0x27
+#define FXOS8700_PULSE_WIND 0x28
+#define FXOS8700_ASLP_COUNT 0x29
+#define FXOS8700_CTRL_REG1 0x2a
+#define FXOS8700_CTRL_REG2 0x2b
+#define FXOS8700_CTRL_REG3 0x2c
+#define FXOS8700_CTRL_REG4 0x2d
+#define FXOS8700_CTRL_REG5 0x2e
+#define FXOS8700_OFF_X 0x2f
+#define FXOS8700_OFF_Y 0x30
+#define FXOS8700_OFF_Z 0x31
+#define FXOS8700_M_DR_STATUS 0x32
+#define FXOS8700_M_OUT_X_MSB 0x33
+#define FXOS8700_M_OUT_X_LSB 0x34
+#define FXOS8700_M_OUT_Y_MSB 0x35
+#define FXOS8700_M_OUT_Y_LSB 0x36
+#define FXOS8700_M_OUT_Z_MSB 0x37
+#define FXOS8700_M_OUT_Z_LSB 0x38
+#define FXOS8700_CMP_X_MSB 0x39
+#define FXOS8700_CMP_X_LSB 0x3a
+#define FXOS8700_CMP_Y_MSB 0x3b
+#define FXOS8700_CMP_Y_LSB 0x3c
+#define FXOS8700_CMP_Z_MSB 0x3d
+#define FXOS8700_CMP_Z_LSB 0x3e
+#define FXOS8700_M_OFF_X_MSB 0x3f
+#define FXOS8700_M_OFF_X_LSB 0x40
+#define FXOS8700_M_OFF_Y_MSB 0x41
+#define FXOS8700_M_OFF_Y_LSB 0x42
+#define FXOS8700_M_OFF_Z_MSB 0x43
+#define FXOS8700_M_OFF_Z_LSB 0x44
+#define FXOS8700_MAX_X_MSB 0x45
+#define FXOS8700_MAX_X_LSB 0x46
+#define FXOS8700_MAX_Y_MSB 0x47
+#define FXOS8700_MAX_Y_LSB 0x48
+#define FXOS8700_MAX_Z_MSB 0x49
+#define FXOS8700_MAX_Z_LSB 0x4a
+#define FXOS8700_MIN_X_MSB 0x4b
+#define FXOS8700_MIN_X_LSB 0x4c
+#define FXOS8700_MIN_Y_MSB 0x4d
+#define FXOS8700_MIN_Y_LSB 0x4e
+#define FXOS8700_MIN_Z_MSB 0x4f
+#define FXOS8700_MIN_Z_LSB 0x50
+#define FXOS8700_TEMP 0x51
+#define FXOS8700_M_THS_CFG 0x52
+#define FXOS8700_M_THS_SRC 0x53
+#define FXOS8700_M_THS_X_MSB 0x54
+#define FXOS8700_M_THS_X_LSB 0x55
+#define FXOS8700_M_THS_Y_MSB 0x56
+#define FXOS8700_M_THS_Y_LSB 0x57
+#define FXOS8700_M_THS_Z_MSB 0x58
+#define FXOS8700_M_THS_Z_LSB 0x59
+#define FXOS8700_M_THS_COUNT 0x5a
+#define FXOS8700_M_CTRL_REG1 0x5b
+#define FXOS8700_M_CTRL_REG2 0x5c
+#define FXOS8700_M_CTRL_REG3 0x5d
+#define FXOS8700_M_INT_SRC 0x5e
+#define FXOS8700_A_VECM_CFG 0x5f
+#define FXOS8700_A_VECM_THS_MSB 0x60
+#define FXOS8700_A_VECM_THS_LSB 0x61
+#define FXOS8700_A_VECM_CNT 0x62
+#define FXOS8700_A_VECM_INITX_MSB 0x63
+#define FXOS8700_A_VECM_INITX_LSB 0x64
+#define FXOS8700_A_VECM_INITY_MSB 0x65
+#define FXOS8700_A_VECM_INITY_LSB 0x66
+#define FXOS8700_A_VECM_INITZ_MSB 0x67
+#define FXOS8700_A_VECM_INITZ_LSB 0x68
+#define FXOS8700_M_VECM_CFG 0x69
+#define FXOS8700_M_VECM_THS_MSB 0x6a
+#define FXOS8700_M_VECM_THS_LSB 0x6b
+#define FXOS8700_M_VECM_CNT 0x6c
+#define FXOS8700_M_VECM_INITX_MSB 0x6d
+#define FXOS8700_M_VECM_INITX_LSB 0x6e
+#define FXOS8700_M_VECM_INITY_MSB 0x6f
+#define FXOS8700_M_VECM_INITY_LSB 0x70
+#define FXOS8700_M_VECM_INITZ_MSB 0x71
+#define FXOS8700_M_VECM_INITZ_LSB 0x72
+#define FXOS8700_A_FFMT_THS_X_MSB 0x73
+#define FXOS8700_A_FFMT_THS_X_LSB 0x74
+#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
+#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
+#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
+#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
+#define FXOS8700_A_TRAN_INIT_MSB 0x79
+#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
+#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
+#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
+#define FXOS8700_TM_NVM_LOCK 0x7e
+#define FXOS8700_NVM_DATA0_35 0x80
+#define FXOS8700_NVM_DATA_BNK3 0xa4
+#define FXOS8700_NVM_DATA_BNK2 0xa5
+#define FXOS8700_NVM_DATA_BNK1 0xa6
+#define FXOS8700_NVM_DATA_BNK0 0xa7
+
+/* Bit definitions for FXOS8700_M_CTRL_REG1 */
+#define FXOS8700_HMS_MASK GENMASK(1, 0)
+#define FXOS8700_OS_MASK GENMASK(4, 2)
+
+/* Bit definitions for FXOS8700_M_CTRL_REG2 */
+#define FXOS8700_MAXMIN_RST BIT(2)
+#define FXOS8700_MAXMIN_DIS_THS BIT(3)
+#define FXOS8700_MAXMIN_DIS BIT(4)
+
+#define SENSOR_IOCTL_BASE 'S'
+#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
+#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
+#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
+#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
+#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
+#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
+
+#define FXOS8700_I2C_ADDR 0x1E
+#define FXOS8700_DEVICE_ID 0xC7
+#define FXOS8700_PRE_DEVICE_ID 0xC4
+#define FXOS8700_DATA_BUF_SIZE 6
+#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
+#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
+
+#define FXOS8700_TYPE_ACC 0x00
+#define FXOS8700_TYPE_MAG 0x01
+#define FXOS8700_STANDBY 0x00
+#define FXOS8700_ACTIVE 0x01
+#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
+
+#define ABS_STATUS ABS_WHEEL
+#define FXOS8700_DRIVER "fxos8700"
+
+#define ABSMAX_ACC_VAL 0x01FF
+#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
+#define FXOS8700_POLL_INTERVAL 400
+#define FXOS8700_POLL_MAX 800
+#define FXOS8700_POLL_MIN 100
+#define FXOS8700_CTRL_ODR_MSK 0x38
+#define FXOS8700_CTRL_ODR_MAX 0x00
+#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
+
+enum {
+ MODE_2G = 0,
+ MODE_4G,
+ MODE_8G,
+};
+
+#endif /* FXOS8700_H_ */
diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
new file mode 100644
index 0000000..ea2716b
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
+ *
+ * IIO core driver for FXOS8700, with support for I2C/SPI busses
+ *
+ * TODO: Buffer, trigger, and IRQ support
+ */
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/acpi.h>
+#include <linux/bitops.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+
+#include "fxos8700.h"
+
+struct fxos8700_data {
+ struct regmap *regmap;
+ struct iio_trigger *trig;
+ u8 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
+};
+
+/* Regmap info */
+static const struct regmap_range read_range[] = {
+ {
+ .range_min = FXOS8700_STATUS,
+ .range_max = FXOS8700_A_FFMT_COUNT,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_range write_range[] = {
+ {
+ .range_min = FXOS8700_F_SETUP,
+ .range_max = FXOS8700_TRIG_CFG,
+ }, {
+ .range_min = FXOS8700_XYZ_DATA_CFG,
+ .range_max = FXOS8700_HP_FILTER_CUTOFF,
+ }, {
+ .range_min = FXOS8700_PL_CFG,
+ .range_max = FXOS8700_A_FFMT_CFG,
+ }, {
+ .range_min = FXOS8700_A_FFMT_THS,
+ .range_max = FXOS8700_TRANSIENT_CFG,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_THS,
+ .range_max = FXOS8700_PULSE_CFG,
+ }, {
+ .range_min = FXOS8700_PULSE_THSX,
+ .range_max = FXOS8700_OFF_Z,
+ }, {
+ .range_min = FXOS8700_M_OFF_X_MSB,
+ .range_max = FXOS8700_M_OFF_Z_LSB,
+ }, {
+ .range_min = FXOS8700_M_THS_CFG,
+ .range_max = FXOS8700_M_THS_CFG,
+ }, {
+ .range_min = FXOS8700_M_THS_X_MSB,
+ .range_max = FXOS8700_M_CTRL_REG3,
+ }, {
+ .range_min = FXOS8700_A_VECM_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_access_table driver_read_table = {
+ .yes_ranges = read_range,
+ .n_yes_ranges = ARRAY_SIZE(read_range),
+};
+
+static const struct regmap_access_table driver_write_table = {
+ .yes_ranges = write_range,
+ .n_yes_ranges = ARRAY_SIZE(write_range),
+};
+
+const struct regmap_config fxos8700_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = FXOS8700_NVM_DATA_BNK0,
+ .rd_table = &driver_read_table,
+ .wr_table = &driver_write_table,
+};
+EXPORT_SYMBOL(fxos8700_regmap_config);
+
+#define FXOS8700_CHANNEL(_type, _axis) { \
+ .type = _type, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##_axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ), \
+}
+
+/* scan indexes follow DATA register order */
+enum fxos8700_scan_axis {
+ FXOS8700_SCAN_ACCEL_X = 0,
+ FXOS8700_SCAN_ACCEL_Y,
+ FXOS8700_SCAN_ACCEL_Z,
+ FXOS8700_SCAN_MAGN_X,
+ FXOS8700_SCAN_MAGN_Y,
+ FXOS8700_SCAN_MAGN_Z,
+ FXOS8700_SCAN_RHALL,
+ FXOS8700_SCAN_TIMESTAMP,
+};
+
+enum fxos8700_sensor {
+ FXOS8700_ACCEL = 0,
+ FXOS8700_MAGN,
+ FXOS8700_NUM_SENSORS /* must be last */
+};
+
+enum fxos8700_int_pin {
+ FXOS8700_PIN_INT1,
+ FXOS8700_PIN_INT2
+};
+
+struct fxos8700_scale {
+ u8 bits;
+ int uscale;
+};
+
+struct fxos8700_odr {
+ u8 bits;
+ int odr;
+ int uodr;
+};
+
+static const struct fxos8700_scale fxos8700_accel_scale[] = {
+ { MODE_2G, 244},
+ { MODE_4G, 488},
+ { MODE_8G, 976},
+};
+
+/*
+ * Accellerometer and magnetometer have the same ODR options, set in the
+ * CTRL_REG1 register. ODR is halved when using both sensors at once in
+ * hybrid mode.
+ */
+static const struct fxos8700_odr fxos8700_odr[] = {
+ {0x00, 800, 0},
+ {0x01, 400, 0},
+ {0x02, 200, 0},
+ {0x03, 100, 0},
+ {0x04, 50, 0},
+ {0x05, 12, 500000},
+ {0x06, 6, 250000},
+ {0x07, 1, 562500},
+};
+
+static const struct iio_chan_spec fxos8700_channels[] = {
+ FXOS8700_CHANNEL(IIO_ACCEL, X),
+ FXOS8700_CHANNEL(IIO_ACCEL, Y),
+ FXOS8700_CHANNEL(IIO_ACCEL, Z),
+ FXOS8700_CHANNEL(IIO_MAGN, X),
+ FXOS8700_CHANNEL(IIO_MAGN, Y),
+ FXOS8700_CHANNEL(IIO_MAGN, Z),
+ IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
+};
+
+static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
+{
+ switch (iio_type) {
+ case IIO_ACCEL:
+ return FXOS8700_ACCEL;
+ case IIO_ANGL_VEL:
+ return FXOS8700_MAGN;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_set_active_mode(struct fxos8700_data *data,
+ enum fxos8700_sensor t, bool mode)
+{
+ int ret;
+
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
+ if (ret)
+ return ret;
+
+ usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
+ FXOS8700_ACTIVE_MIN_USLEEP + 1000);
+
+ return 0;
+}
+
+static int fxos8700_set_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int uscale)
+{
+ int i;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+ struct device *dev = regmap_get_device(data->regmap);
+
+ if (t == FXOS8700_MAGN) {
+ dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].uscale == uscale)
+ break;
+
+ if (i == scale_num)
+ return -EINVAL;
+
+ return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
+ fxos8700_accel_scale[i].bits);
+}
+
+static int fxos8700_get_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int *uscale)
+{
+ int i, ret, val;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+
+ if (t == FXOS8700_MAGN) {
+ *uscale = 1200; /* Magnetometer is locked at 1200uT */
+ return 0;
+ }
+
+ ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
+ *uscale = fxos8700_accel_scale[i].uscale;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
+ int axis, int *val)
+{
+ u8 base, reg;
+ int ret;
+ __le16 sample = 0;
+ enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
+
+ base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
+
+ /* Block read 6 bytes of device output registers to avoid data loss */
+ ret = regmap_bulk_read(data->regmap, base, data->buf,
+ FXOS8700_DATA_BUF_SIZE);
+ if (ret)
+ return ret;
+
+ /* Convert axis to buffer index */
+ reg = axis - IIO_MOD_X;
+
+ /* Composite individual axis MSB/LSB registers */
+ sample = ((u16 *)data->buf)[reg];
+
+ /* Convert to native endianness */
+ *val = sign_extend32(be16_to_cpu(sample), 15);
+
+ return 0;
+}
+
+static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int odr, int uodr)
+{
+ int i, ret, val;
+ bool active_mode;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ active_mode = val & FXOS8700_ACTIVE;
+
+ if (active_mode) {
+ /*
+ * The device must be in standby mode to change any of the
+ * other fields within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ val & ~FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < odr_num; i++)
+ if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ return regmap_update_bits(data->regmap,
+ FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
+ fxos8700_odr[i].bits << 3 | active_mode);
+}
+
+static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int *odr, int *uodr)
+{
+ int i, val, ret;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ val &= FXOS8700_CTRL_ODR_MSK;
+
+ for (i = 0; i < odr_num; i++)
+ if (val == fxos8700_odr[i].bits)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ *odr = fxos8700_odr[i].odr;
+ *uodr = fxos8700_odr[i].uodr;
+
+ return 0;
+}
+
+static int fxos8700_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ int ret;
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SCALE:
+ return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ break;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ default:
+ return -EINVAL;
+ }
+}
+
+static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
+static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
+
+static struct attribute *fxos8700_attrs[] = {
+ &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_accel_scale_available.dev_attr.attr,
+ &iio_const_attr_in_magn_scale_available.dev_attr.attr,
+ NULL,
+};
+
+static const struct attribute_group fxos8700_attrs_group = {
+ .attrs = fxos8700_attrs,
+};
+
+static const struct iio_info fxos8700_info = {
+ .read_raw = fxos8700_read_raw,
+ .write_raw = fxos8700_write_raw,
+ .attrs = &fxos8700_attrs_group,
+};
+
+static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
+{
+ int ret;
+ unsigned int val;
+ struct device *dev = regmap_get_device(data->regmap);
+
+ ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
+ if (ret) {
+ dev_err(dev, "Error reading chip id\n");
+ return ret;
+ }
+ if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
+ dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
+ val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
+ return -ENODEV;
+ }
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
+ if (ret)
+ return ret;
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
+ if (ret)
+ return ret;
+
+ /*
+ * The device must be in standby mode to change any of the other fields
+ * within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
+ if (ret)
+ return ret;
+ /* Set max oversample ratio (OSR) and both devices active */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
+ FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
+ if (ret)
+ return ret;
+ /* Disable and rst min/max measurements & threshold */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
+ FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
+ FXOS8700_MAXMIN_DIS);
+ if (ret)
+ return ret;
+ /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ /* Set for max full-scale range (+/-8G) */
+ ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static void fxos8700_chip_uninit(void *data)
+{
+ struct fxos8700_data *fxos8700_data = data;
+
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
+}
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi)
+{
+ struct iio_dev *indio_dev;
+ struct fxos8700_data *data;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ dev_set_drvdata(dev, indio_dev);
+ data->regmap = regmap;
+
+ ret = fxos8700_chip_init(data, use_spi);
+ if (ret)
+ return ret;
+
+ ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
+ if (ret)
+ return ret;
+
+ indio_dev->dev.parent = dev;
+ indio_dev->channels = fxos8700_channels;
+ indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
+ indio_dev->name = name ? name : "fxos8700";
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &fxos8700_info;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_GPL(fxos8700_core_probe);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
new file mode 100644
index 0000000..73a5f91
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_i2c.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU, I2C bits
+ *
+ * 7-bit I2C slave address determined by SA1 and SA0 logic level
+ * inputs represented in the following table:
+ * SA1 | SA0 | Slave Address
+ * 0 | 0 | 0x1E
+ * 0 | 1 | 0x1D
+ * 1 | 0 | 0x1C
+ * 1 | 1 | 0x1F
+ */
+#include <linux/acpi.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct regmap *regmap;
+ const char *name = NULL;
+
+ regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&client->dev, "Failed to register i2c regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ if (id)
+ name = id->name;
+
+ return fxos8700_core_probe(&client->dev, regmap, name, false);
+}
+
+static const struct i2c_device_id fxos8700_i2c_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "nxp,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct i2c_driver fxos8700_i2c_driver = {
+ .driver = {
+ .name = "fxos8700_i2c",
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = of_match_ptr(fxos8700_of_match),
+ },
+ .probe = fxos8700_i2c_probe,
+ .id_table = fxos8700_i2c_id,
+};
+module_i2c_driver(fxos8700_i2c_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 I2C driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
new file mode 100644
index 0000000..412ff08
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_spi.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU, I2C bits
+ *
+ */
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_spi_probe(struct spi_device *spi)
+{
+ struct regmap *regmap;
+ const struct spi_device_id *id = spi_get_device_id(spi);
+
+ regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&spi->dev, "Failed to register spi regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+ return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
+}
+
+static const struct spi_device_id fxos8700_spi_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "nxp,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct spi_driver fxos8700_spi_driver = {
+ .probe = fxos8700_spi_probe,
+ .id_table = fxos8700_spi_id,
+ .driver = {
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = fxos8700_of_match,
+ .name = "fxos8700_spi",
+ },
+};
+module_spi_driver(fxos8700_spi_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 SPI driver");
+MODULE_LICENSE("GPL v2");
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-10 17:56 ` [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-11 13:58 ` Rob Herring
2019-10-11 23:33 ` Bobby Jones
0 siblings, 1 reply; 24+ messages in thread
From: Rob Herring @ 2019-10-11 13:58 UTC (permalink / raw)
To: Robert Jones
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland, linux-iio, devicetree
On Thu, Oct 10, 2019 at 10:56:47AM -0700, Robert Jones wrote:
> This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> device-tree bindings.
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
> ---
> .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 69 ++++++++++++++++++++++
> 1 file changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> new file mode 100644
> index 0000000..d33a1cc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml: $id:
path/filename 'iio/imu/fxos8700.yaml' doesn't match actual filename
Test your binding with 'make dt_binding_check'.
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale FXOS8700 Inertial Measurement Unit
> +
> +maintainers:
> + - Robert Jones <rjones@gateworks.com>
> +
> +description: |
> + Accelerometer and magnetometer combo device with an i2c and SPI interface.
> + https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
> +
> +properties:
> + compatible:
> + enum:
> + - nxp,fxos8700
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 2
> +
> + interrupt-names:
> + maxItems: 2
> + items:
> + - const: INT1
> + - const: INT2
This doesn't match the example now. You need 'minItems: 1' if you need
to support 1 or 2 interrupts. If it can be either one, then you need:
items:
enum: [ INT1, INT2 ]
> +
> + drive-open-drain:
> + type: boolean
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fxos8700@1e {
> + compatible = "nxp,fxos8700";
> + reg = <0x1e>;
> +
> + interrupt-parent = <&gpio2>;
> + interrupts = <7 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "INT1";
> + };
> + };
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fxos8700@1e {
> + compatible = "nxp,fxos8700";
> + reg = <0x1e>;
I guess you could have SPI chip select # 30...
> +
> + interrupt-parent = <&gpio2>;
> + spi-max-frequency = <1000000>
> + interrupts = <7 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "INT1";
> + };
> + };
> --
> 2.9.2
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-11 13:58 ` Rob Herring
@ 2019-10-11 23:33 ` Bobby Jones
2019-10-14 13:37 ` Rob Herring
0 siblings, 1 reply; 24+ messages in thread
From: Bobby Jones @ 2019-10-11 23:33 UTC (permalink / raw)
To: Rob Herring
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland, linux-iio, devicetree
On Fri, Oct 11, 2019 at 6:58 AM Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Oct 10, 2019 at 10:56:47AM -0700, Robert Jones wrote:
> > This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> > device-tree bindings.
> >
> > Signed-off-by: Robert Jones <rjones@gateworks.com>
> > ---
> > .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 69 ++++++++++++++++++++++
> > 1 file changed, 69 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> > new file mode 100644
> > index 0000000..d33a1cc
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> > @@ -0,0 +1,69 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
>
> Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml: $id:
> path/filename 'iio/imu/fxos8700.yaml' doesn't match actual filename
>
> Test your binding with 'make dt_binding_check'.
Sorry about that, I had tried running that check previously but was
struggling through some python environment/set-up problems.
Additionally I did not realize that my path was incomplete until I
read your github's readme line "Ensure ~/.local/bin is in the PATH". I
don't utilize the python install on my machine frequently so I'm not
sure if that should be obvious. It might be helpful to have that line
in the Documentation/devicetree/writing-schema.md as well.
Anyways I've got it running now.
>
>
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Freescale FXOS8700 Inertial Measurement Unit
> > +
> > +maintainers:
> > + - Robert Jones <rjones@gateworks.com>
> > +
> > +description: |
> > + Accelerometer and magnetometer combo device with an i2c and SPI interface.
> > + https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - nxp,fxos8700
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 2
> > +
> > + interrupt-names:
> > + maxItems: 2
> > + items:
> > + - const: INT1
> > + - const: INT2
>
> This doesn't match the example now. You need 'minItems: 1' if you need
> to support 1 or 2 interrupts. If it can be either one, then you need:
>
> items:
> enum: [ INT1, INT2 ]
I'm trying to compare against other .yaml examples in the tree but
without scouring datasheets to find a device with similar interrupt
capabilities I'm just guessing at how this should be defined.
The device has 2 interrupt pins as you've read (INT1 and INT2), and
0-2 of them can be used depending on what's been configured. Given
what you've explained so far would this be the proper definition?:
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
minItems: 1
maxItems: 2
items:
enum:
- INT1
- INT2
Thanks
>
> > +
> > + drive-open-drain:
> > + type: boolean
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +examples:
> > + - |
> > + i2c {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + fxos8700@1e {
> > + compatible = "nxp,fxos8700";
> > + reg = <0x1e>;
> > +
> > + interrupt-parent = <&gpio2>;
> > + interrupts = <7 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "INT1";
> > + };
> > + };
> > + - |
> > + spi {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + fxos8700@1e {
> > + compatible = "nxp,fxos8700";
> > + reg = <0x1e>;
>
> I guess you could have SPI chip select # 30...
Absolutely, and definitely not a hasty copy and paste error :)
>
> > +
> > + interrupt-parent = <&gpio2>;
> > + spi-max-frequency = <1000000>
> > + interrupts = <7 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "INT1";
> > + };
> > + };
> > --
> > 2.9.2
> >
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-10 17:56 ` [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-12 13:53 ` Jonathan Cameron
2019-10-14 18:33 ` Bobby Jones
0 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron @ 2019-10-12 13:53 UTC (permalink / raw)
To: Robert Jones
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree
On Thu, 10 Oct 2019 10:56:48 -0700
Robert Jones <rjones@gateworks.com> wrote:
> FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
> magnetometer combined into a single package. The device features a
> selectable I2C or point-to-point SPI serial interface with 14-bit
> accelerometer and 16-bit magnetometer ADC resolution along with
> smart-embedded functions.
>
> FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
> ±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
> Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
> for each sensor. Interleaved magnetic and acceleration data is available
> at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
> package and it is guaranteed to operate over the extended temperature
> range of –40 °C to +85 °C.
>
> TODO: Trigger and IRQ configuration support
>
> Datasheet:
> http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
Mostly looks good. A few remaining bits inline.
The endian types seems to have gotten very confused!
Jonathan
> ---
> drivers/iio/imu/Kconfig | 27 +++
> drivers/iio/imu/Makefile | 5 +
> drivers/iio/imu/fxos8700.h | 185 +++++++++++++++
> drivers/iio/imu/fxos8700_core.c | 499 ++++++++++++++++++++++++++++++++++++++++
> drivers/iio/imu/fxos8700_i2c.c | 71 ++++++
> drivers/iio/imu/fxos8700_spi.c | 59 +++++
> 6 files changed, 846 insertions(+)
> create mode 100644 drivers/iio/imu/fxos8700.h
> create mode 100644 drivers/iio/imu/fxos8700_core.c
> create mode 100644 drivers/iio/imu/fxos8700_i2c.c
> create mode 100644 drivers/iio/imu/fxos8700_spi.c
>
> diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
> index f3c7282..60bb102 100644
> --- a/drivers/iio/imu/Kconfig
> +++ b/drivers/iio/imu/Kconfig
> @@ -40,6 +40,33 @@ config ADIS16480
>
> source "drivers/iio/imu/bmi160/Kconfig"
>
> +config FXOS8700
> + tristate
> +
> +config FXOS8700_I2C
> + tristate "NXP FXOS8700 I2C driver"
> + depends on I2C
> + select FXOS8700
> + select REGMAP_I2C
> + help
> + Say yes here to build support for the NXP FXOS8700 m+g combo
> + sensor on I2C.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_i2c.
> +
> +config FXOS8700_SPI
> + tristate "NXP FXOS8700 SPI driver"
> + depends on SPI
> + select FXOS8700
> + select REGMAP_SPI
> + help
> + Say yes here to build support for the NXP FXOS8700 m+g combo
> + sensor on SPI.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_spi.
> +
> config KMX61
> tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
> depends on I2C
> diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
> index 4a69588..5237fd4 100644
> --- a/drivers/iio/imu/Makefile
> +++ b/drivers/iio/imu/Makefile
> @@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
> obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
>
> obj-y += bmi160/
> +
> +obj-$(CONFIG_FXOS8700) += fxos8700_core.o
> +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
> +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
> +
> obj-y += inv_mpu6050/
>
> obj-$(CONFIG_KMX61) += kmx61.o
> diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
> new file mode 100644
> index 0000000..92499a2
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700.h
> @@ -0,0 +1,185 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef FXOS8700_H_
> +#define FXOS8700_H_
> +
> +extern const struct regmap_config fxos8700_regmap_config;
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi);
> +
> +/* Register Definitions */
If register definitions are only used in one c file, move them there
rather than exposing the in the header.
> +#define FXOS8700_STATUS 0x00
> +#define FXOS8700_OUT_X_MSB 0x01
> +#define FXOS8700_OUT_X_LSB 0x02
> +#define FXOS8700_OUT_Y_MSB 0x03
> +#define FXOS8700_OUT_Y_LSB 0x04
> +#define FXOS8700_OUT_Z_MSB 0x05
> +#define FXOS8700_OUT_Z_LSB 0x06
> +#define FXOS8700_F_SETUP 0x09
> +#define FXOS8700_TRIG_CFG 0x0a
> +#define FXOS8700_SYSMOD 0x0b
> +#define FXOS8700_INT_SOURCE 0x0c
> +#define FXOS8700_WHO_AM_I 0x0d
> +#define FXOS8700_XYZ_DATA_CFG 0x0e
> +#define FXOS8700_HP_FILTER_CUTOFF 0x0f
> +#define FXOS8700_PL_STATUS 0x10
> +#define FXOS8700_PL_CFG 0x11
> +#define FXOS8700_PL_COUNT 0x12
> +#define FXOS8700_PL_BF_ZCOMP 0x13
> +#define FXOS8700_PL_THS_REG 0x14
> +#define FXOS8700_A_FFMT_CFG 0x15
> +#define FXOS8700_A_FFMT_SRC 0x16
> +#define FXOS8700_A_FFMT_THS 0x17
> +#define FXOS8700_A_FFMT_COUNT 0x18
> +#define FXOS8700_TRANSIENT_CFG 0x1d
> +#define FXOS8700_TRANSIENT_SRC 0x1e
> +#define FXOS8700_TRANSIENT_THS 0x1f
> +#define FXOS8700_TRANSIENT_COUNT 0x20
> +#define FXOS8700_PULSE_CFG 0x21
> +#define FXOS8700_PULSE_SRC 0x22
> +#define FXOS8700_PULSE_THSX 0x23
> +#define FXOS8700_PULSE_THSY 0x24
> +#define FXOS8700_PULSE_THSZ 0x25
> +#define FXOS8700_PULSE_TMLT 0x26
> +#define FXOS8700_PULSE_LTCY 0x27
> +#define FXOS8700_PULSE_WIND 0x28
> +#define FXOS8700_ASLP_COUNT 0x29
> +#define FXOS8700_CTRL_REG1 0x2a
> +#define FXOS8700_CTRL_REG2 0x2b
> +#define FXOS8700_CTRL_REG3 0x2c
> +#define FXOS8700_CTRL_REG4 0x2d
> +#define FXOS8700_CTRL_REG5 0x2e
> +#define FXOS8700_OFF_X 0x2f
> +#define FXOS8700_OFF_Y 0x30
> +#define FXOS8700_OFF_Z 0x31
> +#define FXOS8700_M_DR_STATUS 0x32
> +#define FXOS8700_M_OUT_X_MSB 0x33
> +#define FXOS8700_M_OUT_X_LSB 0x34
> +#define FXOS8700_M_OUT_Y_MSB 0x35
> +#define FXOS8700_M_OUT_Y_LSB 0x36
> +#define FXOS8700_M_OUT_Z_MSB 0x37
> +#define FXOS8700_M_OUT_Z_LSB 0x38
> +#define FXOS8700_CMP_X_MSB 0x39
> +#define FXOS8700_CMP_X_LSB 0x3a
> +#define FXOS8700_CMP_Y_MSB 0x3b
> +#define FXOS8700_CMP_Y_LSB 0x3c
> +#define FXOS8700_CMP_Z_MSB 0x3d
> +#define FXOS8700_CMP_Z_LSB 0x3e
> +#define FXOS8700_M_OFF_X_MSB 0x3f
> +#define FXOS8700_M_OFF_X_LSB 0x40
> +#define FXOS8700_M_OFF_Y_MSB 0x41
> +#define FXOS8700_M_OFF_Y_LSB 0x42
> +#define FXOS8700_M_OFF_Z_MSB 0x43
> +#define FXOS8700_M_OFF_Z_LSB 0x44
> +#define FXOS8700_MAX_X_MSB 0x45
> +#define FXOS8700_MAX_X_LSB 0x46
> +#define FXOS8700_MAX_Y_MSB 0x47
> +#define FXOS8700_MAX_Y_LSB 0x48
> +#define FXOS8700_MAX_Z_MSB 0x49
> +#define FXOS8700_MAX_Z_LSB 0x4a
> +#define FXOS8700_MIN_X_MSB 0x4b
> +#define FXOS8700_MIN_X_LSB 0x4c
> +#define FXOS8700_MIN_Y_MSB 0x4d
> +#define FXOS8700_MIN_Y_LSB 0x4e
> +#define FXOS8700_MIN_Z_MSB 0x4f
> +#define FXOS8700_MIN_Z_LSB 0x50
> +#define FXOS8700_TEMP 0x51
> +#define FXOS8700_M_THS_CFG 0x52
> +#define FXOS8700_M_THS_SRC 0x53
> +#define FXOS8700_M_THS_X_MSB 0x54
> +#define FXOS8700_M_THS_X_LSB 0x55
> +#define FXOS8700_M_THS_Y_MSB 0x56
> +#define FXOS8700_M_THS_Y_LSB 0x57
> +#define FXOS8700_M_THS_Z_MSB 0x58
> +#define FXOS8700_M_THS_Z_LSB 0x59
> +#define FXOS8700_M_THS_COUNT 0x5a
> +#define FXOS8700_M_CTRL_REG1 0x5b
> +#define FXOS8700_M_CTRL_REG2 0x5c
> +#define FXOS8700_M_CTRL_REG3 0x5d
> +#define FXOS8700_M_INT_SRC 0x5e
> +#define FXOS8700_A_VECM_CFG 0x5f
> +#define FXOS8700_A_VECM_THS_MSB 0x60
> +#define FXOS8700_A_VECM_THS_LSB 0x61
> +#define FXOS8700_A_VECM_CNT 0x62
> +#define FXOS8700_A_VECM_INITX_MSB 0x63
> +#define FXOS8700_A_VECM_INITX_LSB 0x64
> +#define FXOS8700_A_VECM_INITY_MSB 0x65
> +#define FXOS8700_A_VECM_INITY_LSB 0x66
> +#define FXOS8700_A_VECM_INITZ_MSB 0x67
> +#define FXOS8700_A_VECM_INITZ_LSB 0x68
> +#define FXOS8700_M_VECM_CFG 0x69
> +#define FXOS8700_M_VECM_THS_MSB 0x6a
> +#define FXOS8700_M_VECM_THS_LSB 0x6b
> +#define FXOS8700_M_VECM_CNT 0x6c
> +#define FXOS8700_M_VECM_INITX_MSB 0x6d
> +#define FXOS8700_M_VECM_INITX_LSB 0x6e
> +#define FXOS8700_M_VECM_INITY_MSB 0x6f
> +#define FXOS8700_M_VECM_INITY_LSB 0x70
> +#define FXOS8700_M_VECM_INITZ_MSB 0x71
> +#define FXOS8700_M_VECM_INITZ_LSB 0x72
> +#define FXOS8700_A_FFMT_THS_X_MSB 0x73
> +#define FXOS8700_A_FFMT_THS_X_LSB 0x74
> +#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
> +#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
> +#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
> +#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
> +#define FXOS8700_A_TRAN_INIT_MSB 0x79
> +#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
> +#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
> +#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
> +#define FXOS8700_TM_NVM_LOCK 0x7e
> +#define FXOS8700_NVM_DATA0_35 0x80
> +#define FXOS8700_NVM_DATA_BNK3 0xa4
> +#define FXOS8700_NVM_DATA_BNK2 0xa5
> +#define FXOS8700_NVM_DATA_BNK1 0xa6
> +#define FXOS8700_NVM_DATA_BNK0 0xa7
> +
> +/* Bit definitions for FXOS8700_M_CTRL_REG1 */
> +#define FXOS8700_HMS_MASK GENMASK(1, 0)
> +#define FXOS8700_OS_MASK GENMASK(4, 2)
> +
> +/* Bit definitions for FXOS8700_M_CTRL_REG2 */
> +#define FXOS8700_MAXMIN_RST BIT(2)
> +#define FXOS8700_MAXMIN_DIS_THS BIT(3)
> +#define FXOS8700_MAXMIN_DIS BIT(4)
> +
> +#define SENSOR_IOCTL_BASE 'S'
> +#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
> +#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
> +#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
> +#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
> +#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
> +#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
What are these doing here?
> +
> +#define FXOS8700_I2C_ADDR 0x1E
> +#define FXOS8700_DEVICE_ID 0xC7
> +#define FXOS8700_PRE_DEVICE_ID 0xC4
> +#define FXOS8700_DATA_BUF_SIZE 6
> +#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
> +#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
> +
> +#define FXOS8700_TYPE_ACC 0x00
> +#define FXOS8700_TYPE_MAG 0x01
> +#define FXOS8700_STANDBY 0x00
> +#define FXOS8700_ACTIVE 0x01
> +#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
> +
> +#define ABS_STATUS ABS_WHEEL
> +#define FXOS8700_DRIVER "fxos8700"
> +
> +#define ABSMAX_ACC_VAL 0x01FF
> +#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
> +#define FXOS8700_POLL_INTERVAL 400
> +#define FXOS8700_POLL_MAX 800
> +#define FXOS8700_POLL_MIN 100
> +#define FXOS8700_CTRL_ODR_MSK 0x38
> +#define FXOS8700_CTRL_ODR_MAX 0x00
> +#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
> +
> +enum {
> + MODE_2G = 0,
> + MODE_4G,
> + MODE_8G,
> +};
> +
> +#endif /* FXOS8700_H_ */
> diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
> new file mode 100644
> index 0000000..ea2716b
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_core.c
> @@ -0,0 +1,499 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
> + *
> + * IIO core driver for FXOS8700, with support for I2C/SPI busses
> + *
> + * TODO: Buffer, trigger, and IRQ support
> + */
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <linux/acpi.h>
> +#include <linux/bitops.h>
> +
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +
> +#include "fxos8700.h"
> +
> +struct fxos8700_data {
> + struct regmap *regmap;
> + struct iio_trigger *trig;
> + u8 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
> +};
> +
> +/* Regmap info */
> +static const struct regmap_range read_range[] = {
> + {
> + .range_min = FXOS8700_STATUS,
> + .range_max = FXOS8700_A_FFMT_COUNT,
> + }, {
> + .range_min = FXOS8700_TRANSIENT_CFG,
> + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> + },
> +};
> +
> +static const struct regmap_range write_range[] = {
> + {
> + .range_min = FXOS8700_F_SETUP,
> + .range_max = FXOS8700_TRIG_CFG,
> + }, {
> + .range_min = FXOS8700_XYZ_DATA_CFG,
> + .range_max = FXOS8700_HP_FILTER_CUTOFF,
> + }, {
> + .range_min = FXOS8700_PL_CFG,
> + .range_max = FXOS8700_A_FFMT_CFG,
> + }, {
> + .range_min = FXOS8700_A_FFMT_THS,
> + .range_max = FXOS8700_TRANSIENT_CFG,
> + }, {
> + .range_min = FXOS8700_TRANSIENT_THS,
> + .range_max = FXOS8700_PULSE_CFG,
> + }, {
> + .range_min = FXOS8700_PULSE_THSX,
> + .range_max = FXOS8700_OFF_Z,
> + }, {
> + .range_min = FXOS8700_M_OFF_X_MSB,
> + .range_max = FXOS8700_M_OFF_Z_LSB,
> + }, {
> + .range_min = FXOS8700_M_THS_CFG,
> + .range_max = FXOS8700_M_THS_CFG,
> + }, {
> + .range_min = FXOS8700_M_THS_X_MSB,
> + .range_max = FXOS8700_M_CTRL_REG3,
> + }, {
> + .range_min = FXOS8700_A_VECM_CFG,
> + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> + },
> +};
> +
> +static const struct regmap_access_table driver_read_table = {
> + .yes_ranges = read_range,
> + .n_yes_ranges = ARRAY_SIZE(read_range),
> +};
> +
> +static const struct regmap_access_table driver_write_table = {
> + .yes_ranges = write_range,
> + .n_yes_ranges = ARRAY_SIZE(write_range),
> +};
> +
> +const struct regmap_config fxos8700_regmap_config = {
> + .reg_bits = 8,
> + .val_bits = 8,
> + .max_register = FXOS8700_NVM_DATA_BNK0,
> + .rd_table = &driver_read_table,
> + .wr_table = &driver_write_table,
> +};
> +EXPORT_SYMBOL(fxos8700_regmap_config);
> +
> +#define FXOS8700_CHANNEL(_type, _axis) { \
> + .type = _type, \
> + .modified = 1, \
> + .channel2 = IIO_MOD_##_axis, \
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
> + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> +}
> +
> +/* scan indexes follow DATA register order */
> +enum fxos8700_scan_axis {
> + FXOS8700_SCAN_ACCEL_X = 0,
> + FXOS8700_SCAN_ACCEL_Y,
> + FXOS8700_SCAN_ACCEL_Z,
> + FXOS8700_SCAN_MAGN_X,
> + FXOS8700_SCAN_MAGN_Y,
> + FXOS8700_SCAN_MAGN_Z,
> + FXOS8700_SCAN_RHALL,
> + FXOS8700_SCAN_TIMESTAMP,
> +};
> +
> +enum fxos8700_sensor {
> + FXOS8700_ACCEL = 0,
> + FXOS8700_MAGN,
> + FXOS8700_NUM_SENSORS /* must be last */
> +};
> +
> +enum fxos8700_int_pin {
> + FXOS8700_PIN_INT1,
> + FXOS8700_PIN_INT2
> +};
> +
> +struct fxos8700_scale {
> + u8 bits;
> + int uscale;
> +};
> +
> +struct fxos8700_odr {
> + u8 bits;
> + int odr;
> + int uodr;
> +};
> +
> +static const struct fxos8700_scale fxos8700_accel_scale[] = {
> + { MODE_2G, 244},
> + { MODE_4G, 488},
> + { MODE_8G, 976},
> +};
> +
> +/*
> + * Accellerometer and magnetometer have the same ODR options, set in the
> + * CTRL_REG1 register. ODR is halved when using both sensors at once in
> + * hybrid mode.
> + */
> +static const struct fxos8700_odr fxos8700_odr[] = {
> + {0x00, 800, 0},
> + {0x01, 400, 0},
> + {0x02, 200, 0},
> + {0x03, 100, 0},
> + {0x04, 50, 0},
> + {0x05, 12, 500000},
> + {0x06, 6, 250000},
> + {0x07, 1, 562500},
> +};
> +
> +static const struct iio_chan_spec fxos8700_channels[] = {
> + FXOS8700_CHANNEL(IIO_ACCEL, X),
> + FXOS8700_CHANNEL(IIO_ACCEL, Y),
> + FXOS8700_CHANNEL(IIO_ACCEL, Z),
> + FXOS8700_CHANNEL(IIO_MAGN, X),
> + FXOS8700_CHANNEL(IIO_MAGN, Y),
> + FXOS8700_CHANNEL(IIO_MAGN, Z),
> + IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
> +};
> +
> +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
> +{
> + switch (iio_type) {
> + case IIO_ACCEL:
> + return FXOS8700_ACCEL;
> + case IIO_ANGL_VEL:
> + return FXOS8700_MAGN;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int fxos8700_set_active_mode(struct fxos8700_data *data,
> + enum fxos8700_sensor t, bool mode)
> +{
> + int ret;
> +
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
> + if (ret)
> + return ret;
> +
> + usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
> + FXOS8700_ACTIVE_MIN_USLEEP + 1000);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int uscale)
> +{
> + int i;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + if (t == FXOS8700_MAGN) {
> + dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
> + return -EINVAL;
> + }
> +
> + for (i = 0; i < scale_num; i++)
> + if (fxos8700_accel_scale[i].uscale == uscale)
> + break;
> +
> + if (i == scale_num)
> + return -EINVAL;
> +
> + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
> + fxos8700_accel_scale[i].bits);
> +}
> +
> +static int fxos8700_get_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int *uscale)
> +{
> + int i, ret, val;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> +
> + if (t == FXOS8700_MAGN) {
> + *uscale = 1200; /* Magnetometer is locked at 1200uT */
> + return 0;
> + }
> +
> + ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
> + if (ret)
> + return ret;
> +
> + for (i = 0; i < scale_num; i++)
> + if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
> + *uscale = fxos8700_accel_scale[i].uscale;
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
> + int axis, int *val)
> +{
> + u8 base, reg;
> + int ret;
> + __le16 sample = 0;
> + enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
> +
> + base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
> +
> + /* Block read 6 bytes of device output registers to avoid data loss */
> + ret = regmap_bulk_read(data->regmap, base, data->buf,
> + FXOS8700_DATA_BUF_SIZE);
> + if (ret)
> + return ret;
> +
> + /* Convert axis to buffer index */
> + reg = axis - IIO_MOD_X;
> +
> + /* Composite individual axis MSB/LSB registers */
> + sample = ((u16 *)data->buf)[reg];
Firstly cast to le16, then secondly don't then do a be16 to
cpu conversion? Which one is it le16 or be16?
> +
> + /* Convert to native endianness */
> + *val = sign_extend32(be16_to_cpu(sample), 15);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int odr, int uodr)
> +{
> + int i, ret, val;
> + bool active_mode;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + active_mode = val & FXOS8700_ACTIVE;
> +
> + if (active_mode) {
> + /*
> + * The device must be in standby mode to change any of the
> + * other fields within CTRL_REG1
> + */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + val & ~FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + }
> +
> + for (i = 0; i < odr_num; i++)
> + if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + return regmap_update_bits(data->regmap,
> + FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
> + fxos8700_odr[i].bits << 3 | active_mode);
> +}
> +
> +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int *odr, int *uodr)
> +{
> + int i, val, ret;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + val &= FXOS8700_CTRL_ODR_MSK;
> +
> + for (i = 0; i < odr_num; i++)
> + if (val == fxos8700_odr[i].bits)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + *odr = fxos8700_odr[i].odr;
> + *uodr = fxos8700_odr[i].uodr;
> +
> + return 0;
> +}
> +
> +static int fxos8700_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> + int ret;
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
> + if (ret)
> + return ret;
> + return IIO_VAL_INT;
> + case IIO_CHAN_INFO_SCALE:
> + *val = 0;
> + ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int fxos8700_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int val, int val2, long mask)
> +{
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_SCALE:
> + return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + break;
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
> +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
> +
> +static struct attribute *fxos8700_attrs[] = {
> + &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_accel_scale_available.dev_attr.attr,
> + &iio_const_attr_in_magn_scale_available.dev_attr.attr,
> + NULL,
> +};
> +
> +static const struct attribute_group fxos8700_attrs_group = {
> + .attrs = fxos8700_attrs,
> +};
> +
> +static const struct iio_info fxos8700_info = {
> + .read_raw = fxos8700_read_raw,
> + .write_raw = fxos8700_write_raw,
> + .attrs = &fxos8700_attrs_group,
> +};
> +
> +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
> +{
> + int ret;
> + unsigned int val;
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
> + if (ret) {
> + dev_err(dev, "Error reading chip id\n");
> + return ret;
> + }
> + if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
> + dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
> + val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
> + return -ENODEV;
> + }
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
> + if (ret)
> + return ret;
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
> + if (ret)
> + return ret;
> +
> + /*
> + * The device must be in standby mode to change any of the other fields
> + * within CTRL_REG1
> + */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
> + if (ret)
> + return ret;
> + /* Set max oversample ratio (OSR) and both devices active */
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
> + FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
> + if (ret)
> + return ret;
> + /* Disable and rst min/max measurements & threshold */
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
> + FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
> + FXOS8700_MAXMIN_DIS);
> + if (ret)
> + return ret;
> + /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + /* Set for max full-scale range (+/-8G) */
> + ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static void fxos8700_chip_uninit(void *data)
> +{
> + struct fxos8700_data *fxos8700_data = data;
> +
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
> +}
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi)
> +{
> + struct iio_dev *indio_dev;
> + struct fxos8700_data *data;
> + int ret;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + data = iio_priv(indio_dev);
> + dev_set_drvdata(dev, indio_dev);
> + data->regmap = regmap;
> +
> + ret = fxos8700_chip_init(data, use_spi);
> + if (ret)
> + return ret;
> +
> + ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
> + if (ret)
> + return ret;
> +
> + indio_dev->dev.parent = dev;
> + indio_dev->channels = fxos8700_channels;
> + indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
> + indio_dev->name = name ? name : "fxos8700";
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &fxos8700_info;
> +
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +EXPORT_SYMBOL_GPL(fxos8700_core_probe);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
> new file mode 100644
> index 0000000..73a5f91
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_i2c.c
> @@ -0,0 +1,71 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU, I2C bits
> + *
> + * 7-bit I2C slave address determined by SA1 and SA0 logic level
> + * inputs represented in the following table:
> + * SA1 | SA0 | Slave Address
> + * 0 | 0 | 0x1E
> + * 0 | 1 | 0x1D
> + * 1 | 0 | 0x1C
> + * 1 | 1 | 0x1F
> + */
> +#include <linux/acpi.h>
> +#include <linux/i2c.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_i2c_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct regmap *regmap;
> + const char *name = NULL;
> +
> + regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&client->dev, "Failed to register i2c regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> + if (id)
> + name = id->name;
> +
> + return fxos8700_core_probe(&client->dev, regmap, name, false);
> +}
> +
> +static const struct i2c_device_id fxos8700_i2c_id[] = {
> + {"fxos8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "nxp,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +
> +static struct i2c_driver fxos8700_i2c_driver = {
> + .driver = {
> + .name = "fxos8700_i2c",
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = of_match_ptr(fxos8700_of_match),
> + },
> + .probe = fxos8700_i2c_probe,
> + .id_table = fxos8700_i2c_id,
> +};
> +module_i2c_driver(fxos8700_i2c_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 I2C driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
> new file mode 100644
> index 0000000..412ff08
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_spi.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU, I2C bits
> + *
nitpick :) Trailing blank line here doesn't add anything.
> + */
> +#include <linux/acpi.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
If we are spinning again, another thread I read today pointed out that
we don't actually need the of header in these files, but rather just
mod_devicetable.h so it would be better to include that.
> +#include <linux/regmap.h>
> +#include <linux/spi/spi.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_spi_probe(struct spi_device *spi)
> +{
> + struct regmap *regmap;
> + const struct spi_device_id *id = spi_get_device_id(spi);
> +
> + regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&spi->dev, "Failed to register spi regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> + return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
> +}
> +
> +static const struct spi_device_id fxos8700_spi_id[] = {
> + {"fxos8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + { },
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "nxp,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +
> +static struct spi_driver fxos8700_spi_driver = {
> + .probe = fxos8700_spi_probe,
> + .id_table = fxos8700_spi_id,
> + .driver = {
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = fxos8700_of_match,
> + .name = "fxos8700_spi",
> + },
> +};
> +module_spi_driver(fxos8700_spi_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 SPI driver");
> +MODULE_LICENSE("GPL v2");
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-11 23:33 ` Bobby Jones
@ 2019-10-14 13:37 ` Rob Herring
0 siblings, 0 replies; 24+ messages in thread
From: Rob Herring @ 2019-10-14 13:37 UTC (permalink / raw)
To: Bobby Jones
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland,
open list:IIO SUBSYSTEM AND DRIVERS, devicetree
On Fri, Oct 11, 2019 at 6:33 PM Bobby Jones <rjones@gateworks.com> wrote:
>
> On Fri, Oct 11, 2019 at 6:58 AM Rob Herring <robh@kernel.org> wrote:
> >
> > On Thu, Oct 10, 2019 at 10:56:47AM -0700, Robert Jones wrote:
> > > This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> > > device-tree bindings.
> > >
> > > Signed-off-by: Robert Jones <rjones@gateworks.com>
> > > ---
> > > .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 69 ++++++++++++++++++++++
> > > 1 file changed, 69 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> > > new file mode 100644
> > > index 0000000..d33a1cc
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
> > > @@ -0,0 +1,69 @@
> > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/iio/imu/fxos8700.yaml#
> >
> > Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml: $id:
> > path/filename 'iio/imu/fxos8700.yaml' doesn't match actual filename
> >
> > Test your binding with 'make dt_binding_check'.
>
> Sorry about that, I had tried running that check previously but was
> struggling through some python environment/set-up problems.
> Additionally I did not realize that my path was incomplete until I
> read your github's readme line "Ensure ~/.local/bin is in the PATH". I
> don't utilize the python install on my machine frequently so I'm not
> sure if that should be obvious. It might be helpful to have that line
> in the Documentation/devicetree/writing-schema.md as well.
> Anyways I've got it running now.
Thanks for the input, will add something.
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Freescale FXOS8700 Inertial Measurement Unit
> > > +
> > > +maintainers:
> > > + - Robert Jones <rjones@gateworks.com>
> > > +
> > > +description: |
> > > + Accelerometer and magnetometer combo device with an i2c and SPI interface.
> > > + https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
> > > +
> > > +properties:
> > > + compatible:
> > > + enum:
> > > + - nxp,fxos8700
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > + interrupts:
> > > + maxItems: 2
> > > +
> > > + interrupt-names:
> > > + maxItems: 2
> > > + items:
> > > + - const: INT1
> > > + - const: INT2
> >
> > This doesn't match the example now. You need 'minItems: 1' if you need
> > to support 1 or 2 interrupts. If it can be either one, then you need:
> >
> > items:
> > enum: [ INT1, INT2 ]
> I'm trying to compare against other .yaml examples in the tree but
> without scouring datasheets to find a device with similar interrupt
> capabilities I'm just guessing at how this should be defined.
> The device has 2 interrupt pins as you've read (INT1 and INT2), and
> 0-2 of them can be used depending on what's been configured. Given
> what you've explained so far would this be the proper definition?:
>
> interrupts:
> minItems: 1
> maxItems: 2
>
> interrupt-names:
> minItems: 1
> maxItems: 2
> items:
> enum:
> - INT1
> - INT2
Yes, that's good.
Rob
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-12 13:53 ` Jonathan Cameron
@ 2019-10-14 18:33 ` Bobby Jones
0 siblings, 0 replies; 24+ messages in thread
From: Bobby Jones @ 2019-10-14 18:33 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree
On Sat, Oct 12, 2019 at 6:53 AM Jonathan Cameron <jic23@kernel.org> wrote:
>
> On Thu, 10 Oct 2019 10:56:48 -0700
> Robert Jones <rjones@gateworks.com> wrote:
>
> > FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
> > magnetometer combined into a single package. The device features a
> > selectable I2C or point-to-point SPI serial interface with 14-bit
> > accelerometer and 16-bit magnetometer ADC resolution along with
> > smart-embedded functions.
> >
> > FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
> > ±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
> > Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
> > for each sensor. Interleaved magnetic and acceleration data is available
> > at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
> > package and it is guaranteed to operate over the extended temperature
> > range of –40 °C to +85 °C.
> >
> > TODO: Trigger and IRQ configuration support
> >
> > Datasheet:
> > http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
> >
> > Signed-off-by: Robert Jones <rjones@gateworks.com>
> Mostly looks good. A few remaining bits inline.
>
> The endian types seems to have gotten very confused!
>
> Jonathan
I've addressed the miscellaneous and header file concerns. Went as far
as to move all #defines only used in the core file to the core file.
Response to the get_data function data conversion inline.
>
> > ---
> > drivers/iio/imu/Kconfig | 27 +++
> > drivers/iio/imu/Makefile | 5 +
> > drivers/iio/imu/fxos8700.h | 185 +++++++++++++++
> > drivers/iio/imu/fxos8700_core.c | 499 ++++++++++++++++++++++++++++++++++++++++
> > drivers/iio/imu/fxos8700_i2c.c | 71 ++++++
> > drivers/iio/imu/fxos8700_spi.c | 59 +++++
> > 6 files changed, 846 insertions(+)
> > create mode 100644 drivers/iio/imu/fxos8700.h
> > create mode 100644 drivers/iio/imu/fxos8700_core.c
> > create mode 100644 drivers/iio/imu/fxos8700_i2c.c
> > create mode 100644 drivers/iio/imu/fxos8700_spi.c
> >
> > diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
> > index f3c7282..60bb102 100644
> > --- a/drivers/iio/imu/Kconfig
> > +++ b/drivers/iio/imu/Kconfig
> > @@ -40,6 +40,33 @@ config ADIS16480
> >
> > source "drivers/iio/imu/bmi160/Kconfig"
> >
> > +config FXOS8700
> > + tristate
> > +
> > +config FXOS8700_I2C
> > + tristate "NXP FXOS8700 I2C driver"
> > + depends on I2C
> > + select FXOS8700
> > + select REGMAP_I2C
> > + help
> > + Say yes here to build support for the NXP FXOS8700 m+g combo
> > + sensor on I2C.
> > +
> > + This driver can also be built as a module. If so, the module will be
> > + called fxos8700_i2c.
> > +
> > +config FXOS8700_SPI
> > + tristate "NXP FXOS8700 SPI driver"
> > + depends on SPI
> > + select FXOS8700
> > + select REGMAP_SPI
> > + help
> > + Say yes here to build support for the NXP FXOS8700 m+g combo
> > + sensor on SPI.
> > +
> > + This driver can also be built as a module. If so, the module will be
> > + called fxos8700_spi.
> > +
> > config KMX61
> > tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
> > depends on I2C
> > diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
> > index 4a69588..5237fd4 100644
> > --- a/drivers/iio/imu/Makefile
> > +++ b/drivers/iio/imu/Makefile
> > @@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
> > obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
> >
> > obj-y += bmi160/
> > +
> > +obj-$(CONFIG_FXOS8700) += fxos8700_core.o
> > +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
> > +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
> > +
> > obj-y += inv_mpu6050/
> >
> > obj-$(CONFIG_KMX61) += kmx61.o
> > diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
> > new file mode 100644
> > index 0000000..92499a2
> > --- /dev/null
> > +++ b/drivers/iio/imu/fxos8700.h
> > @@ -0,0 +1,185 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef FXOS8700_H_
> > +#define FXOS8700_H_
> > +
> > +extern const struct regmap_config fxos8700_regmap_config;
> > +
> > +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> > + const char *name, bool use_spi);
> > +
> > +/* Register Definitions */
>
> If register definitions are only used in one c file, move them there
> rather than exposing the in the header.
>
> > +#define FXOS8700_STATUS 0x00
> > +#define FXOS8700_OUT_X_MSB 0x01
> > +#define FXOS8700_OUT_X_LSB 0x02
> > +#define FXOS8700_OUT_Y_MSB 0x03
> > +#define FXOS8700_OUT_Y_LSB 0x04
> > +#define FXOS8700_OUT_Z_MSB 0x05
> > +#define FXOS8700_OUT_Z_LSB 0x06
> > +#define FXOS8700_F_SETUP 0x09
> > +#define FXOS8700_TRIG_CFG 0x0a
> > +#define FXOS8700_SYSMOD 0x0b
> > +#define FXOS8700_INT_SOURCE 0x0c
> > +#define FXOS8700_WHO_AM_I 0x0d
> > +#define FXOS8700_XYZ_DATA_CFG 0x0e
> > +#define FXOS8700_HP_FILTER_CUTOFF 0x0f
> > +#define FXOS8700_PL_STATUS 0x10
> > +#define FXOS8700_PL_CFG 0x11
> > +#define FXOS8700_PL_COUNT 0x12
> > +#define FXOS8700_PL_BF_ZCOMP 0x13
> > +#define FXOS8700_PL_THS_REG 0x14
> > +#define FXOS8700_A_FFMT_CFG 0x15
> > +#define FXOS8700_A_FFMT_SRC 0x16
> > +#define FXOS8700_A_FFMT_THS 0x17
> > +#define FXOS8700_A_FFMT_COUNT 0x18
> > +#define FXOS8700_TRANSIENT_CFG 0x1d
> > +#define FXOS8700_TRANSIENT_SRC 0x1e
> > +#define FXOS8700_TRANSIENT_THS 0x1f
> > +#define FXOS8700_TRANSIENT_COUNT 0x20
> > +#define FXOS8700_PULSE_CFG 0x21
> > +#define FXOS8700_PULSE_SRC 0x22
> > +#define FXOS8700_PULSE_THSX 0x23
> > +#define FXOS8700_PULSE_THSY 0x24
> > +#define FXOS8700_PULSE_THSZ 0x25
> > +#define FXOS8700_PULSE_TMLT 0x26
> > +#define FXOS8700_PULSE_LTCY 0x27
> > +#define FXOS8700_PULSE_WIND 0x28
> > +#define FXOS8700_ASLP_COUNT 0x29
> > +#define FXOS8700_CTRL_REG1 0x2a
> > +#define FXOS8700_CTRL_REG2 0x2b
> > +#define FXOS8700_CTRL_REG3 0x2c
> > +#define FXOS8700_CTRL_REG4 0x2d
> > +#define FXOS8700_CTRL_REG5 0x2e
> > +#define FXOS8700_OFF_X 0x2f
> > +#define FXOS8700_OFF_Y 0x30
> > +#define FXOS8700_OFF_Z 0x31
> > +#define FXOS8700_M_DR_STATUS 0x32
> > +#define FXOS8700_M_OUT_X_MSB 0x33
> > +#define FXOS8700_M_OUT_X_LSB 0x34
> > +#define FXOS8700_M_OUT_Y_MSB 0x35
> > +#define FXOS8700_M_OUT_Y_LSB 0x36
> > +#define FXOS8700_M_OUT_Z_MSB 0x37
> > +#define FXOS8700_M_OUT_Z_LSB 0x38
> > +#define FXOS8700_CMP_X_MSB 0x39
> > +#define FXOS8700_CMP_X_LSB 0x3a
> > +#define FXOS8700_CMP_Y_MSB 0x3b
> > +#define FXOS8700_CMP_Y_LSB 0x3c
> > +#define FXOS8700_CMP_Z_MSB 0x3d
> > +#define FXOS8700_CMP_Z_LSB 0x3e
> > +#define FXOS8700_M_OFF_X_MSB 0x3f
> > +#define FXOS8700_M_OFF_X_LSB 0x40
> > +#define FXOS8700_M_OFF_Y_MSB 0x41
> > +#define FXOS8700_M_OFF_Y_LSB 0x42
> > +#define FXOS8700_M_OFF_Z_MSB 0x43
> > +#define FXOS8700_M_OFF_Z_LSB 0x44
> > +#define FXOS8700_MAX_X_MSB 0x45
> > +#define FXOS8700_MAX_X_LSB 0x46
> > +#define FXOS8700_MAX_Y_MSB 0x47
> > +#define FXOS8700_MAX_Y_LSB 0x48
> > +#define FXOS8700_MAX_Z_MSB 0x49
> > +#define FXOS8700_MAX_Z_LSB 0x4a
> > +#define FXOS8700_MIN_X_MSB 0x4b
> > +#define FXOS8700_MIN_X_LSB 0x4c
> > +#define FXOS8700_MIN_Y_MSB 0x4d
> > +#define FXOS8700_MIN_Y_LSB 0x4e
> > +#define FXOS8700_MIN_Z_MSB 0x4f
> > +#define FXOS8700_MIN_Z_LSB 0x50
> > +#define FXOS8700_TEMP 0x51
> > +#define FXOS8700_M_THS_CFG 0x52
> > +#define FXOS8700_M_THS_SRC 0x53
> > +#define FXOS8700_M_THS_X_MSB 0x54
> > +#define FXOS8700_M_THS_X_LSB 0x55
> > +#define FXOS8700_M_THS_Y_MSB 0x56
> > +#define FXOS8700_M_THS_Y_LSB 0x57
> > +#define FXOS8700_M_THS_Z_MSB 0x58
> > +#define FXOS8700_M_THS_Z_LSB 0x59
> > +#define FXOS8700_M_THS_COUNT 0x5a
> > +#define FXOS8700_M_CTRL_REG1 0x5b
> > +#define FXOS8700_M_CTRL_REG2 0x5c
> > +#define FXOS8700_M_CTRL_REG3 0x5d
> > +#define FXOS8700_M_INT_SRC 0x5e
> > +#define FXOS8700_A_VECM_CFG 0x5f
> > +#define FXOS8700_A_VECM_THS_MSB 0x60
> > +#define FXOS8700_A_VECM_THS_LSB 0x61
> > +#define FXOS8700_A_VECM_CNT 0x62
> > +#define FXOS8700_A_VECM_INITX_MSB 0x63
> > +#define FXOS8700_A_VECM_INITX_LSB 0x64
> > +#define FXOS8700_A_VECM_INITY_MSB 0x65
> > +#define FXOS8700_A_VECM_INITY_LSB 0x66
> > +#define FXOS8700_A_VECM_INITZ_MSB 0x67
> > +#define FXOS8700_A_VECM_INITZ_LSB 0x68
> > +#define FXOS8700_M_VECM_CFG 0x69
> > +#define FXOS8700_M_VECM_THS_MSB 0x6a
> > +#define FXOS8700_M_VECM_THS_LSB 0x6b
> > +#define FXOS8700_M_VECM_CNT 0x6c
> > +#define FXOS8700_M_VECM_INITX_MSB 0x6d
> > +#define FXOS8700_M_VECM_INITX_LSB 0x6e
> > +#define FXOS8700_M_VECM_INITY_MSB 0x6f
> > +#define FXOS8700_M_VECM_INITY_LSB 0x70
> > +#define FXOS8700_M_VECM_INITZ_MSB 0x71
> > +#define FXOS8700_M_VECM_INITZ_LSB 0x72
> > +#define FXOS8700_A_FFMT_THS_X_MSB 0x73
> > +#define FXOS8700_A_FFMT_THS_X_LSB 0x74
> > +#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
> > +#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
> > +#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
> > +#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
> > +#define FXOS8700_A_TRAN_INIT_MSB 0x79
> > +#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
> > +#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
> > +#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
> > +#define FXOS8700_TM_NVM_LOCK 0x7e
> > +#define FXOS8700_NVM_DATA0_35 0x80
> > +#define FXOS8700_NVM_DATA_BNK3 0xa4
> > +#define FXOS8700_NVM_DATA_BNK2 0xa5
> > +#define FXOS8700_NVM_DATA_BNK1 0xa6
> > +#define FXOS8700_NVM_DATA_BNK0 0xa7
> > +
> > +/* Bit definitions for FXOS8700_M_CTRL_REG1 */
> > +#define FXOS8700_HMS_MASK GENMASK(1, 0)
> > +#define FXOS8700_OS_MASK GENMASK(4, 2)
> > +
> > +/* Bit definitions for FXOS8700_M_CTRL_REG2 */
> > +#define FXOS8700_MAXMIN_RST BIT(2)
> > +#define FXOS8700_MAXMIN_DIS_THS BIT(3)
> > +#define FXOS8700_MAXMIN_DIS BIT(4)
> > +
> > +#define SENSOR_IOCTL_BASE 'S'
> > +#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *)
> > +#define SENSOR_GET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 2, int)
> > +#define SENSOR_SET_POWER_STATUS _IOR(SENSOR_IOCTL_BASE, 3, int)
> > +#define SENSOR_GET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 4, int)
> > +#define SENSOR_SET_DELAY_TIME _IOR(SENSOR_IOCTL_BASE, 5, int)
> > +#define SENSOR_GET_RAW_DATA _IOR(SENSOR_IOCTL_BASE, 6, short[3])
>
> What are these doing here?
Remnants from the misc driver I referenced. Removed these as well as
other non-register #defines not being used.
>
> > +
> > +#define FXOS8700_I2C_ADDR 0x1E
> > +#define FXOS8700_DEVICE_ID 0xC7
> > +#define FXOS8700_PRE_DEVICE_ID 0xC4
> > +#define FXOS8700_DATA_BUF_SIZE 6
> > +#define FXOS8700_DELAY_DEFAULT 200 /* msecs */
> > +#define FXOS8700_POSITION_DEFAULT 1 /* msecs */
> > +
> > +#define FXOS8700_TYPE_ACC 0x00
> > +#define FXOS8700_TYPE_MAG 0x01
> > +#define FXOS8700_STANDBY 0x00
> > +#define FXOS8700_ACTIVE 0x01
> > +#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
> > +
> > +#define ABS_STATUS ABS_WHEEL
> > +#define FXOS8700_DRIVER "fxos8700"
> > +
> > +#define ABSMAX_ACC_VAL 0x01FF
> > +#define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
> > +#define FXOS8700_POLL_INTERVAL 400
> > +#define FXOS8700_POLL_MAX 800
> > +#define FXOS8700_POLL_MIN 100
> > +#define FXOS8700_CTRL_ODR_MSK 0x38
> > +#define FXOS8700_CTRL_ODR_MAX 0x00
> > +#define FXOS8700_CTRL_ODR_MIN (0x03 << 3)
> > +
> > +enum {
> > + MODE_2G = 0,
> > + MODE_4G,
> > + MODE_8G,
> > +};
> > +
> > +#endif /* FXOS8700_H_ */
> > diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
> > new file mode 100644
> > index 0000000..ea2716b
> > --- /dev/null
> > +++ b/drivers/iio/imu/fxos8700_core.c
> > @@ -0,0 +1,499 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
> > + *
> > + * IIO core driver for FXOS8700, with support for I2C/SPI busses
> > + *
> > + * TODO: Buffer, trigger, and IRQ support
> > + */
> > +#include <linux/module.h>
> > +#include <linux/regmap.h>
> > +#include <linux/acpi.h>
> > +#include <linux/bitops.h>
> > +
> > +#include <linux/iio/iio.h>
> > +#include <linux/iio/sysfs.h>
> > +
> > +#include "fxos8700.h"
> > +
> > +struct fxos8700_data {
> > + struct regmap *regmap;
> > + struct iio_trigger *trig;
> > + u8 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
> > +};
> > +
> > +/* Regmap info */
> > +static const struct regmap_range read_range[] = {
> > + {
> > + .range_min = FXOS8700_STATUS,
> > + .range_max = FXOS8700_A_FFMT_COUNT,
> > + }, {
> > + .range_min = FXOS8700_TRANSIENT_CFG,
> > + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> > + },
> > +};
> > +
> > +static const struct regmap_range write_range[] = {
> > + {
> > + .range_min = FXOS8700_F_SETUP,
> > + .range_max = FXOS8700_TRIG_CFG,
> > + }, {
> > + .range_min = FXOS8700_XYZ_DATA_CFG,
> > + .range_max = FXOS8700_HP_FILTER_CUTOFF,
> > + }, {
> > + .range_min = FXOS8700_PL_CFG,
> > + .range_max = FXOS8700_A_FFMT_CFG,
> > + }, {
> > + .range_min = FXOS8700_A_FFMT_THS,
> > + .range_max = FXOS8700_TRANSIENT_CFG,
> > + }, {
> > + .range_min = FXOS8700_TRANSIENT_THS,
> > + .range_max = FXOS8700_PULSE_CFG,
> > + }, {
> > + .range_min = FXOS8700_PULSE_THSX,
> > + .range_max = FXOS8700_OFF_Z,
> > + }, {
> > + .range_min = FXOS8700_M_OFF_X_MSB,
> > + .range_max = FXOS8700_M_OFF_Z_LSB,
> > + }, {
> > + .range_min = FXOS8700_M_THS_CFG,
> > + .range_max = FXOS8700_M_THS_CFG,
> > + }, {
> > + .range_min = FXOS8700_M_THS_X_MSB,
> > + .range_max = FXOS8700_M_CTRL_REG3,
> > + }, {
> > + .range_min = FXOS8700_A_VECM_CFG,
> > + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> > + },
> > +};
> > +
> > +static const struct regmap_access_table driver_read_table = {
> > + .yes_ranges = read_range,
> > + .n_yes_ranges = ARRAY_SIZE(read_range),
> > +};
> > +
> > +static const struct regmap_access_table driver_write_table = {
> > + .yes_ranges = write_range,
> > + .n_yes_ranges = ARRAY_SIZE(write_range),
> > +};
> > +
> > +const struct regmap_config fxos8700_regmap_config = {
> > + .reg_bits = 8,
> > + .val_bits = 8,
> > + .max_register = FXOS8700_NVM_DATA_BNK0,
> > + .rd_table = &driver_read_table,
> > + .wr_table = &driver_write_table,
> > +};
> > +EXPORT_SYMBOL(fxos8700_regmap_config);
> > +
> > +#define FXOS8700_CHANNEL(_type, _axis) { \
> > + .type = _type, \
> > + .modified = 1, \
> > + .channel2 = IIO_MOD_##_axis, \
> > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> > + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
> > + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> > +}
> > +
> > +/* scan indexes follow DATA register order */
> > +enum fxos8700_scan_axis {
> > + FXOS8700_SCAN_ACCEL_X = 0,
> > + FXOS8700_SCAN_ACCEL_Y,
> > + FXOS8700_SCAN_ACCEL_Z,
> > + FXOS8700_SCAN_MAGN_X,
> > + FXOS8700_SCAN_MAGN_Y,
> > + FXOS8700_SCAN_MAGN_Z,
> > + FXOS8700_SCAN_RHALL,
> > + FXOS8700_SCAN_TIMESTAMP,
> > +};
> > +
> > +enum fxos8700_sensor {
> > + FXOS8700_ACCEL = 0,
> > + FXOS8700_MAGN,
> > + FXOS8700_NUM_SENSORS /* must be last */
> > +};
> > +
> > +enum fxos8700_int_pin {
> > + FXOS8700_PIN_INT1,
> > + FXOS8700_PIN_INT2
> > +};
> > +
> > +struct fxos8700_scale {
> > + u8 bits;
> > + int uscale;
> > +};
> > +
> > +struct fxos8700_odr {
> > + u8 bits;
> > + int odr;
> > + int uodr;
> > +};
> > +
> > +static const struct fxos8700_scale fxos8700_accel_scale[] = {
> > + { MODE_2G, 244},
> > + { MODE_4G, 488},
> > + { MODE_8G, 976},
> > +};
> > +
> > +/*
> > + * Accellerometer and magnetometer have the same ODR options, set in the
> > + * CTRL_REG1 register. ODR is halved when using both sensors at once in
> > + * hybrid mode.
> > + */
> > +static const struct fxos8700_odr fxos8700_odr[] = {
> > + {0x00, 800, 0},
> > + {0x01, 400, 0},
> > + {0x02, 200, 0},
> > + {0x03, 100, 0},
> > + {0x04, 50, 0},
> > + {0x05, 12, 500000},
> > + {0x06, 6, 250000},
> > + {0x07, 1, 562500},
> > +};
> > +
> > +static const struct iio_chan_spec fxos8700_channels[] = {
> > + FXOS8700_CHANNEL(IIO_ACCEL, X),
> > + FXOS8700_CHANNEL(IIO_ACCEL, Y),
> > + FXOS8700_CHANNEL(IIO_ACCEL, Z),
> > + FXOS8700_CHANNEL(IIO_MAGN, X),
> > + FXOS8700_CHANNEL(IIO_MAGN, Y),
> > + FXOS8700_CHANNEL(IIO_MAGN, Z),
> > + IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
> > +};
> > +
> > +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
> > +{
> > + switch (iio_type) {
> > + case IIO_ACCEL:
> > + return FXOS8700_ACCEL;
> > + case IIO_ANGL_VEL:
> > + return FXOS8700_MAGN;
> > + default:
> > + return -EINVAL;
> > + }
> > +}
> > +
> > +static int fxos8700_set_active_mode(struct fxos8700_data *data,
> > + enum fxos8700_sensor t, bool mode)
> > +{
> > + int ret;
> > +
> > + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
> > + if (ret)
> > + return ret;
> > +
> > + usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
> > + FXOS8700_ACTIVE_MIN_USLEEP + 1000);
> > +
> > + return 0;
> > +}
> > +
> > +static int fxos8700_set_scale(struct fxos8700_data *data,
> > + enum fxos8700_sensor t, int uscale)
> > +{
> > + int i;
> > + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> > + struct device *dev = regmap_get_device(data->regmap);
> > +
> > + if (t == FXOS8700_MAGN) {
> > + dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
> > + return -EINVAL;
> > + }
> > +
> > + for (i = 0; i < scale_num; i++)
> > + if (fxos8700_accel_scale[i].uscale == uscale)
> > + break;
> > +
> > + if (i == scale_num)
> > + return -EINVAL;
> > +
> > + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
> > + fxos8700_accel_scale[i].bits);
> > +}
> > +
> > +static int fxos8700_get_scale(struct fxos8700_data *data,
> > + enum fxos8700_sensor t, int *uscale)
> > +{
> > + int i, ret, val;
> > + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> > +
> > + if (t == FXOS8700_MAGN) {
> > + *uscale = 1200; /* Magnetometer is locked at 1200uT */
> > + return 0;
> > + }
> > +
> > + ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
> > + if (ret)
> > + return ret;
> > +
> > + for (i = 0; i < scale_num; i++)
> > + if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
> > + *uscale = fxos8700_accel_scale[i].uscale;
> > + return 0;
> > + }
> > +
> > + return -EINVAL;
> > +}
> > +
> > +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
> > + int axis, int *val)
> > +{
> > + u8 base, reg;
> > + int ret;
> > + __le16 sample = 0;
> > + enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
> > +
> > + base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
> > +
> > + /* Block read 6 bytes of device output registers to avoid data loss */
> > + ret = regmap_bulk_read(data->regmap, base, data->buf,
> > + FXOS8700_DATA_BUF_SIZE);
> > + if (ret)
> > + return ret;
> > +
> > + /* Convert axis to buffer index */
> > + reg = axis - IIO_MOD_X;
> > +
> > + /* Composite individual axis MSB/LSB registers */
> > + sample = ((u16 *)data->buf)[reg];
>
> Firstly cast to le16, then secondly don't then do a be16 to
> cpu conversion? Which one is it le16 or be16?
>
Sorry for the confusion here. When I read the description of
regmap_bulk_read(), specifically that the buffer storing the data
should be "in native register size for device", I interpreted that to
mean I needed to use a single byte type array since the device uses
single byte registers. I think I read into that line a little too much
and I've since seen an iio driver example prove otherwise.
The device stores the data in big endian order, so I've just changed
my data buffer type to reflect that and will directly pass that to
be16_to_cpu. That way I can omit the unnecessary sample variable
that's adding to the confusion. I'll be posting a new series shortly.
> > +
> > + /* Convert to native endianness */
> > + *val = sign_extend32(be16_to_cpu(sample), 15);
> > +
> > + return 0;
> > +}
> > +
> > +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> > + int odr, int uodr)
> > +{
> > + int i, ret, val;
> > + bool active_mode;
> > + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> > +
> > + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> > + if (ret)
> > + return ret;
> > +
> > + active_mode = val & FXOS8700_ACTIVE;
> > +
> > + if (active_mode) {
> > + /*
> > + * The device must be in standby mode to change any of the
> > + * other fields within CTRL_REG1
> > + */
> > + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> > + val & ~FXOS8700_ACTIVE);
> > + if (ret)
> > + return ret;
> > + }
> > +
> > + for (i = 0; i < odr_num; i++)
> > + if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
> > + break;
> > +
> > + if (i >= odr_num)
> > + return -EINVAL;
> > +
> > + return regmap_update_bits(data->regmap,
> > + FXOS8700_CTRL_REG1,
> > + FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
> > + fxos8700_odr[i].bits << 3 | active_mode);
> > +}
> > +
> > +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> > + int *odr, int *uodr)
> > +{
> > + int i, val, ret;
> > + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> > +
> > + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> > + if (ret)
> > + return ret;
> > +
> > + val &= FXOS8700_CTRL_ODR_MSK;
> > +
> > + for (i = 0; i < odr_num; i++)
> > + if (val == fxos8700_odr[i].bits)
> > + break;
> > +
> > + if (i >= odr_num)
> > + return -EINVAL;
> > +
> > + *odr = fxos8700_odr[i].odr;
> > + *uodr = fxos8700_odr[i].uodr;
> > +
> > + return 0;
> > +}
> > +
> > +static int fxos8700_read_raw(struct iio_dev *indio_dev,
> > + struct iio_chan_spec const *chan,
> > + int *val, int *val2, long mask)
> > +{
> > + int ret;
> > + struct fxos8700_data *data = iio_priv(indio_dev);
> > +
> > + switch (mask) {
> > + case IIO_CHAN_INFO_RAW:
> > + ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
> > + if (ret)
> > + return ret;
> > + return IIO_VAL_INT;
> > + case IIO_CHAN_INFO_SCALE:
> > + *val = 0;
> > + ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
> > + val2);
> > + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> > + case IIO_CHAN_INFO_SAMP_FREQ:
> > + ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
> > + val, val2);
> > + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> > + default:
> > + return -EINVAL;
> > + }
> > +}
> > +
> > +static int fxos8700_write_raw(struct iio_dev *indio_dev,
> > + struct iio_chan_spec const *chan,
> > + int val, int val2, long mask)
> > +{
> > + struct fxos8700_data *data = iio_priv(indio_dev);
> > +
> > + switch (mask) {
> > + case IIO_CHAN_INFO_SCALE:
> > + return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
> > + val2);
> > + break;
> > + case IIO_CHAN_INFO_SAMP_FREQ:
> > + return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
> > + val, val2);
> > + default:
> > + return -EINVAL;
> > + }
> > +}
> > +
> > +static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
> > + "1.5625 6.25 12.5 50 100 200 400 800");
> > +static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
> > + "1.5625 6.25 12.5 50 100 200 400 800");
> > +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
> > +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
> > +
> > +static struct attribute *fxos8700_attrs[] = {
> > + &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
> > + &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
> > + &iio_const_attr_in_accel_scale_available.dev_attr.attr,
> > + &iio_const_attr_in_magn_scale_available.dev_attr.attr,
> > + NULL,
> > +};
> > +
> > +static const struct attribute_group fxos8700_attrs_group = {
> > + .attrs = fxos8700_attrs,
> > +};
> > +
> > +static const struct iio_info fxos8700_info = {
> > + .read_raw = fxos8700_read_raw,
> > + .write_raw = fxos8700_write_raw,
> > + .attrs = &fxos8700_attrs_group,
> > +};
> > +
> > +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
> > +{
> > + int ret;
> > + unsigned int val;
> > + struct device *dev = regmap_get_device(data->regmap);
> > +
> > + ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
> > + if (ret) {
> > + dev_err(dev, "Error reading chip id\n");
> > + return ret;
> > + }
> > + if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
> > + dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
> > + val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
> > + return -ENODEV;
> > + }
> > +
> > + ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
> > + if (ret)
> > + return ret;
> > +
> > + ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
> > + if (ret)
> > + return ret;
> > +
> > + /*
> > + * The device must be in standby mode to change any of the other fields
> > + * within CTRL_REG1
> > + */
> > + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
> > + if (ret)
> > + return ret;
> > + /* Set max oversample ratio (OSR) and both devices active */
> > + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
> > + FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
> > + if (ret)
> > + return ret;
> > + /* Disable and rst min/max measurements & threshold */
> > + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
> > + FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
> > + FXOS8700_MAXMIN_DIS);
> > + if (ret)
> > + return ret;
> > + /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
> > + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> > + FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
> > + if (ret)
> > + return ret;
> > + /* Set for max full-scale range (+/-8G) */
> > + ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
> > + if (ret)
> > + return ret;
> > +
> > + return 0;
> > +}
> > +
> > +static void fxos8700_chip_uninit(void *data)
> > +{
> > + struct fxos8700_data *fxos8700_data = data;
> > +
> > + fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
> > + fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
> > +}
> > +
> > +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> > + const char *name, bool use_spi)
> > +{
> > + struct iio_dev *indio_dev;
> > + struct fxos8700_data *data;
> > + int ret;
> > +
> > + indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
> > + if (!indio_dev)
> > + return -ENOMEM;
> > +
> > + data = iio_priv(indio_dev);
> > + dev_set_drvdata(dev, indio_dev);
> > + data->regmap = regmap;
> > +
> > + ret = fxos8700_chip_init(data, use_spi);
> > + if (ret)
> > + return ret;
> > +
> > + ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
> > + if (ret)
> > + return ret;
> > +
> > + indio_dev->dev.parent = dev;
> > + indio_dev->channels = fxos8700_channels;
> > + indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
> > + indio_dev->name = name ? name : "fxos8700";
> > + indio_dev->modes = INDIO_DIRECT_MODE;
> > + indio_dev->info = &fxos8700_info;
> > +
> > + return devm_iio_device_register(dev, indio_dev);
> > +}
> > +EXPORT_SYMBOL_GPL(fxos8700_core_probe);
> > +
> > +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> > +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
> > +MODULE_LICENSE("GPL v2");
> > diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
> > new file mode 100644
> > index 0000000..73a5f91
> > --- /dev/null
> > +++ b/drivers/iio/imu/fxos8700_i2c.c
> > @@ -0,0 +1,71 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * FXOS8700 - NXP IMU, I2C bits
> > + *
> > + * 7-bit I2C slave address determined by SA1 and SA0 logic level
> > + * inputs represented in the following table:
> > + * SA1 | SA0 | Slave Address
> > + * 0 | 0 | 0x1E
> > + * 0 | 1 | 0x1D
> > + * 1 | 0 | 0x1C
> > + * 1 | 1 | 0x1F
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/i2c.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/regmap.h>
> > +
> > +#include "fxos8700.h"
> > +
> > +static int fxos8700_i2c_probe(struct i2c_client *client,
> > + const struct i2c_device_id *id)
> > +{
> > + struct regmap *regmap;
> > + const char *name = NULL;
> > +
> > + regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
> > + if (IS_ERR(regmap)) {
> > + dev_err(&client->dev, "Failed to register i2c regmap %d\n",
> > + (int)PTR_ERR(regmap));
> > + return PTR_ERR(regmap);
> > + }
> > +
> > + if (id)
> > + name = id->name;
> > +
> > + return fxos8700_core_probe(&client->dev, regmap, name, false);
> > +}
> > +
> > +static const struct i2c_device_id fxos8700_i2c_id[] = {
> > + {"fxos8700", 0},
> > + {}
> > +};
> > +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
> > +
> > +static const struct acpi_device_id fxos8700_acpi_match[] = {
> > + {"FXOS8700", 0},
> > + {}
> > +};
> > +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> > +
> > +static const struct of_device_id fxos8700_of_match[] = {
> > + { .compatible = "nxp,fxos8700" },
> > + { },
> > +};
> > +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> > +
> > +static struct i2c_driver fxos8700_i2c_driver = {
> > + .driver = {
> > + .name = "fxos8700_i2c",
> > + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> > + .of_match_table = of_match_ptr(fxos8700_of_match),
> > + },
> > + .probe = fxos8700_i2c_probe,
> > + .id_table = fxos8700_i2c_id,
> > +};
> > +module_i2c_driver(fxos8700_i2c_driver);
> > +
> > +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> > +MODULE_DESCRIPTION("FXOS8700 I2C driver");
> > +MODULE_LICENSE("GPL v2");
> > diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
> > new file mode 100644
> > index 0000000..412ff08
> > --- /dev/null
> > +++ b/drivers/iio/imu/fxos8700_spi.c
> > @@ -0,0 +1,59 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * FXOS8700 - NXP IMU, I2C bits
> > + *
> nitpick :) Trailing blank line here doesn't add anything.
>
> > + */
> > +#include <linux/acpi.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
>
> If we are spinning again, another thread I read today pointed out that
> we don't actually need the of header in these files, but rather just
> mod_devicetable.h so it would be better to include that.
>
> > +#include <linux/regmap.h>
> > +#include <linux/spi/spi.h>
> > +
> > +#include "fxos8700.h"
> > +
> > +static int fxos8700_spi_probe(struct spi_device *spi)
> > +{
> > + struct regmap *regmap;
> > + const struct spi_device_id *id = spi_get_device_id(spi);
> > +
> > + regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
> > + if (IS_ERR(regmap)) {
> > + dev_err(&spi->dev, "Failed to register spi regmap %d\n",
> > + (int)PTR_ERR(regmap));
> > + return PTR_ERR(regmap);
> > + }
> > + return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
> > +}
> > +
> > +static const struct spi_device_id fxos8700_spi_id[] = {
> > + {"fxos8700", 0},
> > + {}
> > +};
> > +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
> > +
> > +static const struct acpi_device_id fxos8700_acpi_match[] = {
> > + {"FXOS8700", 0},
> > + { },
> > +};
> > +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> > +
> > +static const struct of_device_id fxos8700_of_match[] = {
> > + { .compatible = "nxp,fxos8700" },
> > + { },
> > +};
> > +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> > +
> > +static struct spi_driver fxos8700_spi_driver = {
> > + .probe = fxos8700_spi_probe,
> > + .id_table = fxos8700_spi_id,
> > + .driver = {
> > + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> > + .of_match_table = fxos8700_of_match,
> > + .name = "fxos8700_spi",
> > + },
> > +};
> > +module_spi_driver(fxos8700_spi_driver);
> > +
> > +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> > +MODULE_DESCRIPTION("FXOS8700 SPI driver");
> > +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 0/2] iio: imu: add support for FXOS8700
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 17:56 ` [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-10 17:56 ` [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-14 18:49 ` Robert Jones
2019-10-14 18:49 ` [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-14 18:49 ` [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2 siblings, 2 replies; 24+ messages in thread
From: Robert Jones @ 2019-10-14 18:49 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
- Document the FXOS8700 device tree binding.
- Implement basic iio driver support for FXOS8700
Changes in v2:
- Reorganized files to base imu directory
- Converted devicetree bindings doc to schema
- Moved single use function definitions out of header
- Added bit definitions and #define usages
- Moved buffer for regmap_bulk_read to private data struct
- Clarified get_data operations
- Remove unreachable code
- Remove log noise
- Remove of_match_ptr() macro usage
- Various style and whitespace changes
Changes in v3:
- Refactored Freescale mentions to NXP, including compatible string
- Removed missed files from reorganization to base imu directory
- Removed Kconfig source command to now nonexistent directory
- Fixed devicetree binding properties definitions
- Added SPI example to devicetree documentation
Changes in v4:
- Updated interrupts property and example of devicetree binding
- Removed unnecessary header definitions and reorganized others to source files
- Changed data buffer to __be16 to properly reflect data type
- Changed included file to one more appropriate
Robert Jones (2):
dt-bindings: iio: imu: add fxos8700 imu binding
iio: imu: Add support for the FXOS8700 IMU
.../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 76 +++
drivers/iio/imu/Kconfig | 27 +
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 10 +
drivers/iio/imu/fxos8700_core.c | 649 +++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 71 +++
drivers/iio/imu/fxos8700_spi.c | 58 ++
7 files changed, 896 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
--
2.9.2
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-14 18:49 ` [PATCH v4 0/2] iio: imu: add support for FXOS8700 Robert Jones
@ 2019-10-14 18:49 ` Robert Jones
2019-10-16 12:55 ` Rob Herring
2019-10-14 18:49 ` [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
1 sibling, 1 reply; 24+ messages in thread
From: Robert Jones @ 2019-10-14 18:49 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
device-tree bindings.
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
.../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 76 ++++++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
new file mode 100644
index 0000000..63bcb73
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/imu/nxp,fxos8700.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale FXOS8700 Inertial Measurement Unit
+
+maintainers:
+ - Robert Jones <rjones@gateworks.com>
+
+description: |
+ Accelerometer and magnetometer combo device with an i2c and SPI interface.
+ https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ
+
+properties:
+ compatible:
+ enum:
+ - nxp,fxos8700
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+
+ interrupt-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ enum:
+ - INT1
+ - INT2
+
+ drive-open-drain:
+ type: boolean
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fxos8700@1e {
+ compatible = "nxp,fxos8700";
+ reg = <0x1e>;
+
+ interrupt-parent = <&gpio2>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "INT1";
+ };
+ };
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fxos8700@0 {
+ compatible = "nxp,fxos8700";
+ reg = <0>;
+
+ spi-max-frequency = <1000000>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "INT2";
+ };
+ };
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-14 18:49 ` [PATCH v4 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-14 18:49 ` [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-14 18:49 ` Robert Jones
2019-10-21 17:15 ` Bobby Jones
2019-10-22 9:25 ` Jonathan Cameron
1 sibling, 2 replies; 24+ messages in thread
From: Robert Jones @ 2019-10-14 18:49 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree, Robert Jones
FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
magnetometer combined into a single package. The device features a
selectable I2C or point-to-point SPI serial interface with 14-bit
accelerometer and 16-bit magnetometer ADC resolution along with
smart-embedded functions.
FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
for each sensor. Interleaved magnetic and acceleration data is available
at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
package and it is guaranteed to operate over the extended temperature
range of –40 °C to +85 °C.
TODO: Trigger and IRQ configuration support
Datasheet:
http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
Signed-off-by: Robert Jones <rjones@gateworks.com>
---
drivers/iio/imu/Kconfig | 27 ++
drivers/iio/imu/Makefile | 5 +
drivers/iio/imu/fxos8700.h | 10 +
drivers/iio/imu/fxos8700_core.c | 649 ++++++++++++++++++++++++++++++++++++++++
drivers/iio/imu/fxos8700_i2c.c | 71 +++++
drivers/iio/imu/fxos8700_spi.c | 58 ++++
6 files changed, 820 insertions(+)
create mode 100644 drivers/iio/imu/fxos8700.h
create mode 100644 drivers/iio/imu/fxos8700_core.c
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
index f3c7282..60bb102 100644
--- a/drivers/iio/imu/Kconfig
+++ b/drivers/iio/imu/Kconfig
@@ -40,6 +40,33 @@ config ADIS16480
source "drivers/iio/imu/bmi160/Kconfig"
+config FXOS8700
+ tristate
+
+config FXOS8700_I2C
+ tristate "NXP FXOS8700 I2C driver"
+ depends on I2C
+ select FXOS8700
+ select REGMAP_I2C
+ help
+ Say yes here to build support for the NXP FXOS8700 m+g combo
+ sensor on I2C.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_i2c.
+
+config FXOS8700_SPI
+ tristate "NXP FXOS8700 SPI driver"
+ depends on SPI
+ select FXOS8700
+ select REGMAP_SPI
+ help
+ Say yes here to build support for the NXP FXOS8700 m+g combo
+ sensor on SPI.
+
+ This driver can also be built as a module. If so, the module will be
+ called fxos8700_spi.
+
config KMX61
tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
depends on I2C
diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
index 4a69588..5237fd4 100644
--- a/drivers/iio/imu/Makefile
+++ b/drivers/iio/imu/Makefile
@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
obj-y += bmi160/
+
+obj-$(CONFIG_FXOS8700) += fxos8700_core.o
+obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
+obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
+
obj-y += inv_mpu6050/
obj-$(CONFIG_KMX61) += kmx61.o
diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
new file mode 100644
index 0000000..6dfb8d7
--- /dev/null
+++ b/drivers/iio/imu/fxos8700.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef FXOS8700_H_
+#define FXOS8700_H_
+
+extern const struct regmap_config fxos8700_regmap_config;
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi);
+
+#endif /* FXOS8700_H_ */
diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
new file mode 100644
index 0000000..610ce7d
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -0,0 +1,649 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
+ *
+ * IIO core driver for FXOS8700, with support for I2C/SPI busses
+ *
+ * TODO: Buffer, trigger, and IRQ support
+ */
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/acpi.h>
+#include <linux/bitops.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+
+#include "fxos8700.h"
+
+/* Register Definitions */
+#define FXOS8700_STATUS 0x00
+#define FXOS8700_OUT_X_MSB 0x01
+#define FXOS8700_OUT_X_LSB 0x02
+#define FXOS8700_OUT_Y_MSB 0x03
+#define FXOS8700_OUT_Y_LSB 0x04
+#define FXOS8700_OUT_Z_MSB 0x05
+#define FXOS8700_OUT_Z_LSB 0x06
+#define FXOS8700_F_SETUP 0x09
+#define FXOS8700_TRIG_CFG 0x0a
+#define FXOS8700_SYSMOD 0x0b
+#define FXOS8700_INT_SOURCE 0x0c
+#define FXOS8700_WHO_AM_I 0x0d
+#define FXOS8700_XYZ_DATA_CFG 0x0e
+#define FXOS8700_HP_FILTER_CUTOFF 0x0f
+#define FXOS8700_PL_STATUS 0x10
+#define FXOS8700_PL_CFG 0x11
+#define FXOS8700_PL_COUNT 0x12
+#define FXOS8700_PL_BF_ZCOMP 0x13
+#define FXOS8700_PL_THS_REG 0x14
+#define FXOS8700_A_FFMT_CFG 0x15
+#define FXOS8700_A_FFMT_SRC 0x16
+#define FXOS8700_A_FFMT_THS 0x17
+#define FXOS8700_A_FFMT_COUNT 0x18
+#define FXOS8700_TRANSIENT_CFG 0x1d
+#define FXOS8700_TRANSIENT_SRC 0x1e
+#define FXOS8700_TRANSIENT_THS 0x1f
+#define FXOS8700_TRANSIENT_COUNT 0x20
+#define FXOS8700_PULSE_CFG 0x21
+#define FXOS8700_PULSE_SRC 0x22
+#define FXOS8700_PULSE_THSX 0x23
+#define FXOS8700_PULSE_THSY 0x24
+#define FXOS8700_PULSE_THSZ 0x25
+#define FXOS8700_PULSE_TMLT 0x26
+#define FXOS8700_PULSE_LTCY 0x27
+#define FXOS8700_PULSE_WIND 0x28
+#define FXOS8700_ASLP_COUNT 0x29
+#define FXOS8700_CTRL_REG1 0x2a
+#define FXOS8700_CTRL_REG2 0x2b
+#define FXOS8700_CTRL_REG3 0x2c
+#define FXOS8700_CTRL_REG4 0x2d
+#define FXOS8700_CTRL_REG5 0x2e
+#define FXOS8700_OFF_X 0x2f
+#define FXOS8700_OFF_Y 0x30
+#define FXOS8700_OFF_Z 0x31
+#define FXOS8700_M_DR_STATUS 0x32
+#define FXOS8700_M_OUT_X_MSB 0x33
+#define FXOS8700_M_OUT_X_LSB 0x34
+#define FXOS8700_M_OUT_Y_MSB 0x35
+#define FXOS8700_M_OUT_Y_LSB 0x36
+#define FXOS8700_M_OUT_Z_MSB 0x37
+#define FXOS8700_M_OUT_Z_LSB 0x38
+#define FXOS8700_CMP_X_MSB 0x39
+#define FXOS8700_CMP_X_LSB 0x3a
+#define FXOS8700_CMP_Y_MSB 0x3b
+#define FXOS8700_CMP_Y_LSB 0x3c
+#define FXOS8700_CMP_Z_MSB 0x3d
+#define FXOS8700_CMP_Z_LSB 0x3e
+#define FXOS8700_M_OFF_X_MSB 0x3f
+#define FXOS8700_M_OFF_X_LSB 0x40
+#define FXOS8700_M_OFF_Y_MSB 0x41
+#define FXOS8700_M_OFF_Y_LSB 0x42
+#define FXOS8700_M_OFF_Z_MSB 0x43
+#define FXOS8700_M_OFF_Z_LSB 0x44
+#define FXOS8700_MAX_X_MSB 0x45
+#define FXOS8700_MAX_X_LSB 0x46
+#define FXOS8700_MAX_Y_MSB 0x47
+#define FXOS8700_MAX_Y_LSB 0x48
+#define FXOS8700_MAX_Z_MSB 0x49
+#define FXOS8700_MAX_Z_LSB 0x4a
+#define FXOS8700_MIN_X_MSB 0x4b
+#define FXOS8700_MIN_X_LSB 0x4c
+#define FXOS8700_MIN_Y_MSB 0x4d
+#define FXOS8700_MIN_Y_LSB 0x4e
+#define FXOS8700_MIN_Z_MSB 0x4f
+#define FXOS8700_MIN_Z_LSB 0x50
+#define FXOS8700_TEMP 0x51
+#define FXOS8700_M_THS_CFG 0x52
+#define FXOS8700_M_THS_SRC 0x53
+#define FXOS8700_M_THS_X_MSB 0x54
+#define FXOS8700_M_THS_X_LSB 0x55
+#define FXOS8700_M_THS_Y_MSB 0x56
+#define FXOS8700_M_THS_Y_LSB 0x57
+#define FXOS8700_M_THS_Z_MSB 0x58
+#define FXOS8700_M_THS_Z_LSB 0x59
+#define FXOS8700_M_THS_COUNT 0x5a
+#define FXOS8700_M_CTRL_REG1 0x5b
+#define FXOS8700_M_CTRL_REG2 0x5c
+#define FXOS8700_M_CTRL_REG3 0x5d
+#define FXOS8700_M_INT_SRC 0x5e
+#define FXOS8700_A_VECM_CFG 0x5f
+#define FXOS8700_A_VECM_THS_MSB 0x60
+#define FXOS8700_A_VECM_THS_LSB 0x61
+#define FXOS8700_A_VECM_CNT 0x62
+#define FXOS8700_A_VECM_INITX_MSB 0x63
+#define FXOS8700_A_VECM_INITX_LSB 0x64
+#define FXOS8700_A_VECM_INITY_MSB 0x65
+#define FXOS8700_A_VECM_INITY_LSB 0x66
+#define FXOS8700_A_VECM_INITZ_MSB 0x67
+#define FXOS8700_A_VECM_INITZ_LSB 0x68
+#define FXOS8700_M_VECM_CFG 0x69
+#define FXOS8700_M_VECM_THS_MSB 0x6a
+#define FXOS8700_M_VECM_THS_LSB 0x6b
+#define FXOS8700_M_VECM_CNT 0x6c
+#define FXOS8700_M_VECM_INITX_MSB 0x6d
+#define FXOS8700_M_VECM_INITX_LSB 0x6e
+#define FXOS8700_M_VECM_INITY_MSB 0x6f
+#define FXOS8700_M_VECM_INITY_LSB 0x70
+#define FXOS8700_M_VECM_INITZ_MSB 0x71
+#define FXOS8700_M_VECM_INITZ_LSB 0x72
+#define FXOS8700_A_FFMT_THS_X_MSB 0x73
+#define FXOS8700_A_FFMT_THS_X_LSB 0x74
+#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
+#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
+#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
+#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
+#define FXOS8700_A_TRAN_INIT_MSB 0x79
+#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
+#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
+#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
+#define FXOS8700_TM_NVM_LOCK 0x7e
+#define FXOS8700_NVM_DATA0_35 0x80
+#define FXOS8700_NVM_DATA_BNK3 0xa4
+#define FXOS8700_NVM_DATA_BNK2 0xa5
+#define FXOS8700_NVM_DATA_BNK1 0xa6
+#define FXOS8700_NVM_DATA_BNK0 0xa7
+
+/* Bit definitions for FXOS8700_CTRL_REG1 */
+#define FXOS8700_CTRL_ODR_MSK 0x38
+#define FXOS8700_CTRL_ODR_MAX 0x00
+#define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3)
+
+/* Bit definitions for FXOS8700_M_CTRL_REG1 */
+#define FXOS8700_HMS_MASK GENMASK(1, 0)
+#define FXOS8700_OS_MASK GENMASK(4, 2)
+
+/* Bit definitions for FXOS8700_M_CTRL_REG2 */
+#define FXOS8700_MAXMIN_RST BIT(2)
+#define FXOS8700_MAXMIN_DIS_THS BIT(3)
+#define FXOS8700_MAXMIN_DIS BIT(4)
+
+#define FXOS8700_ACTIVE 0x01
+#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
+
+#define FXOS8700_DEVICE_ID 0xC7
+#define FXOS8700_PRE_DEVICE_ID 0xC4
+#define FXOS8700_DATA_BUF_SIZE 3
+
+struct fxos8700_data {
+ struct regmap *regmap;
+ struct iio_trigger *trig;
+ __be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
+};
+
+/* Regmap info */
+static const struct regmap_range read_range[] = {
+ {
+ .range_min = FXOS8700_STATUS,
+ .range_max = FXOS8700_A_FFMT_COUNT,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_range write_range[] = {
+ {
+ .range_min = FXOS8700_F_SETUP,
+ .range_max = FXOS8700_TRIG_CFG,
+ }, {
+ .range_min = FXOS8700_XYZ_DATA_CFG,
+ .range_max = FXOS8700_HP_FILTER_CUTOFF,
+ }, {
+ .range_min = FXOS8700_PL_CFG,
+ .range_max = FXOS8700_A_FFMT_CFG,
+ }, {
+ .range_min = FXOS8700_A_FFMT_THS,
+ .range_max = FXOS8700_TRANSIENT_CFG,
+ }, {
+ .range_min = FXOS8700_TRANSIENT_THS,
+ .range_max = FXOS8700_PULSE_CFG,
+ }, {
+ .range_min = FXOS8700_PULSE_THSX,
+ .range_max = FXOS8700_OFF_Z,
+ }, {
+ .range_min = FXOS8700_M_OFF_X_MSB,
+ .range_max = FXOS8700_M_OFF_Z_LSB,
+ }, {
+ .range_min = FXOS8700_M_THS_CFG,
+ .range_max = FXOS8700_M_THS_CFG,
+ }, {
+ .range_min = FXOS8700_M_THS_X_MSB,
+ .range_max = FXOS8700_M_CTRL_REG3,
+ }, {
+ .range_min = FXOS8700_A_VECM_CFG,
+ .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
+ },
+};
+
+static const struct regmap_access_table driver_read_table = {
+ .yes_ranges = read_range,
+ .n_yes_ranges = ARRAY_SIZE(read_range),
+};
+
+static const struct regmap_access_table driver_write_table = {
+ .yes_ranges = write_range,
+ .n_yes_ranges = ARRAY_SIZE(write_range),
+};
+
+const struct regmap_config fxos8700_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = FXOS8700_NVM_DATA_BNK0,
+ .rd_table = &driver_read_table,
+ .wr_table = &driver_write_table,
+};
+EXPORT_SYMBOL(fxos8700_regmap_config);
+
+#define FXOS8700_CHANNEL(_type, _axis) { \
+ .type = _type, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##_axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ), \
+}
+
+enum fxos8700_accel_scale_bits {
+ MODE_2G = 0,
+ MODE_4G,
+ MODE_8G,
+};
+
+/* scan indexes follow DATA register order */
+enum fxos8700_scan_axis {
+ FXOS8700_SCAN_ACCEL_X = 0,
+ FXOS8700_SCAN_ACCEL_Y,
+ FXOS8700_SCAN_ACCEL_Z,
+ FXOS8700_SCAN_MAGN_X,
+ FXOS8700_SCAN_MAGN_Y,
+ FXOS8700_SCAN_MAGN_Z,
+ FXOS8700_SCAN_RHALL,
+ FXOS8700_SCAN_TIMESTAMP,
+};
+
+enum fxos8700_sensor {
+ FXOS8700_ACCEL = 0,
+ FXOS8700_MAGN,
+ FXOS8700_NUM_SENSORS /* must be last */
+};
+
+enum fxos8700_int_pin {
+ FXOS8700_PIN_INT1,
+ FXOS8700_PIN_INT2
+};
+
+struct fxos8700_scale {
+ u8 bits;
+ int uscale;
+};
+
+struct fxos8700_odr {
+ u8 bits;
+ int odr;
+ int uodr;
+};
+
+static const struct fxos8700_scale fxos8700_accel_scale[] = {
+ { MODE_2G, 244},
+ { MODE_4G, 488},
+ { MODE_8G, 976},
+};
+
+/*
+ * Accellerometer and magnetometer have the same ODR options, set in the
+ * CTRL_REG1 register. ODR is halved when using both sensors at once in
+ * hybrid mode.
+ */
+static const struct fxos8700_odr fxos8700_odr[] = {
+ {0x00, 800, 0},
+ {0x01, 400, 0},
+ {0x02, 200, 0},
+ {0x03, 100, 0},
+ {0x04, 50, 0},
+ {0x05, 12, 500000},
+ {0x06, 6, 250000},
+ {0x07, 1, 562500},
+};
+
+static const struct iio_chan_spec fxos8700_channels[] = {
+ FXOS8700_CHANNEL(IIO_ACCEL, X),
+ FXOS8700_CHANNEL(IIO_ACCEL, Y),
+ FXOS8700_CHANNEL(IIO_ACCEL, Z),
+ FXOS8700_CHANNEL(IIO_MAGN, X),
+ FXOS8700_CHANNEL(IIO_MAGN, Y),
+ FXOS8700_CHANNEL(IIO_MAGN, Z),
+ IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
+};
+
+static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
+{
+ switch (iio_type) {
+ case IIO_ACCEL:
+ return FXOS8700_ACCEL;
+ case IIO_ANGL_VEL:
+ return FXOS8700_MAGN;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_set_active_mode(struct fxos8700_data *data,
+ enum fxos8700_sensor t, bool mode)
+{
+ int ret;
+
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
+ if (ret)
+ return ret;
+
+ usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
+ FXOS8700_ACTIVE_MIN_USLEEP + 1000);
+
+ return 0;
+}
+
+static int fxos8700_set_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int uscale)
+{
+ int i;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+ struct device *dev = regmap_get_device(data->regmap);
+
+ if (t == FXOS8700_MAGN) {
+ dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].uscale == uscale)
+ break;
+
+ if (i == scale_num)
+ return -EINVAL;
+
+ return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
+ fxos8700_accel_scale[i].bits);
+}
+
+static int fxos8700_get_scale(struct fxos8700_data *data,
+ enum fxos8700_sensor t, int *uscale)
+{
+ int i, ret, val;
+ static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
+
+ if (t == FXOS8700_MAGN) {
+ *uscale = 1200; /* Magnetometer is locked at 1200uT */
+ return 0;
+ }
+
+ ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < scale_num; i++)
+ if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
+ *uscale = fxos8700_accel_scale[i].uscale;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
+ int axis, int *val)
+{
+ u8 base, reg;
+ int ret;
+ enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
+
+ base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
+
+ /* Block read 6 bytes of device output registers to avoid data loss */
+ ret = regmap_bulk_read(data->regmap, base, data->buf,
+ FXOS8700_DATA_BUF_SIZE);
+ if (ret)
+ return ret;
+
+ /* Convert axis to buffer index */
+ reg = axis - IIO_MOD_X;
+
+ /* Convert to native endianness */
+ *val = sign_extend32(be16_to_cpu(data->buf[reg]), 15);
+
+ return 0;
+}
+
+static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int odr, int uodr)
+{
+ int i, ret, val;
+ bool active_mode;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ active_mode = val & FXOS8700_ACTIVE;
+
+ if (active_mode) {
+ /*
+ * The device must be in standby mode to change any of the
+ * other fields within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ val & ~FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < odr_num; i++)
+ if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ return regmap_update_bits(data->regmap,
+ FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
+ fxos8700_odr[i].bits << 3 | active_mode);
+}
+
+static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
+ int *odr, int *uodr)
+{
+ int i, val, ret;
+ static const int odr_num = ARRAY_SIZE(fxos8700_odr);
+
+ ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
+ if (ret)
+ return ret;
+
+ val &= FXOS8700_CTRL_ODR_MSK;
+
+ for (i = 0; i < odr_num; i++)
+ if (val == fxos8700_odr[i].bits)
+ break;
+
+ if (i >= odr_num)
+ return -EINVAL;
+
+ *odr = fxos8700_odr[i].odr;
+ *uodr = fxos8700_odr[i].uodr;
+
+ return 0;
+}
+
+static int fxos8700_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ int ret;
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
+ if (ret)
+ return ret;
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int fxos8700_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct fxos8700_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SCALE:
+ return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
+ val2);
+ break;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
+ val, val2);
+ default:
+ return -EINVAL;
+ }
+}
+
+static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
+ "1.5625 6.25 12.5 50 100 200 400 800");
+static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
+static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
+
+static struct attribute *fxos8700_attrs[] = {
+ &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
+ &iio_const_attr_in_accel_scale_available.dev_attr.attr,
+ &iio_const_attr_in_magn_scale_available.dev_attr.attr,
+ NULL,
+};
+
+static const struct attribute_group fxos8700_attrs_group = {
+ .attrs = fxos8700_attrs,
+};
+
+static const struct iio_info fxos8700_info = {
+ .read_raw = fxos8700_read_raw,
+ .write_raw = fxos8700_write_raw,
+ .attrs = &fxos8700_attrs_group,
+};
+
+static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
+{
+ int ret;
+ unsigned int val;
+ struct device *dev = regmap_get_device(data->regmap);
+
+ ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
+ if (ret) {
+ dev_err(dev, "Error reading chip id\n");
+ return ret;
+ }
+ if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
+ dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
+ val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
+ return -ENODEV;
+ }
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
+ if (ret)
+ return ret;
+
+ ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
+ if (ret)
+ return ret;
+
+ /*
+ * The device must be in standby mode to change any of the other fields
+ * within CTRL_REG1
+ */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
+ if (ret)
+ return ret;
+ /* Set max oversample ratio (OSR) and both devices active */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
+ FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
+ if (ret)
+ return ret;
+ /* Disable and rst min/max measurements & threshold */
+ ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
+ FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
+ FXOS8700_MAXMIN_DIS);
+ if (ret)
+ return ret;
+ /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
+ ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
+ FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
+ if (ret)
+ return ret;
+ /* Set for max full-scale range (+/-8G) */
+ ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static void fxos8700_chip_uninit(void *data)
+{
+ struct fxos8700_data *fxos8700_data = data;
+
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
+ fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
+}
+
+int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name, bool use_spi)
+{
+ struct iio_dev *indio_dev;
+ struct fxos8700_data *data;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ dev_set_drvdata(dev, indio_dev);
+ data->regmap = regmap;
+
+ ret = fxos8700_chip_init(data, use_spi);
+ if (ret)
+ return ret;
+
+ ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
+ if (ret)
+ return ret;
+
+ indio_dev->dev.parent = dev;
+ indio_dev->channels = fxos8700_channels;
+ indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
+ indio_dev->name = name ? name : "fxos8700";
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &fxos8700_info;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_GPL(fxos8700_core_probe);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
new file mode 100644
index 0000000..c8e574e
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_i2c.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU, I2C bits
+ *
+ * 7-bit I2C slave address determined by SA1 and SA0 logic level
+ * inputs represented in the following table:
+ * SA1 | SA0 | Slave Address
+ * 0 | 0 | 0x1E
+ * 0 | 1 | 0x1D
+ * 1 | 0 | 0x1C
+ * 1 | 1 | 0x1F
+ */
+#include <linux/acpi.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/regmap.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct regmap *regmap;
+ const char *name = NULL;
+
+ regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&client->dev, "Failed to register i2c regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ if (id)
+ name = id->name;
+
+ return fxos8700_core_probe(&client->dev, regmap, name, false);
+}
+
+static const struct i2c_device_id fxos8700_i2c_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "nxp,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct i2c_driver fxos8700_i2c_driver = {
+ .driver = {
+ .name = "fxos8700_i2c",
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = of_match_ptr(fxos8700_of_match),
+ },
+ .probe = fxos8700_i2c_probe,
+ .id_table = fxos8700_i2c_id,
+};
+module_i2c_driver(fxos8700_i2c_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 I2C driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
new file mode 100644
index 0000000..444bcd4
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_spi.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FXOS8700 - NXP IMU, I2C bits
+ */
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include "fxos8700.h"
+
+static int fxos8700_spi_probe(struct spi_device *spi)
+{
+ struct regmap *regmap;
+ const struct spi_device_id *id = spi_get_device_id(spi);
+
+ regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&spi->dev, "Failed to register spi regmap %d\n",
+ (int)PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+ return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
+}
+
+static const struct spi_device_id fxos8700_spi_id[] = {
+ {"fxos8700", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
+
+static const struct acpi_device_id fxos8700_acpi_match[] = {
+ {"FXOS8700", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
+
+static const struct of_device_id fxos8700_of_match[] = {
+ { .compatible = "nxp,fxos8700" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, fxos8700_of_match);
+
+static struct spi_driver fxos8700_spi_driver = {
+ .probe = fxos8700_spi_probe,
+ .id_table = fxos8700_spi_id,
+ .driver = {
+ .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
+ .of_match_table = fxos8700_of_match,
+ .name = "fxos8700_spi",
+ },
+};
+module_spi_driver(fxos8700_spi_driver);
+
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 SPI driver");
+MODULE_LICENSE("GPL v2");
--
2.9.2
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-14 18:49 ` [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
@ 2019-10-16 12:55 ` Rob Herring
2019-10-22 9:25 ` Jonathan Cameron
0 siblings, 1 reply; 24+ messages in thread
From: Rob Herring @ 2019-10-16 12:55 UTC (permalink / raw)
To: Robert Jones
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland,
open list:IIO SUBSYSTEM AND DRIVERS, devicetree
On Mon, Oct 14, 2019 at 1:49 PM Robert Jones <rjones@gateworks.com> wrote:
>
> This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> device-tree bindings.
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
> ---
> .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 76 ++++++++++++++++++++++
> 1 file changed, 76 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-14 18:49 ` [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
@ 2019-10-21 17:15 ` Bobby Jones
2019-10-22 9:25 ` Jonathan Cameron
1 sibling, 0 replies; 24+ messages in thread
From: Bobby Jones @ 2019-10-21 17:15 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree
Hello Jonathan,
Just wanted to check to see if you had gotten a chance to look at my
response to your questions and the following submission. I was able
to get a reviewed-by from Rob on the device tree bindings, and I have
some free time to work on this if you have any feedback.
Regards,
Bobby
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU
2019-10-14 18:49 ` [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-21 17:15 ` Bobby Jones
@ 2019-10-22 9:25 ` Jonathan Cameron
1 sibling, 0 replies; 24+ messages in thread
From: Jonathan Cameron @ 2019-10-22 9:25 UTC (permalink / raw)
To: Robert Jones
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Rob Herring, Mark Rutland, linux-iio, devicetree
On Mon, 14 Oct 2019 11:49:21 -0700
Robert Jones <rjones@gateworks.com> wrote:
> FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
> magnetometer combined into a single package. The device features a
> selectable I2C or point-to-point SPI serial interface with 14-bit
> accelerometer and 16-bit magnetometer ADC resolution along with
> smart-embedded functions.
>
> FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
> ±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
> Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
> for each sensor. Interleaved magnetic and acceleration data is available
> at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
> package and it is guaranteed to operate over the extended temperature
> range of –40 °C to +85 °C.
>
> TODO: Trigger and IRQ configuration support
>
> Datasheet:
> http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
>
> Signed-off-by: Robert Jones <rjones@gateworks.com>
Hi,
There are a spattering of minor things inline but as they are all really
trivial I've just tidied them up whilst applying.
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.
Thanks,
Jonathan
> ---
> drivers/iio/imu/Kconfig | 27 ++
> drivers/iio/imu/Makefile | 5 +
> drivers/iio/imu/fxos8700.h | 10 +
> drivers/iio/imu/fxos8700_core.c | 649 ++++++++++++++++++++++++++++++++++++++++
> drivers/iio/imu/fxos8700_i2c.c | 71 +++++
> drivers/iio/imu/fxos8700_spi.c | 58 ++++
> 6 files changed, 820 insertions(+)
> create mode 100644 drivers/iio/imu/fxos8700.h
> create mode 100644 drivers/iio/imu/fxos8700_core.c
> create mode 100644 drivers/iio/imu/fxos8700_i2c.c
> create mode 100644 drivers/iio/imu/fxos8700_spi.c
>
> diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
> index f3c7282..60bb102 100644
> --- a/drivers/iio/imu/Kconfig
> +++ b/drivers/iio/imu/Kconfig
> @@ -40,6 +40,33 @@ config ADIS16480
>
> source "drivers/iio/imu/bmi160/Kconfig"
>
> +config FXOS8700
> + tristate
> +
> +config FXOS8700_I2C
> + tristate "NXP FXOS8700 I2C driver"
> + depends on I2C
> + select FXOS8700
> + select REGMAP_I2C
> + help
> + Say yes here to build support for the NXP FXOS8700 m+g combo
> + sensor on I2C.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_i2c.
> +
> +config FXOS8700_SPI
> + tristate "NXP FXOS8700 SPI driver"
> + depends on SPI
> + select FXOS8700
> + select REGMAP_SPI
> + help
> + Say yes here to build support for the NXP FXOS8700 m+g combo
> + sensor on SPI.
> +
> + This driver can also be built as a module. If so, the module will be
> + called fxos8700_spi.
> +
> config KMX61
> tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
> depends on I2C
> diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
> index 4a69588..5237fd4 100644
> --- a/drivers/iio/imu/Makefile
> +++ b/drivers/iio/imu/Makefile
> @@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
> obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
>
> obj-y += bmi160/
> +
> +obj-$(CONFIG_FXOS8700) += fxos8700_core.o
> +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
> +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
> +
> obj-y += inv_mpu6050/
>
> obj-$(CONFIG_KMX61) += kmx61.o
> diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
> new file mode 100644
> index 0000000..6dfb8d7
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700.h
> @@ -0,0 +1,10 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef FXOS8700_H_
> +#define FXOS8700_H_
> +
> +extern const struct regmap_config fxos8700_regmap_config;
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi);
> +
> +#endif /* FXOS8700_H_ */
> diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
> new file mode 100644
> index 0000000..610ce7d
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_core.c
> @@ -0,0 +1,649 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
> + *
> + * IIO core driver for FXOS8700, with support for I2C/SPI busses
> + *
> + * TODO: Buffer, trigger, and IRQ support
> + */
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <linux/acpi.h>
> +#include <linux/bitops.h>
> +
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +
> +#include "fxos8700.h"
> +
> +/* Register Definitions */
> +#define FXOS8700_STATUS 0x00
> +#define FXOS8700_OUT_X_MSB 0x01
> +#define FXOS8700_OUT_X_LSB 0x02
> +#define FXOS8700_OUT_Y_MSB 0x03
> +#define FXOS8700_OUT_Y_LSB 0x04
> +#define FXOS8700_OUT_Z_MSB 0x05
> +#define FXOS8700_OUT_Z_LSB 0x06
> +#define FXOS8700_F_SETUP 0x09
> +#define FXOS8700_TRIG_CFG 0x0a
> +#define FXOS8700_SYSMOD 0x0b
> +#define FXOS8700_INT_SOURCE 0x0c
> +#define FXOS8700_WHO_AM_I 0x0d
> +#define FXOS8700_XYZ_DATA_CFG 0x0e
> +#define FXOS8700_HP_FILTER_CUTOFF 0x0f
> +#define FXOS8700_PL_STATUS 0x10
> +#define FXOS8700_PL_CFG 0x11
> +#define FXOS8700_PL_COUNT 0x12
> +#define FXOS8700_PL_BF_ZCOMP 0x13
> +#define FXOS8700_PL_THS_REG 0x14
> +#define FXOS8700_A_FFMT_CFG 0x15
> +#define FXOS8700_A_FFMT_SRC 0x16
> +#define FXOS8700_A_FFMT_THS 0x17
> +#define FXOS8700_A_FFMT_COUNT 0x18
> +#define FXOS8700_TRANSIENT_CFG 0x1d
> +#define FXOS8700_TRANSIENT_SRC 0x1e
> +#define FXOS8700_TRANSIENT_THS 0x1f
> +#define FXOS8700_TRANSIENT_COUNT 0x20
> +#define FXOS8700_PULSE_CFG 0x21
> +#define FXOS8700_PULSE_SRC 0x22
> +#define FXOS8700_PULSE_THSX 0x23
> +#define FXOS8700_PULSE_THSY 0x24
> +#define FXOS8700_PULSE_THSZ 0x25
> +#define FXOS8700_PULSE_TMLT 0x26
> +#define FXOS8700_PULSE_LTCY 0x27
> +#define FXOS8700_PULSE_WIND 0x28
> +#define FXOS8700_ASLP_COUNT 0x29
> +#define FXOS8700_CTRL_REG1 0x2a
> +#define FXOS8700_CTRL_REG2 0x2b
> +#define FXOS8700_CTRL_REG3 0x2c
> +#define FXOS8700_CTRL_REG4 0x2d
> +#define FXOS8700_CTRL_REG5 0x2e
> +#define FXOS8700_OFF_X 0x2f
> +#define FXOS8700_OFF_Y 0x30
> +#define FXOS8700_OFF_Z 0x31
> +#define FXOS8700_M_DR_STATUS 0x32
> +#define FXOS8700_M_OUT_X_MSB 0x33
> +#define FXOS8700_M_OUT_X_LSB 0x34
> +#define FXOS8700_M_OUT_Y_MSB 0x35
> +#define FXOS8700_M_OUT_Y_LSB 0x36
> +#define FXOS8700_M_OUT_Z_MSB 0x37
> +#define FXOS8700_M_OUT_Z_LSB 0x38
> +#define FXOS8700_CMP_X_MSB 0x39
> +#define FXOS8700_CMP_X_LSB 0x3a
> +#define FXOS8700_CMP_Y_MSB 0x3b
> +#define FXOS8700_CMP_Y_LSB 0x3c
> +#define FXOS8700_CMP_Z_MSB 0x3d
> +#define FXOS8700_CMP_Z_LSB 0x3e
> +#define FXOS8700_M_OFF_X_MSB 0x3f
> +#define FXOS8700_M_OFF_X_LSB 0x40
> +#define FXOS8700_M_OFF_Y_MSB 0x41
> +#define FXOS8700_M_OFF_Y_LSB 0x42
> +#define FXOS8700_M_OFF_Z_MSB 0x43
> +#define FXOS8700_M_OFF_Z_LSB 0x44
> +#define FXOS8700_MAX_X_MSB 0x45
> +#define FXOS8700_MAX_X_LSB 0x46
> +#define FXOS8700_MAX_Y_MSB 0x47
> +#define FXOS8700_MAX_Y_LSB 0x48
> +#define FXOS8700_MAX_Z_MSB 0x49
> +#define FXOS8700_MAX_Z_LSB 0x4a
> +#define FXOS8700_MIN_X_MSB 0x4b
> +#define FXOS8700_MIN_X_LSB 0x4c
> +#define FXOS8700_MIN_Y_MSB 0x4d
> +#define FXOS8700_MIN_Y_LSB 0x4e
> +#define FXOS8700_MIN_Z_MSB 0x4f
> +#define FXOS8700_MIN_Z_LSB 0x50
> +#define FXOS8700_TEMP 0x51
> +#define FXOS8700_M_THS_CFG 0x52
> +#define FXOS8700_M_THS_SRC 0x53
> +#define FXOS8700_M_THS_X_MSB 0x54
> +#define FXOS8700_M_THS_X_LSB 0x55
> +#define FXOS8700_M_THS_Y_MSB 0x56
> +#define FXOS8700_M_THS_Y_LSB 0x57
> +#define FXOS8700_M_THS_Z_MSB 0x58
> +#define FXOS8700_M_THS_Z_LSB 0x59
> +#define FXOS8700_M_THS_COUNT 0x5a
> +#define FXOS8700_M_CTRL_REG1 0x5b
> +#define FXOS8700_M_CTRL_REG2 0x5c
> +#define FXOS8700_M_CTRL_REG3 0x5d
> +#define FXOS8700_M_INT_SRC 0x5e
> +#define FXOS8700_A_VECM_CFG 0x5f
> +#define FXOS8700_A_VECM_THS_MSB 0x60
> +#define FXOS8700_A_VECM_THS_LSB 0x61
> +#define FXOS8700_A_VECM_CNT 0x62
> +#define FXOS8700_A_VECM_INITX_MSB 0x63
> +#define FXOS8700_A_VECM_INITX_LSB 0x64
> +#define FXOS8700_A_VECM_INITY_MSB 0x65
> +#define FXOS8700_A_VECM_INITY_LSB 0x66
> +#define FXOS8700_A_VECM_INITZ_MSB 0x67
> +#define FXOS8700_A_VECM_INITZ_LSB 0x68
> +#define FXOS8700_M_VECM_CFG 0x69
> +#define FXOS8700_M_VECM_THS_MSB 0x6a
> +#define FXOS8700_M_VECM_THS_LSB 0x6b
> +#define FXOS8700_M_VECM_CNT 0x6c
> +#define FXOS8700_M_VECM_INITX_MSB 0x6d
> +#define FXOS8700_M_VECM_INITX_LSB 0x6e
> +#define FXOS8700_M_VECM_INITY_MSB 0x6f
> +#define FXOS8700_M_VECM_INITY_LSB 0x70
> +#define FXOS8700_M_VECM_INITZ_MSB 0x71
> +#define FXOS8700_M_VECM_INITZ_LSB 0x72
> +#define FXOS8700_A_FFMT_THS_X_MSB 0x73
> +#define FXOS8700_A_FFMT_THS_X_LSB 0x74
> +#define FXOS8700_A_FFMT_THS_Y_MSB 0x75
> +#define FXOS8700_A_FFMT_THS_Y_LSB 0x76
> +#define FXOS8700_A_FFMT_THS_Z_MSB 0x77
> +#define FXOS8700_A_FFMT_THS_Z_LSB 0x78
> +#define FXOS8700_A_TRAN_INIT_MSB 0x79
> +#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a
> +#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b
> +#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d
> +#define FXOS8700_TM_NVM_LOCK 0x7e
> +#define FXOS8700_NVM_DATA0_35 0x80
> +#define FXOS8700_NVM_DATA_BNK3 0xa4
> +#define FXOS8700_NVM_DATA_BNK2 0xa5
> +#define FXOS8700_NVM_DATA_BNK1 0xa6
> +#define FXOS8700_NVM_DATA_BNK0 0xa7
> +
> +/* Bit definitions for FXOS8700_CTRL_REG1 */
> +#define FXOS8700_CTRL_ODR_MSK 0x38
> +#define FXOS8700_CTRL_ODR_MAX 0x00
> +#define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3)
> +
> +/* Bit definitions for FXOS8700_M_CTRL_REG1 */
> +#define FXOS8700_HMS_MASK GENMASK(1, 0)
> +#define FXOS8700_OS_MASK GENMASK(4, 2)
> +
> +/* Bit definitions for FXOS8700_M_CTRL_REG2 */
> +#define FXOS8700_MAXMIN_RST BIT(2)
> +#define FXOS8700_MAXMIN_DIS_THS BIT(3)
> +#define FXOS8700_MAXMIN_DIS BIT(4)
> +
> +#define FXOS8700_ACTIVE 0x01
> +#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */
> +
> +#define FXOS8700_DEVICE_ID 0xC7
> +#define FXOS8700_PRE_DEVICE_ID 0xC4
> +#define FXOS8700_DATA_BUF_SIZE 3
> +
> +struct fxos8700_data {
> + struct regmap *regmap;
> + struct iio_trigger *trig;
> + __be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
> +};
> +
> +/* Regmap info */
> +static const struct regmap_range read_range[] = {
> + {
> + .range_min = FXOS8700_STATUS,
> + .range_max = FXOS8700_A_FFMT_COUNT,
> + }, {
> + .range_min = FXOS8700_TRANSIENT_CFG,
> + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> + },
> +};
> +
> +static const struct regmap_range write_range[] = {
> + {
> + .range_min = FXOS8700_F_SETUP,
> + .range_max = FXOS8700_TRIG_CFG,
> + }, {
> + .range_min = FXOS8700_XYZ_DATA_CFG,
> + .range_max = FXOS8700_HP_FILTER_CUTOFF,
> + }, {
> + .range_min = FXOS8700_PL_CFG,
> + .range_max = FXOS8700_A_FFMT_CFG,
> + }, {
> + .range_min = FXOS8700_A_FFMT_THS,
> + .range_max = FXOS8700_TRANSIENT_CFG,
> + }, {
> + .range_min = FXOS8700_TRANSIENT_THS,
> + .range_max = FXOS8700_PULSE_CFG,
> + }, {
> + .range_min = FXOS8700_PULSE_THSX,
> + .range_max = FXOS8700_OFF_Z,
> + }, {
> + .range_min = FXOS8700_M_OFF_X_MSB,
> + .range_max = FXOS8700_M_OFF_Z_LSB,
> + }, {
> + .range_min = FXOS8700_M_THS_CFG,
> + .range_max = FXOS8700_M_THS_CFG,
> + }, {
> + .range_min = FXOS8700_M_THS_X_MSB,
> + .range_max = FXOS8700_M_CTRL_REG3,
> + }, {
> + .range_min = FXOS8700_A_VECM_CFG,
> + .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
> + },
> +};
> +
> +static const struct regmap_access_table driver_read_table = {
> + .yes_ranges = read_range,
> + .n_yes_ranges = ARRAY_SIZE(read_range),
> +};
> +
> +static const struct regmap_access_table driver_write_table = {
> + .yes_ranges = write_range,
> + .n_yes_ranges = ARRAY_SIZE(write_range),
> +};
> +
> +const struct regmap_config fxos8700_regmap_config = {
> + .reg_bits = 8,
> + .val_bits = 8,
> + .max_register = FXOS8700_NVM_DATA_BNK0,
> + .rd_table = &driver_read_table,
> + .wr_table = &driver_write_table,
> +};
> +EXPORT_SYMBOL(fxos8700_regmap_config);
> +
> +#define FXOS8700_CHANNEL(_type, _axis) { \
> + .type = _type, \
> + .modified = 1, \
> + .channel2 = IIO_MOD_##_axis, \
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
> + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> +}
> +
> +enum fxos8700_accel_scale_bits {
> + MODE_2G = 0,
> + MODE_4G,
> + MODE_8G,
> +};
> +
> +/* scan indexes follow DATA register order */
> +enum fxos8700_scan_axis {
> + FXOS8700_SCAN_ACCEL_X = 0,
> + FXOS8700_SCAN_ACCEL_Y,
> + FXOS8700_SCAN_ACCEL_Z,
> + FXOS8700_SCAN_MAGN_X,
> + FXOS8700_SCAN_MAGN_Y,
> + FXOS8700_SCAN_MAGN_Z,
> + FXOS8700_SCAN_RHALL,
> + FXOS8700_SCAN_TIMESTAMP,
> +};
> +
> +enum fxos8700_sensor {
> + FXOS8700_ACCEL = 0,
> + FXOS8700_MAGN,
> + FXOS8700_NUM_SENSORS /* must be last */
> +};
> +
> +enum fxos8700_int_pin {
> + FXOS8700_PIN_INT1,
> + FXOS8700_PIN_INT2
> +};
> +
> +struct fxos8700_scale {
> + u8 bits;
> + int uscale;
> +};
> +
> +struct fxos8700_odr {
> + u8 bits;
> + int odr;
> + int uodr;
> +};
> +
> +static const struct fxos8700_scale fxos8700_accel_scale[] = {
> + { MODE_2G, 244},
> + { MODE_4G, 488},
> + { MODE_8G, 976},
> +};
> +
> +/*
> + * Accellerometer and magnetometer have the same ODR options, set in the
> + * CTRL_REG1 register. ODR is halved when using both sensors at once in
> + * hybrid mode.
> + */
> +static const struct fxos8700_odr fxos8700_odr[] = {
> + {0x00, 800, 0},
> + {0x01, 400, 0},
> + {0x02, 200, 0},
> + {0x03, 100, 0},
> + {0x04, 50, 0},
> + {0x05, 12, 500000},
> + {0x06, 6, 250000},
> + {0x07, 1, 562500},
> +};
> +
> +static const struct iio_chan_spec fxos8700_channels[] = {
> + FXOS8700_CHANNEL(IIO_ACCEL, X),
> + FXOS8700_CHANNEL(IIO_ACCEL, Y),
> + FXOS8700_CHANNEL(IIO_ACCEL, Z),
> + FXOS8700_CHANNEL(IIO_MAGN, X),
> + FXOS8700_CHANNEL(IIO_MAGN, Y),
> + FXOS8700_CHANNEL(IIO_MAGN, Z),
> + IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
> +};
> +
> +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
> +{
> + switch (iio_type) {
> + case IIO_ACCEL:
> + return FXOS8700_ACCEL;
> + case IIO_ANGL_VEL:
> + return FXOS8700_MAGN;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int fxos8700_set_active_mode(struct fxos8700_data *data,
> + enum fxos8700_sensor t, bool mode)
> +{
> + int ret;
> +
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
> + if (ret)
> + return ret;
> +
> + usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
> + FXOS8700_ACTIVE_MIN_USLEEP + 1000);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int uscale)
> +{
> + int i;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + if (t == FXOS8700_MAGN) {
> + dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
> + return -EINVAL;
> + }
> +
> + for (i = 0; i < scale_num; i++)
> + if (fxos8700_accel_scale[i].uscale == uscale)
> + break;
> +
> + if (i == scale_num)
> + return -EINVAL;
> +
> + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
> + fxos8700_accel_scale[i].bits);
> +}
> +
> +static int fxos8700_get_scale(struct fxos8700_data *data,
> + enum fxos8700_sensor t, int *uscale)
> +{
> + int i, ret, val;
> + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
> +
> + if (t == FXOS8700_MAGN) {
> + *uscale = 1200; /* Magnetometer is locked at 1200uT */
> + return 0;
> + }
> +
> + ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
> + if (ret)
> + return ret;
> +
> + for (i = 0; i < scale_num; i++)
The rules on this in kernel style are a bit confusing, but normally
if you have a multiple line block it's better to add brackets
around it.
> + if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
> + *uscale = fxos8700_accel_scale[i].uscale;
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
> + int axis, int *val)
> +{
> + u8 base, reg;
> + int ret;
> + enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
> +
> + base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
> +
> + /* Block read 6 bytes of device output registers to avoid data loss */
> + ret = regmap_bulk_read(data->regmap, base, data->buf,
> + FXOS8700_DATA_BUF_SIZE);
> + if (ret)
> + return ret;
> +
> + /* Convert axis to buffer index */
> + reg = axis - IIO_MOD_X;
> +
> + /* Convert to native endianness */
> + *val = sign_extend32(be16_to_cpu(data->buf[reg]), 15);
> +
> + return 0;
> +}
> +
> +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int odr, int uodr)
> +{
> + int i, ret, val;
> + bool active_mode;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + active_mode = val & FXOS8700_ACTIVE;
> +
> + if (active_mode) {
> + /*
> + * The device must be in standby mode to change any of the
> + * other fields within CTRL_REG1
> + */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + val & ~FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + }
> +
> + for (i = 0; i < odr_num; i++)
> + if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + return regmap_update_bits(data->regmap,
> + FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
> + fxos8700_odr[i].bits << 3 | active_mode);
> +}
> +
> +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
> + int *odr, int *uodr)
> +{
> + int i, val, ret;
> + static const int odr_num = ARRAY_SIZE(fxos8700_odr);
> +
> + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
> + if (ret)
> + return ret;
> +
> + val &= FXOS8700_CTRL_ODR_MSK;
> +
> + for (i = 0; i < odr_num; i++)
> + if (val == fxos8700_odr[i].bits)
> + break;
> +
> + if (i >= odr_num)
> + return -EINVAL;
> +
> + *odr = fxos8700_odr[i].odr;
> + *uodr = fxos8700_odr[i].uodr;
> +
> + return 0;
> +}
> +
> +static int fxos8700_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> + int ret;
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
> + if (ret)
> + return ret;
> + return IIO_VAL_INT;
> + case IIO_CHAN_INFO_SCALE:
> + *val = 0;
> + ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int fxos8700_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int val, int val2, long mask)
> +{
> + struct fxos8700_data *data = iio_priv(indio_dev);
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_SCALE:
> + return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
> + val2);
> + break;
Can't reach this break.
> + case IIO_CHAN_INFO_SAMP_FREQ:
> + return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
> + val, val2);
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
> + "1.5625 6.25 12.5 50 100 200 400 800");
> +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
> +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
> +
> +static struct attribute *fxos8700_attrs[] = {
> + &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
> + &iio_const_attr_in_accel_scale_available.dev_attr.attr,
> + &iio_const_attr_in_magn_scale_available.dev_attr.attr,
> + NULL,
> +};
> +
> +static const struct attribute_group fxos8700_attrs_group = {
> + .attrs = fxos8700_attrs,
> +};
> +
> +static const struct iio_info fxos8700_info = {
> + .read_raw = fxos8700_read_raw,
> + .write_raw = fxos8700_write_raw,
> + .attrs = &fxos8700_attrs_group,
> +};
> +
> +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
> +{
> + int ret;
> + unsigned int val;
> + struct device *dev = regmap_get_device(data->regmap);
> +
> + ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
> + if (ret) {
> + dev_err(dev, "Error reading chip id\n");
> + return ret;
> + }
> + if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
> + dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
> + val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
> + return -ENODEV;
> + }
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
> + if (ret)
> + return ret;
> +
> + ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
> + if (ret)
> + return ret;
> +
> + /*
> + * The device must be in standby mode to change any of the other fields
> + * within CTRL_REG1
> + */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
> + if (ret)
> + return ret;
Some extra white space in here would make the blocks a tiny bit more
readable. You have done this nicely above.
> + /* Set max oversample ratio (OSR) and both devices active */
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
> + FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
> + if (ret)
> + return ret;
> + /* Disable and rst min/max measurements & threshold */
> + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
> + FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
> + FXOS8700_MAXMIN_DIS);
> + if (ret)
> + return ret;
> + /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
> + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
> + FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
> + if (ret)
> + return ret;
> + /* Set for max full-scale range (+/-8G) */
> + ret = regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
> + if (ret)
> + return ret;
No point in going through this extra dance for the last one.
return regmap_write(...) is the same thing.
> +
> + return 0;
> +}
> +
> +static void fxos8700_chip_uninit(void *data)
> +{
> + struct fxos8700_data *fxos8700_data = data;
> +
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
> + fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
> +}
> +
> +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
> + const char *name, bool use_spi)
> +{
> + struct iio_dev *indio_dev;
> + struct fxos8700_data *data;
> + int ret;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + data = iio_priv(indio_dev);
> + dev_set_drvdata(dev, indio_dev);
> + data->regmap = regmap;
> +
> + ret = fxos8700_chip_init(data, use_spi);
> + if (ret)
> + return ret;
> +
> + ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
> + if (ret)
> + return ret;
> +
> + indio_dev->dev.parent = dev;
> + indio_dev->channels = fxos8700_channels;
> + indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
> + indio_dev->name = name ? name : "fxos8700";
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &fxos8700_info;
> +
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +EXPORT_SYMBOL_GPL(fxos8700_core_probe);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
> new file mode 100644
> index 0000000..c8e574e
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_i2c.c
> @@ -0,0 +1,71 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU, I2C bits
> + *
> + * 7-bit I2C slave address determined by SA1 and SA0 logic level
> + * inputs represented in the following table:
> + * SA1 | SA0 | Slave Address
> + * 0 | 0 | 0x1E
> + * 0 | 1 | 0x1D
> + * 1 | 0 | 0x1C
> + * 1 | 1 | 0x1F
> + */
> +#include <linux/acpi.h>
> +#include <linux/i2c.h>
> +#include <linux/module.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/regmap.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_i2c_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct regmap *regmap;
> + const char *name = NULL;
> +
> + regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&client->dev, "Failed to register i2c regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> +
> + if (id)
> + name = id->name;
> +
> + return fxos8700_core_probe(&client->dev, regmap, name, false);
> +}
> +
> +static const struct i2c_device_id fxos8700_i2c_id[] = {
> + {"fxos8700", 0},
> + {}
> +};
> +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + {}
As in SPI case inconsistent on the formatting. I don't really
care which is used, but best to be consistent.
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "nxp,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +
> +static struct i2c_driver fxos8700_i2c_driver = {
> + .driver = {
> + .name = "fxos8700_i2c",
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = of_match_ptr(fxos8700_of_match),
Please don't use of_match_ptr as it breaks using the
magic PRP001 ACPI ID which then uses the of bindings.
> + },
> + .probe = fxos8700_i2c_probe,
> + .id_table = fxos8700_i2c_id,
> +};
> +module_i2c_driver(fxos8700_i2c_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 I2C driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
> new file mode 100644
> index 0000000..444bcd4
> --- /dev/null
> +++ b/drivers/iio/imu/fxos8700_spi.c
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * FXOS8700 - NXP IMU, I2C bits
This is the SPI bits ;)
> + */
> +#include <linux/acpi.h>
> +#include <linux/module.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/regmap.h>
> +#include <linux/spi/spi.h>
> +
> +#include "fxos8700.h"
> +
> +static int fxos8700_spi_probe(struct spi_device *spi)
> +{
> + struct regmap *regmap;
> + const struct spi_device_id *id = spi_get_device_id(spi);
> +
> + regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
> + if (IS_ERR(regmap)) {
> + dev_err(&spi->dev, "Failed to register spi regmap %d\n",
> + (int)PTR_ERR(regmap));
> + return PTR_ERR(regmap);
> + }
> + return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
> +}
> +
> +static const struct spi_device_id fxos8700_spi_id[] = {
> + {"fxos8700", 0},
Inconsistent formatting between these various id tables.
{ },
in the others.
> + {}
> +};
> +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
> +
> +static const struct acpi_device_id fxos8700_acpi_match[] = {
> + {"FXOS8700", 0},
> + { },
> +};
> +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
> +
> +static const struct of_device_id fxos8700_of_match[] = {
> + { .compatible = "nxp,fxos8700" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
> +
> +static struct spi_driver fxos8700_spi_driver = {
> + .probe = fxos8700_spi_probe,
> + .id_table = fxos8700_spi_id,
> + .driver = {
> + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match),
> + .of_match_table = fxos8700_of_match,
> + .name = "fxos8700_spi",
> + },
> +};
> +module_spi_driver(fxos8700_spi_driver);
> +
> +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
> +MODULE_DESCRIPTION("FXOS8700 SPI driver");
> +MODULE_LICENSE("GPL v2");
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding
2019-10-16 12:55 ` Rob Herring
@ 2019-10-22 9:25 ` Jonathan Cameron
0 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron @ 2019-10-22 9:25 UTC (permalink / raw)
To: Rob Herring
Cc: Robert Jones, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland,
open list:IIO SUBSYSTEM AND DRIVERS, devicetree
On Wed, 16 Oct 2019 07:55:34 -0500
Rob Herring <robh+dt@kernel.org> wrote:
> On Mon, Oct 14, 2019 at 1:49 PM Robert Jones <rjones@gateworks.com> wrote:
> >
> > This adds documentation for the Freescale FXOS8700 Inertial Measurement Unit
> > device-tree bindings.
> >
> > Signed-off-by: Robert Jones <rjones@gateworks.com>
> > ---
> > .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 76 ++++++++++++++++++++++
> > 1 file changed, 76 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml
>
> Reviewed-by: Rob Herring <robh@kernel.org>
Applied,
Thanks,
Jonathan
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2019-10-22 9:25 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-18 1:28 [PATCH 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-09-18 1:28 ` [PATCH 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-01 11:39 ` Rob Herring
2019-09-18 1:28 ` [PATCH 2/2] io: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-05 13:10 ` Jonathan Cameron
2019-10-10 1:25 ` [PATCH v2 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 1:25 ` [PATCH v2 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-10 13:23 ` Rob Herring
2019-10-10 1:25 ` [PATCH v2 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-10 17:56 ` [PATCH v3 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-10 17:56 ` [PATCH v3 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-11 13:58 ` Rob Herring
2019-10-11 23:33 ` Bobby Jones
2019-10-14 13:37 ` Rob Herring
2019-10-10 17:56 ` [PATCH v3 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-12 13:53 ` Jonathan Cameron
2019-10-14 18:33 ` Bobby Jones
2019-10-14 18:49 ` [PATCH v4 0/2] iio: imu: add support for FXOS8700 Robert Jones
2019-10-14 18:49 ` [PATCH v4 1/2] dt-bindings: iio: imu: add fxos8700 imu binding Robert Jones
2019-10-16 12:55 ` Rob Herring
2019-10-22 9:25 ` Jonathan Cameron
2019-10-14 18:49 ` [PATCH v4 2/2] iio: imu: Add support for the FXOS8700 IMU Robert Jones
2019-10-21 17:15 ` Bobby Jones
2019-10-22 9:25 ` Jonathan Cameron
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