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* [PATCH 0/3] st_lsm6dsx: do not access active-low/open-drain if not supported
@ 2019-09-22  9:18 Lorenzo Bianconi
  2019-09-22  9:18 ` [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config Lorenzo Bianconi
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Lorenzo Bianconi @ 2019-09-22  9:18 UTC (permalink / raw)
  To: jic23; +Cc: lorenzo.bianconi, linux-iio, martin.kepplinger, rjones

Move active low and open drain register definitions in hw_settings
register map in order to avoid to access them if the sensor does not
support them.
Group irq related definition in irq_config structure in
st_lsm6dsx_settings.

@Jonathan: I post this series now since in this way Bobby can test it and maybe
you want to apply it on top of togreg branch. If you prefer to add it on
testing branch I can rebase it ontop of Sean's series.

Lorenzo Bianconi (3):
  iio: imu: st_lsm6dsx: move irq related definitions in irq_config
  iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not
    supported
  iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer

 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h       |  17 +-
 .../iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c    |  35 ++-
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c  | 243 ++++++++++++------
 3 files changed, 203 insertions(+), 92 deletions(-)

-- 
2.21.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config
  2019-09-22  9:18 [PATCH 0/3] st_lsm6dsx: do not access active-low/open-drain if not supported Lorenzo Bianconi
@ 2019-09-22  9:18 ` Lorenzo Bianconi
  2019-09-24 13:51   ` Martin Kepplinger
  2019-09-22  9:18 ` [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported Lorenzo Bianconi
  2019-09-22  9:18 ` [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer Lorenzo Bianconi
  2 siblings, 1 reply; 8+ messages in thread
From: Lorenzo Bianconi @ 2019-09-22  9:18 UTC (permalink / raw)
  To: jic23; +Cc: lorenzo.bianconi, linux-iio, martin.kepplinger, rjones

Group irq related definition in irq_config structure in
st_lsm6dsx_settings. This is a preliminary patch to check
OpenDrain/Active low registers before accessing them

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h      |  15 +-
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 195 ++++++++++++-------
 2 files changed, 130 insertions(+), 80 deletions(-)

diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
index 21d14072d1c6..b2c568aadd4c 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
@@ -205,26 +205,21 @@ struct st_lsm6dsx_ext_dev_settings {
 /**
  * struct st_lsm6dsx_settings - ST IMU sensor settings
  * @wai: Sensor WhoAmI default value.
- * @int1_addr: Control Register address for INT1
- * @int2_addr: Control Register address for INT2
  * @reset_addr: register address for reset/reboot
  * @max_fifo_size: Sensor max fifo length in FIFO words.
  * @id: List of hw id/device name supported by the driver configuration.
  * @channels: IIO channels supported by the device.
+ * @irq_config: interrupts related registers.
  * @odr_table: Hw sensors odr table (Hz + val).
  * @fs_table: Hw sensors gain table (gain + val).
  * @decimator: List of decimator register info (addr + mask).
  * @batch: List of FIFO batching register info (addr + mask).
- * @lir: Latched interrupt register info (addr + mask).
- * @clear_on_read: Clear on read register info (addr + mask).
  * @fifo_ops: Sensor hw FIFO parameters.
  * @ts_settings: Hw timer related settings.
  * @shub_settings: i2c controller related settings.
  */
 struct st_lsm6dsx_settings {
 	u8 wai;
-	u8 int1_addr;
-	u8 int2_addr;
 	u8 reset_addr;
 	u16 max_fifo_size;
 	struct {
@@ -235,12 +230,16 @@ struct st_lsm6dsx_settings {
 		const struct iio_chan_spec *chan;
 		int len;
 	} channels[2];
+	struct {
+		struct st_lsm6dsx_reg irq1;
+		struct st_lsm6dsx_reg irq2;
+		struct st_lsm6dsx_reg lir;
+		struct st_lsm6dsx_reg clear_on_read;
+	} irq_config;
 	struct st_lsm6dsx_odr_table_entry odr_table[2];
 	struct st_lsm6dsx_fs_table_entry fs_table[2];
 	struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID];
 	struct st_lsm6dsx_reg batch[ST_LSM6DSX_MAX_ID];
-	struct st_lsm6dsx_reg lir;
-	struct st_lsm6dsx_reg clear_on_read;
 	struct st_lsm6dsx_fifo_ops fifo_ops;
 	struct st_lsm6dsx_hw_ts_settings ts_settings;
 	struct st_lsm6dsx_shub_settings shub_settings;
diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
index b65a6ca775e0..c14441040a62 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
@@ -58,7 +58,6 @@
 
 #include "st_lsm6dsx.h"
 
-#define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK	BIT(3)
 #define ST_LSM6DSX_REG_WHOAMI_ADDR		0x0f
 #define ST_LSM6DSX_REG_RESET_MASK		BIT(0)
 #define ST_LSM6DSX_REG_BOOT_MASK		BIT(7)
@@ -89,8 +88,6 @@ static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	{
 		.wai = 0x68,
-		.int1_addr = 0x0c,
-		.int2_addr = 0x0d,
 		.reset_addr = 0x22,
 		.max_fifo_size = 32,
 		.id = {
@@ -156,11 +153,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0c,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+		},
 	},
 	{
 		.wai = 0x69,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 1365,
 		.id = {
@@ -227,6 +232,20 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x58,
+				.mask = BIT(0),
+			},
+		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x08,
@@ -237,10 +256,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(5, 3),
 			},
 		},
-		.lir = {
-			.addr = 0x58,
-			.mask = BIT(0),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_fifo,
@@ -275,8 +290,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	},
 	{
 		.wai = 0x69,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 682,
 		.id = {
@@ -343,6 +356,20 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x58,
+				.mask = BIT(0),
+			},
+		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x08,
@@ -353,10 +380,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(5, 3),
 			},
 		},
-		.lir = {
-			.addr = 0x58,
-			.mask = BIT(0),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_fifo,
@@ -391,8 +414,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	},
 	{
 		.wai = 0x6a,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 682,
 		.id = {
@@ -468,6 +489,20 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x58,
+				.mask = BIT(0),
+			},
+		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x08,
@@ -478,10 +513,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(5, 3),
 			},
 		},
-		.lir = {
-			.addr = 0x58,
-			.mask = BIT(0),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_fifo,
@@ -516,8 +547,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	},
 	{
 		.wai = 0x6c,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 512,
 		.id = {
@@ -587,6 +616,24 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x56,
+				.mask = BIT(0),
+			},
+			.clear_on_read = {
+				.addr = 0x56,
+				.mask = BIT(6),
+			},
+		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x09,
@@ -597,14 +644,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(7, 4),
 			},
 		},
-		.lir = {
-			.addr = 0x56,
-			.mask = BIT(0),
-		},
-		.clear_on_read = {
-			.addr = 0x56,
-			.mask = BIT(6),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_tagged_fifo,
@@ -657,8 +696,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	},
 	{
 		.wai = 0x6b,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 512,
 		.id = {
@@ -725,6 +762,24 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x56,
+				.mask = BIT(0),
+			},
+			.clear_on_read = {
+				.addr = 0x56,
+				.mask = BIT(6),
+			},
+		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x09,
@@ -735,14 +790,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(7, 4),
 			},
 		},
-		.lir = {
-			.addr = 0x56,
-			.mask = BIT(0),
-		},
-		.clear_on_read = {
-			.addr = 0x56,
-			.mask = BIT(6),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_tagged_fifo,
@@ -769,8 +816,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 	},
 	{
 		.wai = 0x6b,
-		.int1_addr = 0x0d,
-		.int2_addr = 0x0e,
 		.reset_addr = 0x12,
 		.max_fifo_size = 512,
 		.id = {
@@ -840,6 +885,24 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 			},
 		},
+		.irq_config = {
+			.irq1 = {
+				.addr = 0x0d,
+				.mask = BIT(3),
+			},
+			.irq2 = {
+				.addr = 0x0e,
+				.mask = BIT(3),
+			},
+			.lir = {
+				.addr = 0x56,
+				.mask = BIT(0),
+			},
+			.clear_on_read = {
+				.addr = 0x56,
+				.mask = BIT(6),
+			},
+		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
 				.addr = 0x09,
@@ -850,14 +913,6 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.mask = GENMASK(7, 4),
 			},
 		},
-		.lir = {
-			.addr = 0x56,
-			.mask = BIT(0),
-		},
-		.clear_on_read = {
-			.addr = 0x56,
-			.mask = BIT(6),
-		},
 		.fifo_ops = {
 			.update_fifo = st_lsm6dsx_update_fifo,
 			.read_fifo = st_lsm6dsx_read_tagged_fifo,
@@ -1299,7 +1354,9 @@ static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
 	return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin);
 }
 
-static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
+static int
+st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
+			const struct st_lsm6dsx_reg **drdy_reg)
 {
 	int err = 0, drdy_pin;
 
@@ -1313,10 +1370,10 @@ static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
 
 	switch (drdy_pin) {
 	case 1:
-		*drdy_reg = hw->settings->int1_addr;
+		*drdy_reg = &hw->settings->irq_config.irq1;
 		break;
 	case 2:
-		*drdy_reg = hw->settings->int2_addr;
+		*drdy_reg = &hw->settings->irq_config.irq2;
 		break;
 	default:
 		dev_err(hw->dev, "unsupported data ready pin\n");
@@ -1412,7 +1469,7 @@ static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
 
 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
 {
-	u8 drdy_int_reg;
+	const struct st_lsm6dsx_reg *reg;
 	int err;
 
 	/* device sw reset */
@@ -1441,35 +1498,29 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
 		return err;
 
 	/* enable FIFO watermak interrupt */
-	err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg);
+	err = st_lsm6dsx_get_drdy_reg(hw, &reg);
 	if (err < 0)
 		return err;
 
-	err = regmap_update_bits(hw->regmap, drdy_int_reg,
-				 ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
-				 FIELD_PREP(ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
-					    1));
+	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+				 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
 	if (err < 0)
 		return err;
 
 	/* enable Latched interrupts for device events */
-	if (hw->settings->lir.addr) {
-		unsigned int data;
-
-		data = ST_LSM6DSX_SHIFT_VAL(1, hw->settings->lir.mask);
-		err = regmap_update_bits(hw->regmap, hw->settings->lir.addr,
-					 hw->settings->lir.mask, data);
+	if (hw->settings->irq_config.lir.addr) {
+		reg = &hw->settings->irq_config.lir;
+		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
 		if (err < 0)
 			return err;
 
 		/* enable clear on read for latched interrupts */
-		if (hw->settings->clear_on_read.addr) {
-			data = ST_LSM6DSX_SHIFT_VAL(1,
-					hw->settings->clear_on_read.mask);
+		if (hw->settings->irq_config.clear_on_read.addr) {
+			reg = &hw->settings->irq_config.clear_on_read;
 			err = regmap_update_bits(hw->regmap,
-					hw->settings->clear_on_read.addr,
-					hw->settings->clear_on_read.mask,
-					data);
+					reg->addr, reg->mask,
+					ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
 			if (err < 0)
 				return err;
 		}
-- 
2.21.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported
  2019-09-22  9:18 [PATCH 0/3] st_lsm6dsx: do not access active-low/open-drain if not supported Lorenzo Bianconi
  2019-09-22  9:18 ` [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config Lorenzo Bianconi
@ 2019-09-22  9:18 ` Lorenzo Bianconi
  2019-09-24 13:52   ` Martin Kepplinger
  2019-09-22  9:18 ` [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer Lorenzo Bianconi
  2 siblings, 1 reply; 8+ messages in thread
From: Lorenzo Bianconi @ 2019-09-22  9:18 UTC (permalink / raw)
  To: jic23; +Cc: lorenzo.bianconi, linux-iio, martin.kepplinger, rjones

Move active low and open drain register definitions in hw_settings
register map in order to avoid to access them if the sensor does not
support them

Fixes: 52f4b1f19679 ("iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h       |  2 +
 .../iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c    | 29 ++++++-----
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c  | 48 +++++++++++++++++++
 3 files changed, 67 insertions(+), 12 deletions(-)

diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
index b2c568aadd4c..c213ead31083 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
@@ -235,6 +235,8 @@ struct st_lsm6dsx_settings {
 		struct st_lsm6dsx_reg irq2;
 		struct st_lsm6dsx_reg lir;
 		struct st_lsm6dsx_reg clear_on_read;
+		struct st_lsm6dsx_reg hla;
+		struct st_lsm6dsx_reg od;
 	} irq_config;
 	struct st_lsm6dsx_odr_table_entry odr_table[2];
 	struct st_lsm6dsx_fs_table_entry fs_table[2];
diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
index b0f3da1976e4..21c2aad8c56a 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
@@ -42,10 +42,6 @@
 
 #include "st_lsm6dsx.h"
 
-#define ST_LSM6DSX_REG_HLACTIVE_ADDR		0x12
-#define ST_LSM6DSX_REG_HLACTIVE_MASK		BIT(5)
-#define ST_LSM6DSX_REG_PP_OD_ADDR		0x12
-#define ST_LSM6DSX_REG_PP_OD_MASK		BIT(4)
 #define ST_LSM6DSX_REG_FIFO_MODE_ADDR		0x0a
 #define ST_LSM6DSX_FIFO_MODE_MASK		GENMASK(2, 0)
 #define ST_LSM6DSX_FIFO_ODR_MASK		GENMASK(6, 3)
@@ -704,6 +700,7 @@ int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw)
 {
 	struct device_node *np = hw->dev->of_node;
 	struct st_sensors_platform_data *pdata;
+	const struct st_lsm6dsx_reg *reg;
 	struct iio_buffer *buffer;
 	unsigned long irq_type;
 	bool irq_active_low;
@@ -711,6 +708,7 @@ int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw)
 
 	irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
 
+	reg = &hw->settings->irq_config.hla;
 	switch (irq_type) {
 	case IRQF_TRIGGER_HIGH:
 	case IRQF_TRIGGER_RISING:
@@ -718,6 +716,10 @@ int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw)
 		break;
 	case IRQF_TRIGGER_LOW:
 	case IRQF_TRIGGER_FALLING:
+		if (!reg->addr) {
+			dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
+			return -EINVAL;
+		}
 		irq_active_low = true;
 		break;
 	default:
@@ -725,20 +727,23 @@ int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw)
 		return -EINVAL;
 	}
 
-	err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_HLACTIVE_ADDR,
-				 ST_LSM6DSX_REG_HLACTIVE_MASK,
-				 FIELD_PREP(ST_LSM6DSX_REG_HLACTIVE_MASK,
-					    irq_active_low));
+	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+				 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
+						      reg->mask));
 	if (err < 0)
 		return err;
 
 	pdata = (struct st_sensors_platform_data *)hw->dev->platform_data;
 	if ((np && of_property_read_bool(np, "drive-open-drain")) ||
 	    (pdata && pdata->open_drain)) {
-		err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_PP_OD_ADDR,
-					 ST_LSM6DSX_REG_PP_OD_MASK,
-					 FIELD_PREP(ST_LSM6DSX_REG_PP_OD_MASK,
-						    1));
+		reg = &hw->settings->irq_config.od;
+		if (!reg->addr) {
+			dev_info(hw->dev, "open drain mode unsupported\n");
+			return -EINVAL;
+		}
+
+		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
 		if (err < 0)
 			return err;
 
diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
index c14441040a62..3675b10a638a 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
@@ -245,6 +245,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
@@ -369,6 +377,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
@@ -502,6 +518,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x58,
 				.mask = BIT(0),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.decimator = {
 			[ST_LSM6DSX_ID_ACC] = {
@@ -633,6 +657,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(6),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
@@ -779,6 +811,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(6),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
@@ -902,6 +942,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 				.addr = 0x56,
 				.mask = BIT(6),
 			},
+			.hla = {
+				.addr = 0x12,
+				.mask = BIT(5),
+			},
+			.od = {
+				.addr = 0x12,
+				.mask = BIT(4),
+			},
 		},
 		.batch = {
 			[ST_LSM6DSX_ID_ACC] = {
-- 
2.21.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer
  2019-09-22  9:18 [PATCH 0/3] st_lsm6dsx: do not access active-low/open-drain if not supported Lorenzo Bianconi
  2019-09-22  9:18 ` [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config Lorenzo Bianconi
  2019-09-22  9:18 ` [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported Lorenzo Bianconi
@ 2019-09-22  9:18 ` Lorenzo Bianconi
  2019-09-24 13:52   ` Martin Kepplinger
  2 siblings, 1 reply; 8+ messages in thread
From: Lorenzo Bianconi @ 2019-09-22  9:18 UTC (permalink / raw)
  To: jic23; +Cc: lorenzo.bianconi, linux-iio, martin.kepplinger, rjones

Check read_fifo pointer before using it since we can't assume it
is always set adding new sensors

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
index 21c2aad8c56a..f80ce77a4154 100644
--- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
+++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
@@ -588,6 +588,9 @@ int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw)
 {
 	int err;
 
+	if (!hw->settings->fifo_ops.read_fifo)
+		return -ENOTSUPP;
+
 	mutex_lock(&hw->fifo_lock);
 
 	hw->settings->fifo_ops.read_fifo(hw);
@@ -662,6 +665,9 @@ static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
 	struct st_lsm6dsx_hw *hw = private;
 	int count;
 
+	if (!hw->settings->fifo_ops.read_fifo)
+		return IRQ_NONE;
+
 	mutex_lock(&hw->fifo_lock);
 	count = hw->settings->fifo_ops.read_fifo(hw);
 	mutex_unlock(&hw->fifo_lock);
-- 
2.21.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config
  2019-09-22  9:18 ` [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config Lorenzo Bianconi
@ 2019-09-24 13:51   ` Martin Kepplinger
  0 siblings, 0 replies; 8+ messages in thread
From: Martin Kepplinger @ 2019-09-24 13:51 UTC (permalink / raw)
  To: Lorenzo Bianconi, jic23; +Cc: lorenzo.bianconi, linux-iio, rjones

On 22.09.19 11:18, Lorenzo Bianconi wrote:
> Group irq related definition in irq_config structure in
> st_lsm6dsx_settings. This is a preliminary patch to check
> OpenDrain/Active low registers before accessing them
> 
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported
  2019-09-22  9:18 ` [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported Lorenzo Bianconi
@ 2019-09-24 13:52   ` Martin Kepplinger
  2019-09-24 14:07     ` Lorenzo Bianconi
  0 siblings, 1 reply; 8+ messages in thread
From: Martin Kepplinger @ 2019-09-24 13:52 UTC (permalink / raw)
  To: Lorenzo Bianconi, jic23; +Cc: lorenzo.bianconi, linux-iio, rjones

On 22.09.19 11:18, Lorenzo Bianconi wrote:
> Move active low and open drain register definitions in hw_settings
> register map in order to avoid to access them if the sensor does not
> support them
> 
> Fixes: 52f4b1f19679 ("iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1")
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
>  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h       |  2 +
>  .../iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c    | 29 ++++++-----
>  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c  | 48 +++++++++++++++++++
>  3 files changed, 67 insertions(+), 12 deletions(-)
> 

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer
  2019-09-22  9:18 ` [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer Lorenzo Bianconi
@ 2019-09-24 13:52   ` Martin Kepplinger
  0 siblings, 0 replies; 8+ messages in thread
From: Martin Kepplinger @ 2019-09-24 13:52 UTC (permalink / raw)
  To: Lorenzo Bianconi, jic23; +Cc: lorenzo.bianconi, linux-iio, rjones

On 22.09.19 11:18, Lorenzo Bianconi wrote:
> Check read_fifo pointer before using it since we can't assume it
> is always set adding new sensors
> 
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
>  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported
  2019-09-24 13:52   ` Martin Kepplinger
@ 2019-09-24 14:07     ` Lorenzo Bianconi
  0 siblings, 0 replies; 8+ messages in thread
From: Lorenzo Bianconi @ 2019-09-24 14:07 UTC (permalink / raw)
  To: Martin Kepplinger; +Cc: Lorenzo Bianconi, Jonathan Cameron, linux-iio, rjones

>
> On 22.09.19 11:18, Lorenzo Bianconi wrote:
> > Move active low and open drain register definitions in hw_settings
> > register map in order to avoid to access them if the sensor does not
> > support them
> >
> > Fixes: 52f4b1f19679 ("iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1")
> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> > ---
> >  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h       |  2 +
> >  .../iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c    | 29 ++++++-----
> >  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c  | 48 +++++++++++++++++++
> >  3 files changed, 67 insertions(+), 12 deletions(-)
> >
>
> Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>

Hi Martin,

thx for testing the series. I will rework this patch in v2 since even
LSM9DS1 supports Open Drain/Active Low.

Regards,
Lorenzo

>
>


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, back to index

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-22  9:18 [PATCH 0/3] st_lsm6dsx: do not access active-low/open-drain if not supported Lorenzo Bianconi
2019-09-22  9:18 ` [PATCH 1/3] iio: imu: st_lsm6dsx: move irq related definitions in irq_config Lorenzo Bianconi
2019-09-24 13:51   ` Martin Kepplinger
2019-09-22  9:18 ` [PATCH 2/3] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported Lorenzo Bianconi
2019-09-24 13:52   ` Martin Kepplinger
2019-09-24 14:07     ` Lorenzo Bianconi
2019-09-22  9:18 ` [PATCH 3/3] iio: imu: st_lsm6dsx: add sanity check for read_fifo pointer Lorenzo Bianconi
2019-09-24 13:52   ` Martin Kepplinger

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