From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Parikshit Pareek <quic_ppareek@quicinc.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
Adam Skladowski <a39.skl@gmail.com>,
linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org,
"linux-kernel @ vger . kernel . org Prasanna Kumar"
<quic_kprasan@quicinc.com>,
Shazad Hussain <quic_shazhuss@quicinc.com>
Subject: Re: [PATCH 1/3] dt-bindings: arm-smmu: Add interconnect for qcom SMMUs
Date: Fri, 9 Jun 2023 15:23:15 +0200 [thread overview]
Message-ID: <0b32442b-e931-ccd7-6bac-b5e251a4527d@linaro.org> (raw)
In-Reply-To: <20230609054141.18938-2-quic_ppareek@quicinc.com>
On 09/06/2023 07:41, Parikshit Pareek wrote:
> There are certain SMMUs on qcom SoCs, which need to set interconnect-
> bandwidth, before accessing any MIMO mapped HW registers, and accessing
> RAM during page table walk. Hence introduce the due bindings for
> interconnects.
>
> Reported-by: Eric Chanudet <echanude@redhat.com>
What is reported here exactly? What is the bug?
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> .../devicetree/bindings/iommu/arm,smmu.yaml | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index ba677d401e24..75e00789d8c2 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -327,6 +327,28 @@ allOf:
> - description: interface clock required to access smmu's registers
> through the TCU's programming interface.
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + qcom,sa8775p-smmu-500
> + then:
> + properties:
> + interconnects:
> + minItems: 1
Drop minItems
> + maxItems: 1
> +
> + interconnect-names:
> + minItems: 1
??? Drop
> + items:
> + - const: tbu_mc
Anyway, properties must be defined in top-level. In if block you only
customize them.
> +
> + icc_bw:
> + $ref: /schemas/types.yaml#/definitions/int32
No, for multiple reasons. First - do not define properties in if: block.
Second, does not look like description of hardware. I actually don't
understand what is this for. :(
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-06-09 13:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-09 5:41 [PATCH 0/3] arm64: dts: qcom: sa8775p: Add interconnect to SMMU Parikshit Pareek
2023-06-09 5:41 ` [PATCH 1/3] dt-bindings: arm-smmu: Add interconnect for qcom SMMUs Parikshit Pareek
2023-06-09 8:53 ` Konrad Dybcio
2023-06-09 13:23 ` Krzysztof Kozlowski [this message]
2023-06-09 5:41 ` [PATCH 2/3] arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU Parikshit Pareek
2023-06-09 13:23 ` Krzysztof Kozlowski
2023-06-09 5:52 ` [PATCH 3/3] iommu/arm-smmu-qcom: Add support for the interconnect Parikshit Pareek
2023-06-09 8:56 ` Konrad Dybcio
2023-06-09 8:52 ` [PATCH 0/3] arm64: dts: qcom: sa8775p: Add interconnect to SMMU Konrad Dybcio
2023-06-09 12:56 ` Parikshit Pareek
2023-06-09 14:45 ` Robin Murphy
2023-06-09 14:52 ` Konrad Dybcio
2023-06-09 14:56 ` Dmitry Baryshkov
2023-06-09 15:39 ` Robin Murphy
2023-07-12 13:10 ` Shazad Hussain
2023-06-09 15:07 ` Robin Murphy
2023-06-09 15:22 ` Konrad Dybcio
2023-07-19 15:37 ` Manivannan Sadhasivam
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