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From: Robin Murphy <robin.murphy@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: linux-kernel@vger.kernel.org, willy@infradead.org,
	iommu@lists.linux-foundation.org, will@kernel.org
Subject: Re: [PATCH 4/9] iommu/amd: Simplify pagetable freeing
Date: Mon, 6 Dec 2021 13:28:11 +0000	[thread overview]
Message-ID: <0c55d229-67a4-c5fa-4d0d-9f1497330e45@arm.com> (raw)
In-Reply-To: <Ya4EwWkvDpuvoEjF@8bytes.org>

On 2021-12-06 12:40, Joerg Roedel wrote:
> On Tue, Nov 23, 2021 at 02:10:39PM +0000, Robin Murphy wrote:
>> For reasons unclear, pagetable freeing is an effectively recursive
>> method implemented via an elaborate system of templated functions that
>> turns out to account for 25% of the object file size. Implementing it
>> using regular straightforward recursion makes the code simpler, and
>> seems like a good thing to do before we work on it further. As part of
>> that, also fix the types to avoid all the needless casting back and
>> forth which just gets in the way.
> 
> Nice cleanup! The stack of functions came from the fact that recursion
> was pretty much discouraged in the kernel. But in this case it looks
> well bounded and should be fine.

I did wonder about explicitly clamping lvl to ensure that it couldn't 
possibly recurse any further than the multi-function version, but given 
that you'd need to craft a suitable bogus pagetable in addition to 
corrupting the arguments to be able to exploit it at all, that seemed 
perhaps a little too paranoid. Happy to add something like:

	if (WARN_ON(lvl > PAGE_MODE_7_LEVEL))
		return NULL;

if you like, though.

>> +static struct page *free_pt_lvl(u64 *pt, struct page *freelist, int lvl)
>> +{
>> +	u64 *p;
>> +	int i;
>> +
>> +	for (i = 0; i < 512; ++i) {
>> +		/* PTE present? */
>> +		if (!IOMMU_PTE_PRESENT(pt[i]))
>> +			continue;
>> +
>> +		/* Large PTE? */
>> +		if (PM_PTE_LEVEL(pt[i]) == 0 ||
>> +		    PM_PTE_LEVEL(pt[i]) == 7)
>> +			continue;
>> +
>> +		p = IOMMU_PTE_PAGE(pt[i]);
>> +		if (lvl > 2)
> 
> I thinkt this function deserves a couple of comments. It took me a while
> to make sense of the 'lvl > 2' comparision. I think it is right, but if
> I have think again I'd appreciate a comment :)

Heh, it's merely a direct transformation of the logic encoded in the 
existing "DEFINE_FREE_PT_FN(...)" cases - I assume that's just an 
optimisation, so I'll add a comment to that effect.

Thanks,
Robin.
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  reply	other threads:[~2021-12-06 13:28 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-23 14:10 [PATCH 0/9] iommu: Refactor flush queues into iommu-dma Robin Murphy
2021-11-23 14:10 ` [PATCH 1/9] gpu: host1x: Add missing DMA API include Robin Murphy
2021-11-24 14:05   ` Robin Murphy
2021-12-06 12:20     ` Joerg Roedel
2021-11-23 14:10 ` [PATCH 2/9] iommu/iova: Squash entry_dtor abstraction Robin Murphy
2021-11-23 14:10 ` [PATCH 3/9] iommu/iova: Squash flush_cb abstraction Robin Murphy
2021-11-23 14:10 ` [PATCH 4/9] iommu/amd: Simplify pagetable freeing Robin Murphy
2021-12-06 12:40   ` Joerg Roedel
2021-12-06 13:28     ` Robin Murphy [this message]
2021-11-23 14:10 ` [PATCH 5/9] iommu/amd: Use put_pages_list Robin Murphy
2021-11-23 14:10 ` [PATCH 6/9] iommu/vt-d: " Robin Murphy
2021-11-23 14:10 ` [PATCH 7/9] iommu/iova: Consolidate flush queue code Robin Murphy
2021-11-23 14:10 ` [PATCH 8/9] iommu/iova: Move flush queue code to iommu-dma Robin Murphy
2021-11-23 14:10 ` [PATCH 9/9] iommu: Move flush queue data into iommu_dma_cookie Robin Murphy
2021-11-23 22:40   ` kernel test robot
2021-11-24 17:25   ` John Garry via iommu
2021-11-24 18:00     ` Robin Murphy
2021-11-24 17:21 ` [PATCH 0/9] iommu: Refactor flush queues into iommu-dma John Garry via iommu
2021-11-24 18:33   ` Robin Murphy

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