From: Miles Chen <miles.chen@mediatek.com> To: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org, wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, Chao Hao <chao.hao@mediatek.com>, iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Matthias Brugger <matthias.bgg@gmail.com>, Yingjoe Chen <yingjoe.chen@mediatek.com>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/4] dt-bindings: mediatek: add mediatek,infracfg phandle Date: Fri, 17 Jul 2020 16:18:26 +0800 [thread overview] Message-ID: <1594973906.12796.20.camel@mtkswgap22> (raw) In-Reply-To: <20200715205120.GA778876@bogus> On Wed, 2020-07-15 at 14:51 -0600, Rob Herring wrote: > On Thu, Jul 02, 2020 at 05:37:17PM +0800, Miles Chen wrote: > > Add a description for mediatek,infracfg. We can check if 4GB mode > > is enable by reading it instead of checking the unexported > > symbol "max_pfn". > > > > This is a step towards building mtk_iommu as a kernel module. > > You determined this before without DT, so it is an OS problem and > shouldn't need a DT update. Thanks for your comment. The old way (using max_pfn) do determine this is risky because the max_pfn may lower than (GB if reserved memory regions occupy memory higher than 4GB. So, the better way to do this is by reading register from H/W. > > I'd assume there's only one instance of the node mediatek,infracfg > points to, so just search for it if you want to get the info from DT. > I can do syscon_regmap_lookup_by_compatible() to search for it. However, the compatibles are different in mt2712e.dtsi and mt8173.dtsi. so I have to search "mediatek,mt2712-infracfg" and "mediatek,mt8173-infracfg" respectively. Using mediatek,infracfg phandle can make the code easier to read. Is it possible to reconsider the phandle approach, please? arch/arm64/boot/dts/mediatek/mt2712e.dtsi:253: infracfg: syscon@10001000 { compatible = "mediatek,mt2712-infracfg", "syscon"; arch/arm64/boot/dts/mediatek/mt8173.dtsi:363: infracfg: power-controller@10001000 { compatible = "mediatek,mt8173-infracfg", "syscon"; > > > > > Cc: Yong Wu <yong.wu@mediatek.com> > > Signed-off-by: Miles Chen <miles.chen@mediatek.com> > > --- > > Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > index ce59a505f5a4..a7881deabcca 100644 > > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > @@ -74,6 +74,8 @@ Required properties: > > - mediatek,larbs : List of phandle to the local arbiters in the current Socs. > > Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort > > according to the local arbiter index, like larb0, larb1, larb2... > > +- mediatek,infracfg: a phandle to infracfg. It is used to confirm if 4GB mode is set. > > + It is an optional property, add it when the SoC have 4g mode. > > - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. > > Specifies the mtk_m4u_id as defined in > > dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 > > -- > > 2.18.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
prev parent reply other threads:[~2020-07-17 8:18 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-02 9:37 Miles Chen 2020-07-02 9:37 ` [PATCH 2/4] arm64: dts: mt2712: add mediatek,infracfg to iommu Miles Chen 2020-07-02 9:37 ` [PATCH 3/4] arm64: dts: mt8173: " Miles Chen 2020-07-02 9:37 ` [PATCH 4/4] iommu/mediatek: check 4GB mode by reading infracfg Miles Chen 2020-07-15 21:05 ` Matthias Brugger 2020-07-17 8:26 ` Miles Chen 2020-07-15 20:51 ` [PATCH 1/4] dt-bindings: mediatek: add mediatek,infracfg phandle Rob Herring 2020-07-17 8:18 ` Miles Chen [this message]
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