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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 9/4/2020 6:55 PM, Bjorn Andersson wrote: > Based on previous attempts and discussions this is the latest attempt at > inheriting stream mappings set up by the bootloader, for e.g. boot splash or > efifb. > > Per Will's request this builds on the work by Jordan and Rob for the Adreno > SMMU support. It applies cleanly ontop of v16 of their series, which can be > found at > https://lore.kernel.org/linux-arm-msm/20200901164707.2645413-1-robdclark@gmail.com/ > > Bjorn Andersson (8): > iommu/arm-smmu: Refactor context bank allocation > iommu/arm-smmu: Delay modifying domain during init > iommu/arm-smmu: Consult context bank allocator for identify domains > iommu/arm-smmu-qcom: Emulate bypass by using context banks > iommu/arm-smmu-qcom: Consistently initialize stream mappings > iommu/arm-smmu: Add impl hook for inherit boot mappings > iommu/arm-smmu: Provide helper for allocating identity domain > iommu/arm-smmu-qcom: Setup identity domain for boot mappings > > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 111 ++++++++++++++++++- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 122 ++++++++++++++------- > drivers/iommu/arm/arm-smmu/arm-smmu.h | 14 ++- > 3 files changed, 205 insertions(+), 42 deletions(-) > Tested on a NXP LX2160A with John's tree [1] and below diff [2], so for the whole series: Tested-by: Laurentiu Tudor [1] https://git.linaro.org/people/john.stultz/android-dev.git/log/?h=dev/db845c-mainline-WIP [2] --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -190,11 +190,43 @@ static const struct arm_smmu_impl mrvl_mmu500_impl = { .reset = arm_mmu500_reset, }; +static int nxp_smmu_inherit_mappings(struct arm_smmu_device *smmu) +{ + u32 smr; + int i, cnt = 0; + + for (i = 0; i < smmu->num_mapping_groups; i++) { + smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); + + if (FIELD_GET(ARM_SMMU_SMR_VALID, smr)) { + smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); + smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); + smmu->smrs[i].valid = true; + + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].count++; + + cnt++; + } + } + + dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt, + cnt == 1 ? "" : "s"); + + return 0; +} + +static const struct arm_smmu_impl nxp_impl = { + .inherit_mappings = nxp_smmu_inherit_mappings, +}; struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) { const struct device_node *np = smmu->dev->of_node; /* * Set the impl for model-specific implementation quirks first, * such that platform integration quirks can pick it up and @@ -229,5 +261,12 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) if (of_device_is_compatible(np, "marvell,ap806-smmu-500")) smmu->impl = &mrvl_mmu500_impl; + if (of_property_read_bool(np, "nxp,keep-bypass-mappings")) + smmu->impl = &nxp_impl; --- Best Regards, Laurentiu _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu