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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id a12sm20255316pje.3.2019.08.05.15.27.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 05 Aug 2019 15:27:58 -0700 (PDT) Date: Mon, 5 Aug 2019 15:27:55 -0700 From: Bjorn Andersson To: Vivek Gautam Subject: Re: [PATCH v3 1/4] firmware: qcom_scm-64: Add atomic version of qcom_scm_call Message-ID: <20190805222755.GB2634@builder> References: <20190612071554.13573-1-vivek.gautam@codeaurora.org> <20190612071554.13573-2-vivek.gautam@codeaurora.org> <20190618175536.GI4270@fuggles.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.0 (2018-05-17) Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Will Deacon , open list , David Brown , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , robh+dt , Andy Gross , Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org On Wed 19 Jun 04:34 PDT 2019, Vivek Gautam wrote: > On Tue, Jun 18, 2019 at 11:25 PM Will Deacon wrote: > > > > On Wed, Jun 12, 2019 at 12:45:51PM +0530, Vivek Gautam wrote: > > > There are scnenarios where drivers are required to make a > > > scm call in atomic context, such as in one of the qcom's > > > arm-smmu-500 errata [1]. > > > > > > [1] ("https://source.codeaurora.org/quic/la/kernel/msm-4.9/commit/ > > > drivers/iommu/arm-smmu.c?h=CogSystems-msm-49/ > > > msm-4.9&id=da765c6c75266b38191b38ef086274943f353ea7") > > > > > > Signed-off-by: Vivek Gautam > > > Reviewed-by: Bjorn Andersson > > > --- > > > drivers/firmware/qcom_scm-64.c | 136 ++++++++++++++++++++++++++++------------- > > > 1 file changed, 92 insertions(+), 44 deletions(-) > > > > > > diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c > > > index 91d5ad7cf58b..b6dca32c5ac4 100644 > > > --- a/drivers/firmware/qcom_scm-64.c > > > +++ b/drivers/firmware/qcom_scm-64.c > > [snip] > > > > + > > > +static void qcom_scm_call_do(const struct qcom_scm_desc *desc, > > > + struct arm_smccc_res *res, u32 fn_id, > > > + u64 x5, bool atomic) > > > +{ > > > > Maybe pass in the call type (ARM_SMCCC_FAST_CALL vs ARM_SMCCC_STD_CALL) > > instead of "bool atomic"? Would certainly make the callsites easier to > > understand. > > Sure, will do that. > > > > > > + int retry_count = 0; > > > + > > > + if (!atomic) { > > > + do { > > > + mutex_lock(&qcom_scm_lock); > > > + > > > + __qcom_scm_call_do(desc, res, fn_id, x5, > > > + ARM_SMCCC_STD_CALL); > > > + > > > + mutex_unlock(&qcom_scm_lock); > > > + > > > + if (res->a0 == QCOM_SCM_V2_EBUSY) { > > > + if (retry_count++ > QCOM_SCM_EBUSY_MAX_RETRY) > > > + break; > > > + msleep(QCOM_SCM_EBUSY_WAIT_MS); > > > + } > > > + } while (res->a0 == QCOM_SCM_V2_EBUSY); > > > + } else { > > > + __qcom_scm_call_do(desc, res, fn_id, x5, ARM_SMCCC_FAST_CALL); > > > + } > > > > Is it safe to make concurrent FAST calls? > > I better add a spinlock here. > Hi Vivek, Would you be able to respin this patch, so that we could unblock the introduction of the display nodes in the various device? Regards, Bjorn _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu