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From: Will Deacon <will@kernel.org>
To: Robin Murphy <robin.murphy@arm.com>
Cc: bjorn.andersson@linaro.org, iommu@lists.linux-foundation.org,
	gregory.clement@bootlin.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 15/15] iommu/arm-smmu: Add context init implementation hook
Date: Thu, 15 Aug 2019 11:56:21 +0100
Message-ID: <20190815105621.vt2gsuppjqgesrho@willie-the-truck> (raw)
In-Reply-To: <6adbec8e4757f3b6c9f47135544a0302f8e7c55c.1565369764.git.robin.murphy@arm.com>

On Fri, Aug 09, 2019 at 06:07:52PM +0100, Robin Murphy wrote:
> Allocating and initialising a context for a domain is another point
> where certain implementations are known to want special behaviour.
> Currently the other half of the Cavium workaround comes into play here,
> so let's finish the job to get the whole thing right out of the way.
> 
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>  drivers/iommu/arm-smmu-impl.c | 39 +++++++++++++++++++++++++--
>  drivers/iommu/arm-smmu.c      | 51 +++++++----------------------------
>  drivers/iommu/arm-smmu.h      | 42 +++++++++++++++++++++++++++--
>  3 files changed, 86 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
> index c8904da08354..7a657d47b6ec 100644
> --- a/drivers/iommu/arm-smmu-impl.c
> +++ b/drivers/iommu/arm-smmu-impl.c
> @@ -48,6 +48,12 @@ const struct arm_smmu_impl calxeda_impl = {
>  };
>  
>  
> +struct cavium_smmu {
> +	struct arm_smmu_device smmu;
> +	u32 id_base;
> +};
> +#define to_csmmu(s)	container_of(s, struct cavium_smmu, smmu)

To be honest with you, I'd just use container_of directly for the two
callsites that need it. "to_csmmu" isn't a great name when we're also got
the calxeda thing in here.

>  static int cavium_cfg_probe(struct arm_smmu_device *smmu)
>  {
>  	static atomic_t context_count = ATOMIC_INIT(0);
> @@ -56,17 +62,46 @@ static int cavium_cfg_probe(struct arm_smmu_device *smmu)
>  	 * Ensure ASID and VMID allocation is unique across all SMMUs in
>  	 * the system.
>  	 */
> -	smmu->cavium_id_base = atomic_fetch_add(smmu->num_context_banks,
> +	to_csmmu(smmu)->id_base = atomic_fetch_add(smmu->num_context_banks,
>  						   &context_count);
>  	dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n");
>  
>  	return 0;
>  }
>  
> +int cavium_init_context(struct arm_smmu_domain *smmu_domain)
> +{
> +	u32 id_base = to_csmmu(smmu_domain->smmu)->id_base;
> +
> +	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2)
> +		smmu_domain->cfg.vmid += id_base;
> +	else
> +		smmu_domain->cfg.asid += id_base;
> +
> +	return 0;
> +}
> +
>  const struct arm_smmu_impl cavium_impl = {
>  	.cfg_probe = cavium_cfg_probe,
> +	.init_context = cavium_init_context,
>  };
>  
> +struct arm_smmu_device *cavium_smmu_impl_init(struct arm_smmu_device *smmu)
> +{
> +	struct cavium_smmu *csmmu;
> +
> +	csmmu = devm_kzalloc(smmu->dev, sizeof(*csmmu), GFP_KERNEL);
> +	if (!csmmu)
> +		return ERR_PTR(-ENOMEM);
> +
> +	csmmu->smmu = *smmu;
> +	csmmu->smmu.impl = &cavium_impl;
> +
> +	devm_kfree(smmu->dev, smmu);
> +
> +	return &csmmu->smmu;
> +}
> +
>  
>  #define ARM_MMU500_ACTLR_CPRE		(1 << 1)
>  
> @@ -121,7 +156,7 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu)
>  		smmu->impl = &calxeda_impl;
>  
>  	if (smmu->model == CAVIUM_SMMUV2)
> -		smmu->impl = &cavium_impl;
> +		return cavium_smmu_impl_init(smmu);
>  
>  	if (smmu->model == ARM_MMU500)
>  		smmu->impl = &arm_mmu500_impl;

Maybe rework this so we do the calxeda detection first (and return if we
match), followed by a switch on smmu->model to make it crystal clear that
we match only one?

Will
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  parent reply index

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-09 17:07 [PATCH 00/15] Arm SMMU refactoring Robin Murphy
2019-08-09 17:07 ` [PATCH 01/15] iommu/arm-smmu: Convert GR0 registers to bitfields Robin Murphy
2019-08-14 17:20   ` Will Deacon
2019-08-14 17:35     ` Robin Murphy
2019-08-09 17:07 ` [PATCH 02/15] iommu/arm-smmu: Convert GR1 " Robin Murphy
2019-08-09 17:07 ` [PATCH 03/15] iommu/arm-smmu: Convert context bank " Robin Murphy
2019-08-09 17:07 ` [PATCH 04/15] iommu/arm-smmu: Rework cb_base handling Robin Murphy
2019-08-14 18:05   ` Will Deacon
2019-08-15 11:14     ` Robin Murphy
2019-08-09 17:07 ` [PATCH 05/15] iommu/arm-smmu: Split arm_smmu_tlb_inv_range_nosync() Robin Murphy
2019-08-15 10:56   ` Will Deacon
2019-08-15 11:22     ` Robin Murphy
2019-08-09 17:07 ` [PATCH 06/15] iommu/arm-smmu: Get rid of weird "atomic" write Robin Murphy
2019-08-09 17:07 ` [PATCH 07/15] iommu/arm-smmu: Abstract GR1 accesses Robin Murphy
2019-08-09 17:07 ` [PATCH 08/15] iommu/arm-smmu: Abstract context bank accesses Robin Murphy
2019-08-15 10:56   ` Will Deacon
2019-08-15 11:41     ` Robin Murphy
2019-08-09 17:07 ` [PATCH 09/15] iommu/arm-smmu: Abstract GR0 accesses Robin Murphy
2019-08-09 17:07 ` [PATCH 10/15] iommu/arm-smmu: Rename arm-smmu-regs.h Robin Murphy
2019-08-09 17:07 ` [PATCH 11/15] iommu/arm-smmu: Add implementation infrastructure Robin Murphy
2019-08-09 17:07 ` [PATCH 12/15] iommu/arm-smmu: Move Secure access quirk to implementation Robin Murphy
2019-08-09 17:07 ` [PATCH 13/15] iommu/arm-smmu: Add configuration implementation hook Robin Murphy
2019-08-09 17:07 ` [PATCH 14/15] iommu/arm-smmu: Add reset " Robin Murphy
2019-08-09 17:07 ` [PATCH 15/15] iommu/arm-smmu: Add context init " Robin Murphy
2019-08-13 19:11   ` Krishna Reddy
2019-08-15 10:56   ` Will Deacon [this message]
2019-08-15 12:09     ` Robin Murphy
2019-08-15 15:09       ` Jordan Crouse
2019-08-09 17:11 ` [PATCH 00/15] Arm SMMU refactoring Robin Murphy
2019-08-15 10:55 ` Will Deacon

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