* [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
@ 2019-11-08 15:58 Eric Auger
2019-11-08 23:02 ` Jacob Pan
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Eric Auger @ 2019-11-08 15:58 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, joro, iommu
For both PASID-based-Device-TLB Invalidate Descriptor and
Device-TLB Invalidate Descriptor, the Physical Function Source-ID
value is split according to this layout:
PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52.
Fix the part laid out at offset 52.
Fixes: 0f725561e1684 ("iommu/vt-d: Add definitions for PFSID")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/linux/intel-iommu.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index ed11ef594378..6d8bf4bdf240 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -336,7 +336,8 @@ enum {
#define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32)
#define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16)
#define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
-#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
+#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
+ ((u64)((pfsid >> 4) & 0xfff) << 52))
#define QI_DEV_IOTLB_SIZE 1
#define QI_DEV_IOTLB_MAX_INVS 32
@@ -360,7 +361,8 @@ enum {
#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
-#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
+#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
+ ((u64)((pfsid >> 4) & 0xfff) << 52))
#define QI_DEV_EIOTLB_MAX_INVS 32
/* Page group response descriptor QW0 */
--
2.20.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
2019-11-08 15:58 [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros Eric Auger
@ 2019-11-08 23:02 ` Jacob Pan
2019-11-09 0:45 ` Lu Baolu
2019-11-11 15:11 ` Joerg Roedel
2 siblings, 0 replies; 4+ messages in thread
From: Jacob Pan @ 2019-11-08 23:02 UTC (permalink / raw)
To: Eric Auger; +Cc: iommu, eric.auger.pro
On Fri, 8 Nov 2019 16:58:03 +0100
Eric Auger <eric.auger@redhat.com> wrote:
> For both PASID-based-Device-TLB Invalidate Descriptor and
> Device-TLB Invalidate Descriptor, the Physical Function Source-ID
> value is split according to this layout:
>
> PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52.
> Fix the part laid out at offset 52.
>
> Fixes: 0f725561e1684 ("iommu/vt-d: Add definitions for PFSID")
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> include/linux/intel-iommu.h | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index ed11ef594378..6d8bf4bdf240 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -336,7 +336,8 @@ enum {
> #define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32)
> #define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16)
> #define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
> -#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) |
> ((u64)(pfsid & 0xfff) << 52)) +#define QI_DEV_IOTLB_PFSID(pfsid)
> (((u64)(pfsid & 0xf) << 12) | \
> + ((u64)((pfsid >> 4) & 0xfff) <<
> 52)) #define QI_DEV_IOTLB_SIZE 1
> #define QI_DEV_IOTLB_MAX_INVS 32
>
> @@ -360,7 +361,8 @@ enum {
> #define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
> #define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
> #define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
> -#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) |
> ((u64)(pfsid & 0xfff) << 52)) +#define QI_DEV_EIOTLB_PFSID(pfsid)
> (((u64)(pfsid & 0xf) << 12) | \
> + ((u64)((pfsid >> 4) & 0xfff) <<
> 52)) #define QI_DEV_EIOTLB_MAX_INVS 32
>
> /* Page group response descriptor QW0 */
Good catch. Thanks!
Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
2019-11-08 15:58 [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros Eric Auger
2019-11-08 23:02 ` Jacob Pan
@ 2019-11-09 0:45 ` Lu Baolu
2019-11-11 15:11 ` Joerg Roedel
2 siblings, 0 replies; 4+ messages in thread
From: Lu Baolu @ 2019-11-09 0:45 UTC (permalink / raw)
To: Eric Auger, eric.auger.pro, joro, iommu
Hi Eric,
On 11/8/19 11:58 PM, Eric Auger wrote:
> For both PASID-based-Device-TLB Invalidate Descriptor and
> Device-TLB Invalidate Descriptor, the Physical Function Source-ID
> value is split according to this layout:
>
> PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52.
> Fix the part laid out at offset 52.
>
> Fixes: 0f725561e1684 ("iommu/vt-d: Add definitions for PFSID")
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Please cc this to stable as well.
Cc: stable@vger.kernel.org # v4.19+
Good catch!
Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
Best regards,
baolu
> ---
> include/linux/intel-iommu.h | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index ed11ef594378..6d8bf4bdf240 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -336,7 +336,8 @@ enum {
> #define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32)
> #define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16)
> #define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
> -#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
> +#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
> + ((u64)((pfsid >> 4) & 0xfff) << 52))
> #define QI_DEV_IOTLB_SIZE 1
> #define QI_DEV_IOTLB_MAX_INVS 32
>
> @@ -360,7 +361,8 @@ enum {
> #define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
> #define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
> #define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
> -#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
> +#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
> + ((u64)((pfsid >> 4) & 0xfff) << 52))
> #define QI_DEV_EIOTLB_MAX_INVS 32
>
> /* Page group response descriptor QW0 */
>
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros
2019-11-08 15:58 [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros Eric Auger
2019-11-08 23:02 ` Jacob Pan
2019-11-09 0:45 ` Lu Baolu
@ 2019-11-11 15:11 ` Joerg Roedel
2 siblings, 0 replies; 4+ messages in thread
From: Joerg Roedel @ 2019-11-11 15:11 UTC (permalink / raw)
To: Eric Auger; +Cc: iommu, eric.auger.pro
On Fri, Nov 08, 2019 at 04:58:03PM +0100, Eric Auger wrote:
> For both PASID-based-Device-TLB Invalidate Descriptor and
> Device-TLB Invalidate Descriptor, the Physical Function Source-ID
> value is split according to this layout:
>
> PFSID[3:0] is set at offset 12 and PFSID[15:4] is put at offset 52.
> Fix the part laid out at offset 52.
>
> Fixes: 0f725561e1684 ("iommu/vt-d: Add definitions for PFSID")
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> include/linux/intel-iommu.h | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Applied for v5.4, thanks.
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2019-11-08 15:58 [PATCH] iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros Eric Auger
2019-11-08 23:02 ` Jacob Pan
2019-11-09 0:45 ` Lu Baolu
2019-11-11 15:11 ` Joerg Roedel
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