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Tue, 14 Jan 2020 08:31:05 -0800 (PST) Date: Tue, 14 Jan 2020 17:31:01 +0100 From: Jean-Philippe Brucker To: Will Deacon Subject: Re: [PATCH v4 09/13] iommu/arm-smmu-v3: Prepare for handling arm_smmu_write_ctx_desc() failure Message-ID: <20200114163101.GB5319@myrica> References: <20191219163033.2608177-1-jean-philippe@linaro.org> <20191219163033.2608177-10-jean-philippe@linaro.org> <20200114124247.GD29222@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200114124247.GD29222@willie-the-truck> Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, sudeep.holla@arm.com, rjw@rjwysocki.net, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, robh+dt@kernel.org, guohanjun@huawei.com, bhelgaas@google.com, zhangfei.gao@linaro.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, lenb@kernel.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, Jan 14, 2020 at 12:42:47PM +0000, Will Deacon wrote: > On Thu, Dec 19, 2019 at 05:30:29PM +0100, Jean-Philippe Brucker wrote: > > Second-level context descriptor tables will be allocated lazily in > > arm_smmu_write_ctx_desc(). Help with handling allocation failure by > > moving the CD write into arm_smmu_domain_finalise_s1(). > > > > Reviewed-by: Eric Auger > > Reviewed-by: Jonathan Cameron > > Signed-off-by: Jean-Philippe Brucker > > --- > > drivers/iommu/arm-smmu-v3.c | 11 +++++++---- > > 1 file changed, 7 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > > index e147087198ef..b825a5639afc 100644 > > --- a/drivers/iommu/arm-smmu-v3.c > > +++ b/drivers/iommu/arm-smmu-v3.c > > @@ -2301,8 +2301,15 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, > > cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0]; > > cfg->cd.tcr = pgtbl_cfg->arm_lpae_s1_cfg.tcr; > > cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; > > + > > + ret = arm_smmu_write_ctx_desc(smmu_domain, 0, &cfg->cd); > > Hmm. This ends up calling arm_smmu_sync_cd() but I think that happens before > we've added the master to the devices list of the domain. Does that mean we > miss the new SSID during the invalidation? Yes, the arm_smmu_sync_cd() isn't useful in this case, it's only needed when the STE is live and arm_smmu_write_ctx_desc() is called for a ssid!=0. On this path, the CD cache is invalidated by a CFGI_STE executed later, when arm_smmu_attach_dev() installs the STE. I didn't want to add a special case that avoids the sync when ssid==0 in because a spurious sync probably doesn't impact performance here and arm_smmu_write_ctx_desc() is quite fiddly already. Thanks, Jean _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu