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bh=e+fMIwGNwq2beGOSfZj3r5yBkIPwIcRKL0eYkApPFb0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=K+qKqSE3qcGqcbMQcCYeT1g3fyXhB8jPkSB7dvCTZgow8dVsJReoNWoQakJ63GReE XLFw3gjfkK3WaQOcJXlyf192cAg3YZRUVBKXtghqiR01SN/LFwJT3SK3pECDnzjUKa qJmzDt+u7bmYNluiKrvC7K77DUMjyM7bFM0ECT3g= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jGh1Y-00FEMD-9P; Tue, 24 Mar 2020 10:43:08 +0000 Date: Tue, 24 Mar 2020 10:43:07 +0000 From: Marc Zyngier To: John Garry Subject: Re: arm-smmu-v3 high cpu usage for NVMe Message-ID: <20200324104307.57d2cde0@why> In-Reply-To: <0e00de15-596a-d342-f3cb-e19c389294e6@huawei.com> References: <20190821151749.23743-1-will@kernel.org> <20200318205313.GB8094@willie-the-truck> <20200319184349.GA1697676@myrica> <20200320111842.GD1702630@myrica> <5198fcffc8ad6233e0274ebff9e9aa5f@kernel.org> <0e00de15-596a-d342-f3cb-e19c389294e6@huawei.com> Organization: Approximate X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: john.garry@huawei.com, jean-philippe@linaro.org, will@kernel.org, iommu@lists.linux-foundation.org, robin.murphy@arm.com, thunder.leizhen@huawei.com, ming.lei@redhat.com, julien.thierry.kdev@gmail.com, mark.rutland@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: Mark Rutland , Jean-Philippe Brucker , Robin Murphy , Ming Lei , iommu@lists.linux-foundation.org, Will Deacon , Julien Thierry X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, 24 Mar 2020 09:18:10 +0000 John Garry wrote: > On 23/03/2020 09:16, Marc Zyngier wrote: > > + Julien, Mark > > Hi Marc, > > >>> Time to enable pseudo-NMIs in the PMUv3 driver... > >>> > >> > >> Do you know if there is any plan for this? > > > > There was. Julien Thierry has a bunch of patches for that [1], but they > needs > > reviving. > > > > So those patches still apply cleanly (apart from the kvm patch, which > I can skip, I suppose) and build, so I can try this I figure. Is > there anything else which I should ensure or know about? Apart from > enable CONFIG_ARM64_PSUEDO_NMI. You need to make sure that your firmware sets SCR_EL3.FIQ to 1. My D05 has it set to 0, preventing me from being able to use the feature (hint, nudge... ;-). M. -- Jazz is not dead. It just smells funny... _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu