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Tue, 07 Jul 2020 03:48:36 -0700 (PDT) Date: Tue, 7 Jul 2020 12:48:25 +0200 From: Jean-Philippe Brucker To: Jordan Crouse Subject: Re: [PATCH v2 1/6] iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2 Message-ID: <20200707104825.GA159413@myrica> References: <20200626200414.14382-1-jcrouse@codeaurora.org> <20200626200414.14382-2-jcrouse@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200626200414.14382-2-jcrouse@codeaurora.org> Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, John Stultz , Will Deacon , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Jordan, On Fri, Jun 26, 2020 at 02:04:09PM -0600, Jordan Crouse wrote: > Support auxiliary domains for arm-smmu-v2 to initialize and support > multiple pagetables for a single SMMU context bank. Since the smmu-v2 > hardware doesn't have any built in support for switching the pagetable > base it is left as an exercise to the caller to actually use the pagetable. > > Aux domains are supported if split pagetable (TTBR1) support has been > enabled on the master domain. Each auxiliary domain will reuse the > configuration of the master domain. By default the a domain with TTBR1 > support will have the TTBR0 region disabled so the first attached aux > domain will enable the TTBR0 region in the hardware and conversely the > last domain to be detached will disable TTBR0 translations. All subsequent > auxiliary domains create a pagetable but not touch the hardware. > > The leaf driver will be able to query the physical address of the > pagetable with the DOMAIN_ATTR_PTBASE attribute so that it can use the > address with whatever means it has to switch the pagetable base. > > Following is a pseudo code example of how a domain can be created > > /* Check to see if aux domains are supported */ > if (iommu_dev_has_feature(dev, IOMMU_DEV_FEAT_AUX)) { > iommu = iommu_domain_alloc(...); > The device driver should also call iommu_dev_enable_feature() before using the AUX feature. I see that you implement them as NOPs and in this case the GPU is tightly coupled with the SMMU so interoperability between different IOMMU and device drivers doesn't matter much, but I think it's still a good idea to follow the same patterns in all drivers to make future work on the core IOMMU easier. > if (iommu_aux_attach_device(domain, dev)) > return FAIL; > > /* Save the base address of the pagetable for use by the driver > iommu_domain_get_attr(domain, DOMAIN_ATTR_PTBASE, &ptbase); > } > > Then 'domain' can be used like any other iommu domain to map and > unmap iova addresses in the pagetable. > > Signed-off-by: Jordan Crouse > --- > > drivers/iommu/arm-smmu.c | 219 ++++++++++++++++++++++++++++++++++++--- > drivers/iommu/arm-smmu.h | 1 + > 2 files changed, 204 insertions(+), 16 deletions(-) [...] > @@ -1653,6 +1836,10 @@ static struct iommu_ops arm_smmu_ops = { > .get_resv_regions = arm_smmu_get_resv_regions, > .put_resv_regions = generic_iommu_put_resv_regions, > .def_domain_type = arm_smmu_def_domain_type, > + .dev_has_feat = arm_smmu_dev_has_feat, > + .dev_enable_feat = arm_smmu_dev_enable_feat, > + .dev_disable_feat = arm_smmu_dev_disable_feat, > + .aux_attach_dev = arm_smmu_aux_attach_dev, To be complete this also needs dev_feat_enabled() and aux_detach_dev() ops Thanks, Jean _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu