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Thu, 09 Jul 2020 13:13:49 -0700 (PDT) Received: from xps15 ([64.188.179.254]) by smtp.gmail.com with ESMTPSA id c3sm2314843ilj.31.2020.07.09.13.13.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 13:13:49 -0700 (PDT) Received: (nullmailer pid 813726 invoked by uid 1000); Thu, 09 Jul 2020 20:13:48 -0000 Date: Thu, 9 Jul 2020 14:13:48 -0600 From: Rob Herring To: Krishna Reddy Subject: Re: [PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU Message-ID: <20200709201348.GA808454@bogus> References: <20200708050017.31563-1-vdumpa@nvidia.com> <20200708050017.31563-5-vdumpa@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200708050017.31563-5-vdumpa@nvidia.com> Cc: snikam@nvidia.com, devicetree@vger.kernel.org, nicoleotsuka@gmail.com, mperttunen@nvidia.com, praithatha@nvidia.com, bhuntsman@nvidia.com, will@kernel.org, linux-kernel@vger.kernel.org, jonathanh@nvidia.com, talho@nvidia.com, iommu@lists.linux-foundation.org, nicolinc@nvidia.com, linux-tegra@vger.kernel.org, yhsu@nvidia.com, treding@nvidia.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, bbiswas@nvidia.com X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, Jul 07, 2020 at 10:00:16PM -0700, Krishna Reddy wrote: > Add binding for NVIDIA's Tegra194 SoC SMMU. > > Signed-off-by: Krishna Reddy > --- > .../devicetree/bindings/iommu/arm,smmu.yaml | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > index d7ceb4c34423..ac1f526c3424 100644 > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > @@ -38,6 +38,11 @@ properties: > - qcom,sc7180-smmu-500 > - qcom,sdm845-smmu-500 > - const: arm,mmu-500 > + - description: NVIDIA SoCs that program two ARM MMU-500s identically > + items: > + - enum: > + - nvidia,tegra194-smmu > + - const: nvidia,smmu-500 > - items: > - const: arm,mmu-500 > - const: arm,smmu-v2 > @@ -138,6 +143,19 @@ required: > > additionalProperties: false > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - nvidia,tegra194-smmu > + then: > + properties: > + reg: > + minItems: 2 > + maxItems: 2 This doesn't work. The main part of the schema already said there's only 1 reg region. This part is ANDed with that, not an override. You need to add an else clause with 'maxItems: 1' and change the base schema to {minItems: 1, maxItems: 2}. Rob _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu