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From: Rob Herring <robh@kernel.org>
To: Tomasz Nowicki <tn@semihalf.com>
Cc: devicetree@vger.kernel.org, gregory.clement@bootlin.com,
	Robin Murphy <robin.murphy@arm.com>,
	linux-kernel@vger.kernel.org, nadavh@marvell.com,
	iommu@lists.linux-foundation.org, catalin.marinas@arm.com,
	mw@semihalf.com, will@kernel.org, hannah@marvell.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 3/4] dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500
Date: Mon, 13 Jul 2020 15:36:05 -0600	[thread overview]
Message-ID: <20200713213605.GA766184@bogus> (raw)
In-Reply-To: <972f5cbd-705b-e18a-7477-5f6922804361@semihalf.com>

On Fri, Jul 03, 2020 at 11:26:32AM +0200, Tomasz Nowicki wrote:
> On 03.07.2020 11:05, Robin Murphy wrote:
> > On 2020-07-02 21:16, Tomasz Nowicki wrote:
> > > Add specific compatible string for Marvell usage due to errata of
> > > accessing 64bits registers of ARM SMMU, in AP806.
> > > 
> > > AP806 SoC uses the generic ARM-MMU500, and there's no specific
> > > implementation of Marvell, this compatible is used for errata only.
> > > 
> > > Signed-off-by: Hanna Hawa <hannah@marvell.com>
> > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
> > > Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> > > ---
> > >   Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 5 +++++
> > >   1 file changed, 5 insertions(+)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > > b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > > index d7ceb4c34423..7beca9c00b12 100644
> > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > > @@ -38,6 +38,11 @@ properties:
> > >                 - qcom,sc7180-smmu-500
> > >                 - qcom,sdm845-smmu-500
> > >             - const: arm,mmu-500
> > > +      - description: Marvell SoCs implementing "arm,mmu-500"
> > > +        items:
> > > +          - enum:
> > > +              - marvell,ap806-smmu-500
> > 
> > Isn't a single-valued enum just a constant? :P
> 
> That's how copy-paste engineering ends up :)

It's fine like this if you expect more SoCs to be added.

Either way,

Reviewed-by: Rob Herring <robh@kernel.org>
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  reply	other threads:[~2020-07-13 21:36 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-02 20:16 [PATCH v3 0/4] Add system mmu support for Armada-806 Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 1/4] iommu/arm-smmu: Add SMMU ID2 register fixup hook Tomasz Nowicki
2020-07-03  8:24   ` Robin Murphy
2020-07-03  9:19     ` Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 2/4] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Tomasz Nowicki
2020-07-03  9:03   ` Robin Murphy
2020-07-03 11:24     ` Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 3/4] dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500 Tomasz Nowicki
2020-07-03  9:05   ` Robin Murphy
2020-07-03  9:26     ` Tomasz Nowicki
2020-07-13 21:36       ` Rob Herring [this message]
2020-07-02 20:16 ` [PATCH v3 4/4] arm64: dts: marvell: add SMMU support Tomasz Nowicki
2020-07-03  9:16   ` Robin Murphy
2020-07-03  9:33     ` Tomasz Nowicki
2020-07-03 10:38       ` Marcin Wojtas
2020-07-14  8:19 ` [PATCH v3 0/4] Add system mmu support for Armada-806 Will Deacon
2020-07-14 10:26   ` Tomasz Nowicki

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